ba21dc8498
jesd204sync: improve messaging
2019-01-28 18:08:20 +08:00
3acee87df2
firmware: improve DDMTD resolution using dithering/averaging
2019-01-28 16:04:04 +08:00
cfe66549ff
jesd204sync: cleanup DDMTD averaging code
2019-01-28 14:14:50 +08:00
2b0d63db23
hmc830_7043: support 125MHz RTIO
2019-01-28 13:44:08 +08:00
bdd4e52a53
ad9154: support 125MHz RTIO
2019-01-28 13:43:52 +08:00
47312e55d3
sayma: set RTIO_FREQUENCY in MasterDAC
2019-01-28 13:43:28 +08:00
443d6d8688
sayma_amc: pass RTIO clock frequency to SiPhaser
2019-01-28 09:49:03 +08:00
3b6f47886e
firmware: print more info on DDMTD stability error
2019-01-27 23:06:11 +08:00
74fdd04622
firmware: test DDMTD stability
2019-01-27 20:39:12 +08:00
81b0046f98
ddmtd: add deglitchers
2019-01-27 20:38:41 +08:00
8254560577
sayma: properly determine SYSREF coarse calibration target
2019-01-27 16:00:36 +08:00
214394e3b0
sayma: reimplement DAC SYSREF autocalibration
2019-01-27 15:28:39 +08:00
fdbf1cc2b2
sayma: rework DAC SYSREF margin validation
...
Previous code did not work when delay range was not enough for two rotations.
This removes autocalibration, to be done later. Uses hardcoded value for now.
2019-01-27 14:17:54 +08:00
7e5c062c2c
firmware: bypass channel divider for HMC7043 DCLK
2019-01-27 11:49:34 +08:00
f73ffe44f9
firmware: implement DDMTD-based SYSREF/RTIO alignment (draft)
...
Mostly works and usually gets the DAC synchronized at 2.4GHz with Urukul across DRTIO.
Needs cleanup and optimization/characterization.
2019-01-27 09:51:24 +08:00
8632b553d2
ddmtd: use IOB register to sample input
2019-01-27 09:50:02 +08:00
d1ef036948
kasli_sawgmaster: initialize SAWG phase according to RTIO TSC
2019-01-27 09:49:31 +08:00
9966e789fc
sayma: simplify Ultrascale LVDS T false path
...
Recommended by Xilinx.
2019-01-25 23:40:48 +08:00
359fb1f207
sayma: fix DDMTD STA
2019-01-25 23:39:19 +08:00
cb04230f86
sayma: SYSREF setup/hold validation demonstration
...
This also removes the standalone target as the ISERDES used
for setup/hold check requires the fine RTIO clock, which in turn
requires a DRTIO transceiver due to the Ultrascale TPWS bug.
2019-01-25 16:58:58 +08:00
3356717316
sayma: DDMTD SYSREF measurement demonstration
2019-01-25 16:00:31 +08:00
4941fb3300
sayma: 2.4GHz DAC clocking (4X interpolation)
...
* gets another clock divider out of the way
* gets one cycle within range of the HMC7043 analog delay alone
* SYSREF/RTIO alignment removed, to be replaced with DDMTD-based scheme
2019-01-25 13:47:04 +08:00
cc9420d2c8
hmc7043: fix divider programming
2019-01-25 11:48:50 +08:00
8c5a502591
ad53xx: ignore F3 (reserved)
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-24 15:50:46 +01:00
bbac92442f
sayma: check hmc7043 slip period
2019-01-24 20:13:43 +08:00
a92cc91dcb
kasli_sawgmaster: correctly tune DDS and SAWG
2019-01-24 19:37:14 +08:00
f8b39b0b9a
sayma: enable 2X DAC interpolation
...
Seems to work just fine and gets one clock divider out of the way.
2019-01-24 18:28:01 +08:00
07b5b0d36d
kasli: adapt Master target to new hardware
2019-01-24 18:27:15 +08:00
154269b77a
kasli: fix HUST satellite Urukul
2019-01-23 17:59:43 +08:00
3b5fd3ac11
kasli_tester: fix grabber test
2019-01-23 17:59:25 +08:00
330c5610e9
ad9912: fix imports
2019-01-23 17:59:08 +08:00
390f05f762
firmware: use smoltcp release
2019-01-23 16:15:05 +08:00
d7e6f104d2
kasli: add HUST variants
2019-01-23 14:11:51 +08:00
81f2b2c864
kasli: remove unpopulated Tester EEMs
...
* matches hardware and avoids issues with programs that process the DDB (e.g. kasli_tester)
* shortens compilation times
2019-01-23 12:14:44 +08:00
b692981c8e
ad9910: add note about red front panel led
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-22 12:49:42 +01:00
a0eba5b09b
satman: support Grabber
2019-01-22 19:36:13 +08:00
2e3555de85
firmware: fix compilation error with more than 1 Grabber
2019-01-22 19:35:46 +08:00
9ee5fea88d
kasli: support optional SATA port for DRTIO
2019-01-22 18:06:48 +08:00
91e375ce6a
ad9910: don't reset the input divide-by-two
...
suspected of causing weird PLL lock timout errors
https://freenode.irclog.whitequark.org/m-labs/2019-01-22#1548148750-1548143221 ;
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-22 09:37:20 +00:00
81ff3d4b29
ad9912: add some slack after init
2019-01-21 17:10:58 +00:00
a9678dd9f2
test_frontends: always skip GUI programs
...
The "import PyQt5" hack breaks on nix/hydra.
2019-01-21 23:41:07 +08:00
84f7d006e8
ad9910: add precision about tune_io_update_delay/tune_sync_delay order
2019-01-21 19:40:55 +08:00
30051133b7
urukul: fix typos
2019-01-21 19:40:55 +08:00
30b2f54baa
kasli_tester: skip Zotino test when no Zotino is present
2019-01-21 18:11:41 +08:00
bff8c8cb05
kasli: add Berkeley variant
2019-01-21 17:44:17 +08:00
a987d2b2e5
kasli_tester: skip Grabber test when no Grabber is present
2019-01-21 17:43:48 +08:00
David Nadlinger
4ba4e9c540
test_scheduler: Test for hang when exiting with running experiments
...
The respective code path in artiq.master.scheduler._mk_worker_method
wasn't previously covered.
2019-01-20 19:45:50 +00:00
David Nadlinger
0dab7ecd73
master: Include RID in worker exception messages
...
This helps when debugging unexpected shutdown problems
after the fact.
2019-01-20 19:45:50 +00:00
David Nadlinger
e24e893303
master/scheduler: Fix misleading indentation [nfc]
2019-01-20 19:45:47 +00:00
David Nadlinger
e165a9a352
sync_struct: Factor action strings out into enum and document them [nfc]
2019-01-19 20:19:17 +00:00
David Nadlinger
c213ab13ba
sync_struct: Notifier.{read -> raw_view}, factor out common dict update code [nfc]
2019-01-19 20:19:17 +00:00
David Nadlinger
bd71852427
sync_struct: Tweak variable name to avoid confusion with init mod action [nfc]
2019-01-19 20:19:17 +00:00
David Nadlinger
90c144a685
test_pc_rpc: Remove leftover debug print [nfc]
...
This tidies up the test suite output, and we have verbose asserts
to show further information on breakage, should it occur.
2019-01-19 20:18:33 +00:00
a2ff2cc173
sayma_amc: use more selective IOBUFDS false path
2019-01-19 11:47:50 +08:00
40187d1957
ad9910: support configurable refclk divider and pll bypass
...
for #1248
* also always keep refclk input divider (by two) reset
2019-01-18 12:23:53 +00:00
385916a9a4
ad9912: support configurable clk_div
2019-01-18 12:16:08 +00:00
2bea5e3d58
urukul: support configurable refclk divider
...
for #1248
2019-01-18 12:09:32 +00:00
689714965b
monkey_patches: disable for Python >= 3.6.7
...
3.6 >=7 are fixed
3.7.0 is incompatible with the monkey patches and they do more harm than good
3.7 >=1 are fixed
2019-01-15 20:29:20 +08:00
David Nadlinger
1c71ae636a
examples: Add edge counters to kasli_tester variant
...
This enables test_edge_counter on the CI system.
2019-01-15 10:55:07 +00:00
David Nadlinger
67a6882e91
examples: Fix kasli_tester device_db offset comments
2019-01-15 10:55:07 +00:00
David Nadlinger
a565f77538
Add gateware input event counter
2019-01-15 10:55:07 +00:00
4cb9f77fd8
sayma_amc: fix Master timing constraints
2019-01-13 13:53:07 +08:00
David Nadlinger
6c52359e59
coredevice: Add _mu suffix to AD991x ref_time arguments
...
GitHub: Fixes #1243 .
2019-01-12 17:34:35 +00:00
David Nadlinger
24b1b9a480
Add smoke test for frontend commands
...
This ensures that at least --help works for all the commands,
preventing regressions like that in f3323a35d5
2019-01-12 13:50:53 +00:00
whitequark
425cd7851e
compiler: first monomorphize ints, then casts.
...
Fixes #1242 .
2019-01-12 13:40:12 +00:00
whitequark
49682d0159
Improve Python 3.7 compatibility.
...
async is now a full (non-contextual) keyword.
There are two more instances:
- artiq/frontend/artiq_client.py
- artiq/devices/thorlabs_tcube/driver.py
It is not immediately clear how to fix those, so they are left for
later work.
2019-01-12 13:17:59 +00:00
David Nadlinger
f3323a35d5
artiq_influxdb: Unbreak after verbosity_args rename
...
This fixes commit f2c1d32e54
2019-01-12 12:02:22 +00:00
David Nadlinger
48fc175a6b
coredevice.ttl: More imperative mood in docstrings [nfc]
...
This follows Python conventions (PEP257) and unifies the style with
other comments.
2019-01-12 12:01:55 +00:00
Drew
f2c1d32e54
frontend: add --version flag to cmd line args ( #1181 )
2019-01-12 09:47:47 +08:00
David Nadlinger
3e84ec2bf1
coredevice.ad9910: Fix phase tracking ref_time passing
...
This is difficult to test without hardware mocks or some
form of phase readback, but the symptom was that e.g.
`self.dds.set(…, ref_time=now_mu() - 1)` would fail
periodically, that is, whenever bit 32 of the timestamp
would be set (which would be turned into the sign bit).
This is a fairly sinister issue, and is probably a compiler
bug of some sort (either accepts-invalid or wrong type inference).
2019-01-12 00:47:38 +00:00
Drew
66861e6708
test_pc_rpc: fix equality bug ( #1188 ) ( #1239 )
...
Fixes bug from 5108ed8. Truth value of multi-element numpy array is
not defined. Completes #1186 and fixes/amends #1188 .
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
2019-01-11 10:15:44 +08:00
101671fbbf
core_analyzer: support uniform VCD time intervals
...
close #1236
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-10 19:35:09 +01:00
Drew
99a0f61b35
artiq_client: remove custom input validation for built-in argparse ( #1185 )
2019-01-10 12:58:11 +08:00
Drew
721c6f3bcc
pc_rpc: fix handling of type annotations
2019-01-10 12:13:22 +08:00
088530604e
test_ad9910: relax tests
...
* tune_sync_delay: the opposite IO_UPDATE to SYNC_CLK alignment may not be perfectly
mis-aligned
* set_mu_speed: seems to be slower on the buildbot
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-09 17:27:42 +00:00
19748fe495
ad9910: fix RTIO fine timestamp nudging
...
Previously the TSC was truncated to an even coarse RTIO periods before doing
the setting SPI xfer. Afterwards the the IO update pulse would introduce
at least one but less than two RTIO cycles. Ultimately the RTIO TSC was
truncated again to even. If the SPI xfer takes an odd number of RTIO
periods, then a subsequent xfer would collide.
close #1229
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-09 17:22:57 +00:00
b25ab1fc88
ad9910: add more slack in tune_sync_delay
...
close #1235
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-09 16:07:31 +00:00
9b213b17af
sayma_amc: forward RTM UART in Master variant as well
2019-01-09 18:57:57 +08:00
c7b18952b8
sayma_amc: work around Ultrascale LVDS Toutbuf_delay_td_pad
2019-01-09 13:47:08 +08:00
62599c5f91
firmware: use consistent terminology
2019-01-09 13:46:18 +08:00
Drew
b3b0b6f0a5
artiq_influxdb: clarify argparse groups ( #1212 )
...
Make names of argparse group variables relate to what they're doing.
Meets Flake8.
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
2019-01-09 11:40:55 +08:00
David Nadlinger
101ed5d534
examples: Fix DRTIO destination indices ( #1231 )
...
Using the default routing table, links numbers and destinations
are offset by 1, as destination 0 is local RTIO.
2019-01-09 11:40:15 +08:00
Drew
40370c4d45
Docs: fix build warnings ( #1234 )
...
* ad9910: finish CONT_RECIRCULATE -> CONT_RAMPUP
Found while building docs. Forgot to refactor strings.
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
* spi2: reformat update_xfer_duration_mu docstring
update_xfer_duration_mu docstring threw warning while building docs,
didn't use consistent indent in warning.
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
2019-01-09 11:39:23 +08:00
David Nadlinger
4fb434674d
coredevice: Fix ad9910 __all__ exports
2019-01-08 18:55:26 +00:00
887cb110a7
firmware: fix default DRTIO routing table
2019-01-08 20:46:53 +08:00
David Nadlinger
cadde970e1
urukul: Expand CPLD sync_sel explanation [nfc]
2019-01-08 02:37:58 +00:00
David Nadlinger
7bcdeb825b
ad9910: Add inverse FTW/ASF conversions
2019-01-08 02:18:14 +00:00
David Nadlinger
4d793d7149
ad9910: Truncate phase word to 16 bits
...
This avoids overflowing into the asf portion of the register.
2019-01-08 02:18:14 +00:00
332bd6090f
satman: wait for CPLL/QPLL lock after setting drtio_transceiver::stable_clkin
2019-01-07 17:09:19 +08:00
3217488824
add Sayma RTM DRTIO target
2019-01-07 00:13:47 +08:00
b5501aaf00
firmware: program I2C switch on Sayma RTM
2019-01-06 14:54:52 +08:00
66b3132c28
sayma_amc: fix RTIO TSC instantiation
2019-01-06 14:54:32 +08:00
6e43c41103
firmware: support building without SDRAM
2019-01-05 23:41:30 +08:00
cf9447ab77
rtio/cri: remove unneeded CSR management
2019-01-05 23:40:45 +08:00
2c3510497b
firmware: fix not(has_spiflash) build
2019-01-05 23:40:03 +08:00
2100a8b1f1
sayma_amc: more fighting with vivado timing analyzer
2019-01-05 12:25:30 +08:00
Drew Risinger
b58d59a9e7
pyon: fix grammar in module docstring.
...
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
2019-01-04 19:31:08 +00:00
a93fdb8c9d
drtio: disable all destinations in gateware at startup
...
Otherwise, kernels fail to get a RTIODestinationUnreachable exception when attempting
to reach a DRTIO destination that has never been up.
2019-01-04 23:42:12 +08:00
62d7c89c48
sayma_amc: use high-resolution TTL on SMAs ( #792 )
2019-01-03 20:50:38 +08:00
0972d61e81
ttl_serdes_ultrascale: use GTH clock domains
2019-01-03 20:50:04 +08:00
f007895fad
drtio/gth_ultrascale: fix rtiox clock domain
2019-01-03 20:49:38 +08:00
10ebf63c47
jesd204_tools: get the Vivado timing analyzer to behave
2019-01-03 20:22:35 +08:00
d6a3172a3e
update copyright year
2019-01-03 20:21:34 +08:00
4af8fd6a0d
ttl_serdes_ultrascale: fix Input
2019-01-03 20:14:54 +08:00
175f8b8ccc
drtio/gth_ultrascale: generate multiplied RTIO clock from BUFG_GT ( #792 )
2019-01-03 20:14:18 +08:00
77126ce5b3
kasli: use hwrev 1.1 by default for DRTIO examples
2019-01-02 23:04:20 +08:00
ab9ca0ee0a
kasli: use 150MHz for DRTIO by default (Sayma compatibility)
2019-01-02 23:03:57 +08:00
cc58318500
siphaser: autocalibrate skew using RX synchronizer
...
* removes the hardcoded, (poorly) manually determined skew value
* does not need si5324_clkout_fabric anymore (broken on Sayma RTM due to wrong IO voltage)
2019-01-02 22:29:27 +08:00
f5cda3689e
sayma_amc: enable DRTIO on master SATA connector for MasterDAC variant
2019-01-02 16:46:16 +08:00
Drew
d60b95f481
tdr.py: typo ( #1220 )
2018-12-18 18:47:09 +00:00
a7d4d3bda9
ad9910: CONT_RECIRCULATE -> CONT_RAMPUP
2018-12-17 13:25:00 +00:00
35bdf26f01
Merge branch 'ad9910-ram'
2018-12-17 21:16:44 +08:00
David Nadlinger
e608d6ffd3
coredevice, firmware: Add rtio_input_timestamped_data
...
Integration tests to follow as part of an RTIO counter phy that
makes use of this.
2018-12-15 00:35:04 +00:00
David Nadlinger
8e30c4574b
firmware: Treat timestamps consistently as signed [nfc]
...
This matches other functions and the ARTIQ Python side, but
isn't actually an ABI change.
2018-12-15 00:02:18 +00:00
38ce7ab8ff
sync_struct: handle TimeoutError as subscriber disconnection. Closes #1215
2018-12-13 06:58:54 +08:00
79eadb9465
ad9910: add RAM mode methods
...
* also refactor the CFR1 access into a method
c.f. #1154
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-12-11 14:54:16 +00:00
6df4ae934f
eem: name the servo submodule
...
This allows the migen namer to derive names for the ADC return clock
domain in the case of multiple SUServos
close #1201
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-12-11 11:36:40 +01:00
efd400b02c
ad9910: style [nfc]
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-12-11 11:36:25 +01:00
David Nadlinger
d4c393b2a8
firmware/ksupport: Update cfg(not(has_rtio)) stub signatures
...
This fixes up 8caea0e6d3
2018-12-11 01:22:48 +00:00
d90eb3ae88
ad9910: add read64()
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-12-07 21:27:00 +00:00
baf88050fd
urukul: expand attenuator HITL unittests
...
* read back with cleared backing state
* individual channel settings
* check backing state
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-12-07 21:06:12 +00:00
Kaifeng
cc143d5fec
kasli_tester: add support for windows platform. ( #1204 )
2018-12-05 14:06:45 +01:00
6aa341bc44
test_loopback_gate_timing: fix lat_offset
2018-12-02 20:52:32 +08:00
421834fa3e
compiler: document Target.little_endian
2018-12-02 19:07:18 +08:00
981a77834a
compiler: use default triple to determine data_layout for JIT
2018-12-02 18:52:13 +08:00
d931967e5c
fix previous commits
2018-12-02 18:32:03 +08:00
dd03fdfd1a
typo
2018-12-02 18:26:54 +08:00
8940009e1a
compiler: pass data_layout string to llvm.create_target_data before determining endianness
2018-12-02 18:26:19 +08:00
2e66788c6c
compiler: support little endian target when storing now
2018-12-02 17:40:34 +08:00
7e14f3ca4e
compiler,gateware: atomic now stores
2018-12-02 05:06:46 +08:00
fd00021a52
ctlmgr: do not raise exceptions in Controllers.__setitem__. Closes #1198
2018-12-01 18:09:58 +08:00
7f55376c75
test_loopback_gate_timing: print input timing for debugging
2018-12-01 18:09:53 +08:00
dce4f036db
grabber: work around windows numpy int peculiarity (same as a81c12de9)
2018-11-30 18:41:14 +08:00
156afb48ee
language: fix syscall arg handling
2018-11-30 17:59:24 +08:00
Paweł K
57caa7b149
artiq_flash: add command to erase flash memory ( #1197 )
2018-11-28 12:33:32 +02:00
c56c0ba41f
rtio/dds: use write-only RT2WB
...
This saves one address bit and prevents issues with AD9914 and 8-bit addresses.
2018-11-26 07:38:15 +08:00
09141e5bee
rtio/wishbone: support write-only interface
2018-11-26 07:38:06 +08:00
450a035f9e
suservo: move overflowing RTIO address bits into data
2018-11-26 06:54:20 +08:00
ae8ef18f47
rtlink: sanity-check parameters
2018-11-26 01:14:02 +08:00
b32e89444c
Merge branch 'master' into new
2018-11-26 01:02:19 +08:00
af9ea1f324
gui: update background
2018-11-26 01:01:36 +08:00
a81c12de94
urukul: work around windows numpy int peculiarity
...
"OverflowError: Python int too large to convert to C long" otherwise
opticlock#74
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-25 16:56:45 +01:00
8f9858be4c
ad9914: remove automatic continuous phase compensation (like Urukul)
2018-11-19 22:00:20 +08:00
22a223bf82
examples/master: clean up remnants of early urukul tests
2018-11-19 21:42:41 +08:00
53e79f553f
Merge branch 'master' into new
2018-11-19 11:54:50 +08:00
a3e0b1c5b4
ad9914,spi2: add warnings about driver state and DMA. Closes #1113
2018-11-17 22:10:20 +08:00
78d4b3a7da
gateware/targets: expose variant lists
...
This allows writing scripts that build all variants.
2018-11-17 22:10:20 +08:00
69e699c7bd
ttl: compensate for SED latency in input gating
...
Closes #1137
2018-11-17 22:10:20 +08:00
3ad68f65c5
urukul: make get_att_mu() not alter state
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-16 14:56:26 +00:00
d1eee7c0ea
ad9910: ensure sync is driven when required
...
close #1194
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-16 13:21:01 +00:00
1b841805f6
Merge branch 'master' into new
2018-11-16 15:20:32 +08:00
d3483c1d26
kasli: fix SDRAM read delay reset/wrap issue. Closes #1149
2018-11-15 19:40:35 +08:00
494ffca4d3
gui,scan: add CenterScan Scannable variant
...
* parametrized by center/span/step instead of
start/stop/npoints which is more convenient in some applications
* no scan widget support so far
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-15 13:30:43 +08:00
f77a75ab17
test_ad9910: robustify w.r.t. profile synchronization
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 08:42:27 +01:00
c3178c2cab
ad9910: profile support
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 08:30:28 +01:00
d0cadfeb4b
ad9910: more idiomatic register names
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 07:55:01 +01:00
a52d1be140
urukul: expose PROFILE setting
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* add documentation
* add unittest
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 07:43:56 +01:00
2af6edb8f5
eem: fix reset/sync in suservo
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-13 13:00:54 +00:00
whitequark
248c1cf7dc
firmware: fix another TOCTTOU race in sync/async RPC code.
2018-11-13 00:58:20 +08:00
whitequark
68aad3e482
firmware: fix TOCTTOU race in sync/async RPC code.
...
Before this commit, the main loop in session code was laid like:
1. process_kern_queued_rpc
2. process_host_message
3. process_kern_message
If a host message (such as an RPC reply) caused the kernel to exit,
then any async RPCs would not complete, since RunFinished immediately
shuts down the kernel.
Fix this by reordering 1 and 2.
2018-11-13 00:57:09 +08:00
whitequark
dd829afebd
firmware: fix another TOCTTOU race in sync/async RPC code.
2018-11-12 15:42:07 +00:00
whitequark
583bba8777
Revert "firmware: workaround for RPC failures"
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This reverts commit 59033d2588
2018-11-12 15:36:36 +00:00
whitequark
0edae64afb
firmware: fix TOCTTOU race in sync/async RPC code.
...
Before this commit, the main loop in session code was laid like:
1. process_kern_queued_rpc
2. process_host_message
3. process_kern_message
If a host message (such as an RPC reply) caused the kernel to exit,
then any async RPCs would not complete, since RunFinished immediately
shuts down the kernel.
Fix this by reordering 1 and 2.
2018-11-12 15:30:59 +00:00
59033d2588
firmware: workaround for RPC failures
2018-11-12 19:51:54 +08:00
84a6b3d09b
runtime: fix DMA recording after now-pinning
2018-11-10 14:14:55 +08:00
a4997c56cf
ad9910: simplify edge detection logic
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 18:54:34 +00:00
14b6b63916
ad9910: rewire io_delay tuning
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This now reliably locates the SYNC_CLK-IO_UPDATE edge by doing two
scans at different delays between start and stop IO_UPDATE.
It also works well when one delay is very close to the edge.
And it correctly identifies which (start or stop) pulse hit or crossed
the SYNC_CLK edge.
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 18:38:27 +00:00
1f7858b80b
test/dsp: fix rtio_output
2018-11-09 22:11:44 +08:00
e509ab8553
test/dsp: use absolute import path
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Avoids "ImportError: attempted relative import with no known parent package"
when doing a simple "python -m unittest test_XXX.py".
2018-11-09 22:10:46 +08:00
38c6878d49
urukul: mention min/max attenuation
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 13:32:05 +01:00
e565ca6b82
urukul: slow down att write to datasheet limit
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 13:23:06 +01:00
998be50f07
urukul: handle MSB in att_reg
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 13:21:14 +01:00
c990b5e4f1
Merge remote-tracking branch 'origin/master' into new
2018-11-08 20:21:56 +08:00
a0cc7311ad
test: tighten test_pulse_rate
2018-11-08 20:17:55 +08:00
0bee43aa58
sawg: use new rtio_output() API
2018-11-08 20:16:30 +08:00
bec25cbaa0
suservo: use new rtio_output() API
2018-11-08 20:13:14 +08:00
e8d58b35b4
spi2: use new rtio_output() API
2018-11-08 20:12:30 +08:00
d18546550e
grabber: use new rtio_output() API
2018-11-08 19:15:50 +08:00
2549e623c1
ad9914: use new rtio_output() API
2018-11-08 19:15:44 +08:00
David Nadlinger
9740032a94
firmware: Fix dma_record_output_wide
2018-11-08 11:06:43 +00:00
f74dda639f
drtio: 8-bit address
2018-11-08 18:36:20 +08:00
8caea0e6d3
gateware,runtime: optimize RTIO kernel interface further
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* now pinning (TODO: atomicity)
* for inputs, merge request and timeout registers
2018-11-08 18:29:24 +08:00
fcb611d1d2
test_ad9910: don't expect large SYNC_IN delay margins
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sinara-hw/Urukul#16
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-07 18:18:35 +01:00
aadf5112b7
rtio: remove incorrect comment
2018-11-08 00:02:44 +08:00
fae95e73ad
ttl: use optimized rtio_output API
2018-11-07 23:41:43 +08:00
3d0c3cc1cf
gateware,runtime: optimize RTIO output interface
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* reduce address to 8 bits
* merge core, channel and address into 32-bit pre-computable "target"
* merge we register into data register
2018-11-07 23:39:58 +08:00
e6efe830c4
ad9910: rewire sync delay tuning
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* search from wide window end
* decouple margins and minimum window size
* add note about kasli jitter
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-07 14:52:03 +00:00
ad0254c17b
Merge branch 'switching125' into new
2018-11-07 22:03:18 +08:00
efd735a6ab
Revert "drtio: monitor RTIOClockMultiplier PLL ( #1155 )"
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This reverts commit 469a66db61
2018-11-07 22:01:03 +08:00
6c00ab57c0
test_ad9910: relax SYNC window
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 19:31:38 +01:00
172633c7da
test_ad9910: default to a useful seed
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 17:35:57 +01:00
0b2661a34d
ad9910: robustify SYNC window finding
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don't integrate too long, find the window tip fast and early
a couple 100 SYNC pulses are sufficient
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 12:41:21 +00:00
ba4bf6e59b
kasli: don't pass rtio pll feedback through bufg
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UG472: "The MMCM performance increases because the
feedback clock is not subjected to noise on the core supply since it
never passes through a block powered by this supply."
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 11:58:55 +00:00
b6e4961b0f
kasli: lower RTIO clock jitter
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* high bandwidth since the si5324 is good
* no low power ibufgds
* drop bufg between ibufgds and pll
* increase pll vco frequency to 1.5 GHz
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 11:43:19 +00:00
e17e458c58
ptb2: add sync to urukul0 for ad9910 usage
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 10:06:51 +00:00
73b7124091
test_ad9910: print sync scan for debugging
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 10:04:21 +01:00
9a3d81ffee
kasli: fix tester clk_sel
2018-11-06 14:49:21 +08:00
fb12df7e01
Revert "kasli_tester: urukul0 mmcx clock defunct"
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This reverts commit 68220c316d
2018-11-06 14:33:21 +08:00
31f68ddf6c
Merge branch 'urukul-sync'
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* urukul-sync: (29 commits)
urukul: flake8 [nfc]
ad9910: flake8 [nfc]
urukul/ad9910 test: remove unused import
test_urukul: relax speed
urukul,ad9910: print speed metrics
kasli: add PTB2 (external clock and SYNC)
kasli: add sync to LUH, HUB, Opticlock
kasli_tester: urukul0 mmcx clock defunct
test_ad9910: relax ifc mode read
tests: add Urukul-AD9910 HITL unittests including SYNC
ad9910: add init bit explanation
test: add Urukul CPLD HITL tests
ad9910: fiducial timestamp for tracking phase mode
ad9910: add phase modes
ad9910: fix pll timeout loop
tester: add urukul sync
ptb: back out urukul-sync
ad9910: add IO_UPDATE alignment and tuning
urukul: set up sync_in generator
ad9910: add io_update alignment measurement
...
close #1143
2018-11-05 19:54:30 +01:00
6fb18270a2
urukul: flake8 [nfc]
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:45:24 +01:00
832690af9a
ad9910: flake8 [nfc]
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:44:51 +01:00
6d525e2f9a
urukul/ad9910 test: remove unused import
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:40:57 +01:00
36c5a7cd04
test_urukul: relax speed
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works fine at < 3µs here but needs <5 µs on buildbot-kasli-tester
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:20 +01:00
89fecfab50
urukul,ad9910: print speed metrics
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:18 +01:00
32d538f72b
kasli: add PTB2 (external clock and SYNC)
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:16 +01:00
d8a5951a13
kasli: add sync to LUH, HUB, Opticlock
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for #1143 , also add missing LUH device db
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:14 +01:00
68220c316d
kasli_tester: urukul0 mmcx clock defunct
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:11 +01:00
89fadab63d
test_ad9910: relax ifc mode read
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:08 +01:00
f522e211ba
tests: add Urukul-AD9910 HITL unittests including SYNC
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for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:06 +01:00
9fb850ae75
ad9910: add init bit explanation
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:02 +01:00
bc04da15c5
test: add Urukul CPLD HITL tests
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for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:00 +01:00
141cc7d99f
ad9910: fiducial timestamp for tracking phase mode
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:58 +01:00
2f6d3f79ff
ad9910: add phase modes
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* simplified and cross-referenced the explanation of the different
phase modes.
* semantically and functionally merged absolute and tracking/coherent
phase modes.
* simplified numerics to calculate phase correction
* added warning about possible inconsistency with DMA and default
phase mode
* restricted __all__ imports
* moved continuous/relative phase offset tracking from an instance
variable to a "handle" returned by set()/set_mu() in order to avoid
state inconsistency with DMA (#1113 #1115 )
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:55 +01:00
d3ad2b7633
ad9910: fix pll timeout loop
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:53 +01:00
4269d5ad5c
tester: add urukul sync
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:52 +01:00
60d3bc63a7
ptb: back out urukul-sync
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... for backwards compatibility.
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:50 +01:00
06139c0f4d
ad9910: add IO_UPDATE alignment and tuning
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for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:48 +01:00
1066430fa8
urukul: set up sync_in generator
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:46 +01:00
4bbd833cfe
ad9910: add io_update alignment measurement
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for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:44 +01:00
7b92282012
ad9910: add docs for sync tuning, refactor
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:42 +01:00
8a47a6b2fb
ad9910: disable sync_clk output
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:40 +01:00
65e2ebf960
ad9910: add sync delay control, auto tuning
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* expose multi device sync functionality
* sync delay configuration interface
* auto-tuning of sync delay from device_db seed
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:37 +01:00
8dbf5f87fd
ad9910: simplify io_update pulsing on init, set_mu
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:35 +01:00
0b3b07a7da
ad9910: add power down method
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:34 +01:00
3538444876
urukul: add sync_in to eem0-7 name
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:32 +01:00
0433e8f4fe
urukul: add sync_in generator
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for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:30 +01:00
f62c1ff0bb
TTLClockGen: expose acc_width
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:27 +01:00
f755a4682a
device_db_ptb: fix zotino clr
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:24 +01:00
David Nadlinger
f79b9d9e1e
ttl: Expand input gate/count API docstrings
2018-11-03 20:33:19 +08:00
David Nadlinger
f02ceee626
language: Clarify now_mu() docstring [nfc]
2018-11-03 20:33:19 +08:00
David Nadlinger
5d2e3f975f
coredevice: Add get_rtio_counter_mu() docstring [nfc]
2018-11-03 20:33:19 +08:00
David Nadlinger
d6fcc0529f
coredevice: Imperative mood in docstrings [nfc]
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This follows Python conventions (PEP257) and unifies the style with
other comments.
2018-11-03 20:33:19 +08:00
David Nadlinger
cbdef0225c
ttl: Add target RTIO time argument to timestamp/count functions
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Software-based tracking of timestamps is problematic (e.g. when
using DMA, see GitHub #1113 ).
2018-11-03 20:33:19 +08:00
David Nadlinger
2a0e1dabfb
ttl: Remove unused attribute [nfc]
2018-11-03 20:33:19 +08:00
David Nadlinger
17a5fb2dce
ttl: Remove error-prone sync() calls
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These methods are problematic, as with DMA in the picture, the
timestamp member variables did not necessarily reflect the last
submitted event timestamp (see GitHub #1113 ).
sync() is only very rarely used in typical experimental code, so
the methods are removed without a transition period.
Core.wait_until() can be used to busy-wait for a specified RTIO
timestamp value on the core device CPU instead.
2018-11-03 20:33:19 +08:00
David Nadlinger
11e8c9d5f7
coredevice: Add Core.wait_until_mu()
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(This supersedes TTLOut.sync(), see see GitHub #1113.)
2018-11-03 20:33:19 +08:00
David Nadlinger
cbfbe24d7a
ttl: Remove broken TTLClockGen.sync
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The code currently doesn't compile because of a typo in the timestamp
field name. However, tracking event timestamps in software is
problematic anyway (e.g. with DMA, see GitHub #1113 ), so just remove
`sync()` altogether.
2018-11-03 20:33:19 +08:00
bc4a8157c0
kasli: add tsinghua2
2018-11-01 18:26:37 +08:00
89a961fb00
urukul, ad9912, ad9910: expose CFG RF switch better
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* conincident setting of multiple switches
* per channel setting
2018-10-24 13:04:46 +02:00
48a142ed63
use FutureWarning instead of DeprecationWarning
...
DeprecationWarning is disabled by default and too easy to ignore.
2018-10-21 12:14:51 +08:00
9793632282
enviromnment: rename 'save' in set_dataset to 'archive'. Closes #1171
2018-10-21 12:08:34 +08:00
Marius Weber
029f9d983a
Tpz fixes ( #1178 )
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* flake8
* fix TPZ constructor after move to asyncio
* Tcube fix docummentation in set_channel_enable_state
2018-10-20 20:49:15 +08:00
c52a6ca8e9
typo ( #1179 )
2018-10-20 20:40:07 +08:00
Florent Kermarrec
3318925f4e
firmware/liboard_misoc/sdram: use similar loops on read_level_scan and read_level for consistent results
2018-10-16 09:40:39 +02:00
6357a50d33
kasli: update nudt variant
2018-10-15 18:04:57 +08:00
David Nadlinger
e3cfbfed06
master: Add minimal docstring to worker_impl [nfc]
2018-10-14 10:41:32 +08:00
David Nadlinger
64b9a377da
master: Factor RIDCounter out into own module, explain worker_db module [nfc]
...
The docstrings are quite minimal still, but should already
help with navigating the different layers when getting
accustomed with the code base.
RIDCounter was moved to its own module, as it isn't really
related to the other classes (used from master only).
2018-10-14 10:41:32 +08:00
David Nadlinger
4641ddf002
master: Remove unused import [nfc]
2018-10-14 10:41:32 +08:00
661dd00c4c
ad9912: phase offset is 14 bit LSB aligned
...
c.f. sinara-hw/Urukul#15
2018-10-11 15:16:08 +02:00
hartytp
08074d5275
Urukul: add support for hardware v1.3 clocking options
2018-10-10 09:26:35 +02:00
469a66db61
drtio: monitor RTIOClockMultiplier PLL ( #1155 )
...
Debugging by Tom Harty
2018-10-08 14:50:02 +02:00
hartytp
1a1b454ed9
Urukul: flake8 (NFC)
2018-10-08 10:09:49 +01:00
5de319d76a
bit2bin: don't print string terminator
2018-10-08 10:13:03 +02:00
hartytp
9a509e5070
Zotino: increase delay after register read in init method to avoid underflows
2018-10-06 21:45:17 +08:00
86fe6b0594
kasli: add NUDT variant
2018-10-04 23:20:09 +08:00
a89bd6b684
kasli: swap Urukul EEMs for Tester
...
Updated to Urukul 1.3.
2018-10-04 23:19:31 +08:00
9f96b6bcda
kasli: use 125MHz DRTIO freq for testing
2018-10-04 10:41:01 +08:00
969a305c5a
Merge branch 'master' into switching125
2018-10-04 10:08:42 +08:00
d0ee2c2955
opticlock: external 100 MHz
2018-09-28 19:05:18 +02:00
3b3fddb5a4
kasli: add mitll2
2018-09-27 23:21:52 +08:00
998a468983
examples: add grabber to device databases
2018-09-27 16:09:25 +08:00
c71e442929
documentation improvements
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Based on PR #1101 by @drewrisinger
2018-09-26 12:12:37 +08:00
b92350b0f6
drtio: monitor RTIOClockMultiplier PLL ( #1155 )
...
Debugging by Tom Harty
2018-09-26 10:52:08 +08:00
53c7a5f2c6
dashboard: fix TTL moninj level display
2018-09-26 10:32:08 +08:00
212892d92f
style
2018-09-26 10:13:33 +08:00
20cddb6a25
tester: handle no available ttl outputs
2018-09-24 09:19:28 +00:00
73f0de7c79
sayma: DRTIO master fixes
2018-09-20 11:15:45 +08:00
1b7f403a4b
drtio: remove remote RTIO PHY resets
2018-09-20 11:10:32 +08:00
53a979e74d
rtio: cleanup resets
2018-09-20 10:58:38 +08:00
251d90c3d5
drtio: clear read request in satellite only after reply has been fully sent
...
Otherwise, chan_sel become invalid before the end of the packet, which
can cause the interconnect to invalidate i_timestamp and i_data which results
in corruption of the end of the packet.
2018-09-20 08:53:45 +08:00
69d060b639
drtio: fix satellite i_status handling
2018-09-19 20:57:21 +08:00
b86b6dcc09
drtio: add switching input test
2018-09-19 17:50:29 +08:00
08be176369
drtio: fix satellite i_status handling
2018-09-19 17:50:18 +08:00
3d965910f7
Revert "drtio: implement per-destination underflow margins"
...
This reverts commit 142c952e3d
2018-09-19 17:05:48 +08:00
142c952e3d
drtio: implement per-destination underflow margins
2018-09-19 17:03:15 +08:00
62642957cd
runtime: fix DRTIO aux channel race condition
2018-09-19 11:16:21 +08:00
David Nadlinger
b482f5feae
firmware: Use larger ARP cache
...
This works around a problematic interaction between ARP cache
expiry in smoltcp (with its 3 seconds timeout before a discovery
request is sent) and our TCP keepalive settings, where the timeout
is reached before the keepalive had a chance to be sent.
GitHub: Closes #1150 .
2018-09-18 14:46:52 +00:00
970d1bf147
drtio: add switching unittest
2018-09-18 15:27:52 +08:00
eda15a596c
drtio: add buffering to repeater
2018-09-18 15:27:25 +08:00
2b44786f73
drtio: add repeater input support
2018-09-17 23:45:27 +08:00
whitequark
c33f74dabe
firmware: derive Clone for Mutex.
2018-09-15 15:24:44 +00:00
c8cd830118
drtio: implement get_rtio_destination_status for kernels
2018-09-15 19:11:22 +08:00
f7ad7a99e3
firmware: set DEST_COUNT to 0 without routing
2018-09-15 19:10:52 +08:00
3cbdf2fbac
kasli: cleanup drtio blink example
2018-09-15 18:43:27 +08:00
d38755feff
drtio: implement destination state checks on operations
2018-09-15 15:55:45 +08:00
whitequark
1990ab35d3
firmware: implement mutexes.
2018-09-15 07:35:35 +00:00
cd61ee858c
kasli: fix satellite TSC instantiation
2018-09-15 14:06:54 +08:00
7565d816e4
frontend: remove artiq_pcap. Closes #1152
2018-09-15 12:09:37 +08:00
eaeab0c9bd
frontend: add artiq_rtiomon
2018-09-15 12:09:32 +08:00
c0c413196a
frontend: remove artiq_pcap. Closes #1152
2018-09-15 12:08:06 +08:00
f097b4104c
satman: not(has_drtio_routing) fixes
2018-09-15 12:06:47 +08:00
0017cb756e
frontend: add artiq_rtiomon
2018-09-15 10:44:59 +08:00
2f010e0109
runtime: improve moninj aux error logging
2018-09-15 10:44:41 +08:00
20ed393c1e
style
2018-09-15 10:43:50 +08:00
f8c6fa5ad6
typo
2018-09-15 10:43:36 +08:00
65da1fee4a
firmware: fix build without DRTIO
2018-09-14 20:38:41 +08:00
d19550daf8
firmware: simplify drtioaux function names
2018-09-14 20:32:09 +08:00
ae72e3a51e
firmware: add support for moninj and kern_hwreq over DRTIO switching
2018-09-14 20:26:39 +08:00
1ef39a98a7
drtio: implement per-destination buffer space
2018-09-13 16:16:32 +08:00
e95638e0a7
style
2018-09-13 15:54:28 +08:00
042b0065de
runtime: print destination up message for local RTIO
2018-09-13 14:10:52 +08:00
fa872c3341
firmware: implement DRTIO destination survey
2018-09-13 12:00:29 +08:00
6cf3db3485
satman: forward RTIO resets
2018-09-12 23:02:54 +08:00
5a9cc004f2
drtio: receive and print unsolicited aux packets
...
Helps with debugging and prevents the aux channel from getting stuck after packets arrive after the timeout.
2018-09-12 22:57:21 +08:00
0befec7d26
drtio: improve repeater error reports
2018-09-12 20:54:01 +08:00
420e1cb1d0
cri: fix firmware routing table access
2018-09-12 18:08:16 +08:00
e36a8536d7
runtime: better handling of aux timeouts
2018-09-12 17:31:23 +08:00
5bcd40ff59
cri: fix routing table depth
2018-09-12 17:30:55 +08:00
edf403b837
drtio: improve error reporting
2018-09-12 15:44:34 +08:00
95432a4ac1
drtio: remove old debugging features
2018-09-12 13:01:27 +08:00
8227037a84
examples: add kasli_drtioswitching
2018-09-11 22:20:18 +08:00
41972d6773
drtio: rt_packet_satellite CRI fixes
2018-09-11 22:19:55 +08:00
051bafbfd9
drtio: ensure 2 cycles between frames on the link
...
This gives time for setting chan_sel before cmd on CRI.
2018-09-11 22:18:42 +08:00
251b9a2b0d
drtio: do not lock up master when satellite repeatedly fails to answer buffer space reqs
2018-09-11 22:17:57 +08:00
5439abaa9d
satman: fix error messages
2018-09-11 20:10:52 +08:00
36e3fedfc6
runtime: print routing table at boot
2018-09-11 20:10:33 +08:00
e6bd835b5d
satman: fix rank setting
2018-09-11 20:04:51 +08:00
2679a35082
firwmare: propagate DRTIO routing table and rank all the way
2018-09-11 18:28:17 +08:00
c0c5867f9e
satman: increase stack size
...
Prevents crashing when running the routing code.
Will have to be shrunk back on Sayma RTM.
2018-09-11 18:23:51 +08:00
a23af67f2b
satman: print better debugging information on exception
2018-09-11 18:23:36 +08:00
f5b386c0d8
firmware: fix routing table formatting
2018-09-11 18:22:45 +08:00
b38c57d73b
firmware: send DRTIO routing table to satellite
2018-09-11 14:12:41 +08:00
3d29a7ed14
firmware: add fmt::Display to RoutingTable
2018-09-11 11:27:56 +08:00
2fff96802b
runtime: remove support for building without RTIO
2018-09-10 23:09:02 +08:00
19a14b68b1
runtime: program DRTIO routing table into gateware
2018-09-10 22:48:56 +08:00
264078baba
style
2018-09-10 22:29:35 +08:00
e01efbcb8a
runtime: merge sync_tsc and wait_tsc_ack
2018-09-10 22:17:00 +08:00
4d889c0c4e
firmware: improve DRTIO log messages
2018-09-10 21:40:02 +08:00
663432adbd
satman: load TSCs of downstream devices
2018-09-10 20:34:33 +08:00
bc1d3fda6a
satman: ping repeater links
...
Tested OK on hardware.
2018-09-10 20:17:13 +08:00
31bef9918e
firmware: fix drtio_routing compatibility with master and satellite
2018-09-10 20:16:42 +08:00
7ec45efdcf
kasli: add missing cri_con to Satellite
2018-09-10 20:16:09 +08:00
014cfd8dbd
firmware: add drtioaux routing packets
2018-09-09 22:44:25 +08:00
7ae44f3417
firmware: add routing table (WIP)
2018-09-09 21:49:28 +08:00
496d1b08fd
kasli: enable routing in Master
2018-09-09 21:48:12 +08:00
ec302747e0
kasli: add DRTIO repeaters
2018-09-09 16:27:39 +08:00
d5577ec0d0
cri: add routing table support
2018-09-09 16:26:48 +08:00
df61b85988
drtio: fix imports
2018-09-09 14:11:32 +08:00
312256a18d
grabber: fix frame size off-by-1
2018-09-07 16:55:43 +02:00
ec62eb9373
drtio: minor cleanup
2018-09-07 17:51:38 +08:00
4d73fb5bc9
grabber: only advance when DVAL
2018-09-06 11:01:08 +02:00
87e0384e97
drtio: separate aux controller
...
This helps with managing CSR groups and heterogeneous (satellite/repeaters) DRTIO cores.
2018-09-05 17:56:58 +08:00
92be9324df
add missing files
2018-09-05 16:09:02 +08:00
2884d595b3
drtio: add rt_controller_repeater
2018-09-05 16:08:40 +08:00
839f748a1d
drtio: add external TSC to repeater
2018-09-05 15:55:20 +08:00
5f20d79408
drtio: add timeout on satellite internal CRI buffer space request
2018-09-05 14:12:11 +08:00
1450e17a73
sayma: adapt to TSC and DRTIOSatellite changes
2018-09-05 12:10:41 +08:00
19ae9ac1b1
kc705: adapt to TSC changes
2018-09-05 12:07:28 +08:00
3d531cc923
kasli: adapt to TSC and DRTIOSatellite changes
2018-09-05 12:06:47 +08:00
4e4398afa6
analyzer: adapt to TSC changes
2018-09-05 12:06:20 +08:00
15b16695c6
frontend: add artiq_route
2018-09-04 19:04:27 +08:00
bf36786d45
kasli_tester: clean up grabber test
2018-09-04 10:59:19 +00:00
47eb37e212
VLBAI{Master,Slave}: align rtio channels with PTB
2018-09-04 10:39:45 +00:00
778f1de121
drtio: add TSC sync and missed command detection to rt_packet_repeater
2018-09-03 18:26:13 +08:00
hartytp
c55460f59f
suservo: fix doc typo
2018-09-03 11:48:40 +02:00
00fabee1ca
drtio: fix rt_packet_repeater timeout
2018-09-03 09:57:15 +08:00
f3fe818049
rtio: refactor TSC to allow sharing between cores
2018-09-03 09:48:12 +08:00
0fe2a6801e
drtio: forward destination with channel
2018-09-02 15:50:23 +08:00
6768dbab6c
drtio: add buffer space support to rt_packet_repeater
2018-09-02 14:38:37 +08:00
88b7529d09
drtio: share CDC
2018-09-02 14:37:29 +08:00
078c862618
drtio: add repeater (WIP, write only)
2018-09-01 21:07:55 +08:00
6057cb797c
drtio: reorganize tests
2018-08-31 16:28:33 +08:00
4f963e1e11
drtio: minor cleanup
2018-08-30 15:15:32 +08:00
ce6e390d5f
drtio: expose internal satellite CRI
2018-08-30 12:41:09 +08:00
e7dba34475
kasli/tester: fill all 12 EEM
2018-08-29 18:09:09 +00:00
b58ec2d78e
artiq_flash: treat all variants ending in satellite as such
2018-08-29 17:53:48 +00:00
fbf05db5ab
kasli: add VLBAI Master and Satellite
2018-08-29 17:53:48 +00:00
9584c30a1f
kasli: DRTIO Base: flexible rtio_clk_freq
2018-08-29 17:53:48 +00:00
eb9e9634df
siphaser: support 125 MHz rtio clk
...
keep the phase shift increment/decrement at 1/(56*8) rtio_clk
cycles
2018-08-29 17:53:48 +00:00
ccc58a0f84
satman: add 125 MHz Si5324 settings
...
from cjbe
2018-08-29 17:53:48 +00:00
aa64e6c1c6
cri: add buffer space request protocol
2018-08-29 15:16:43 +08:00
ba6094c3e5
test: relax network transfer rates
...
Due to lower Kasli system clock frequency.
2018-08-27 16:47:48 +08:00
whitequark
0e7419450e
firmware: update smoltcp.
...
This adds TCP window scaling support.
2018-08-20 00:26:40 +00:00
9b6ea47b7a
kasli: use SFP LEDs to show DRTIO link status. Closes #1073
2018-08-19 13:04:41 +08:00
d1d26e2aa3
hmc7043: add explanation about HMC_SYSREF_DIV
2018-08-18 11:43:40 +08:00
f75a317446
hmc7043: automatically determine output groups
2018-08-18 11:43:23 +08:00
c498b28f88
hmc7043: disable FPGA_ADC_SYSREF
2018-08-18 11:42:57 +08:00
a7810502f6
artiq_coremgmt: add option to specify core device address directly
2018-08-18 10:58:40 +08:00
fc09144baa
artiq_coremgmt: remove unnecessary DeviceManager
2018-08-18 10:46:08 +08:00
167e97efd2
sayma: support external RTM clocking
2018-08-17 22:57:54 +08:00
041dc0f64a
jesd204: update core to v0.10
...
Closes #727
Closes #1127
2018-08-17 22:50:07 +08:00
5c3e834c4d
ad9154: retry DAC initialization on STPL or PRBS failure
...
Works around #1127
2018-08-17 20:52:55 +08:00
66e33a66d6
test: enable TTL loopback tests on Kasli
2018-08-17 13:35:55 +08:00
d707d2f4fe
test: relax TTL timing requirements to support DIO EEM
2018-08-17 13:35:16 +08:00
1ba12e1cdb
gui/log: print messages in tooltips
...
This helps reading long messages in small log windows.
2018-08-17 13:21:38 +08:00
David Nadlinger
2463e5667d
compiler: Fix attribute writeback with skipped fields
...
offset wasn't advanced for skipped fields previously,
leading to memory corruption/unaligned accesses at runtime.
2018-08-14 13:34:32 +01:00
c172ec6de9
artiq_flash: target Kasli by default
2018-08-13 12:13:21 +08:00
David Nadlinger
0e32a165c2
satman: Fix build with Rust 1.28
...
The build was broken in 2648b1b7a1
2018-08-13 00:12:27 +01:00
whitequark
e285fe0d56
test: tighten required TransferTest timings.
...
smoltcp performs significantly better with LTO.
2018-08-12 20:17:37 +00:00
whitequark
46bd96abd1
artiq_devtool: make kasli-tester the default configuration.
2018-08-12 19:17:45 +00:00
whitequark
38d60100ff
firmware: optimize dma_record_output.
...
This removes a number of bounds checks and adds a fast path for
outputting exactly one word to DMA, which is the most common
operation.
2018-08-12 19:17:45 +00:00
whitequark
bdd18de2c1
firmware: globally enable LTO.
...
This used to crash with earlier rustc versions, but doesn't anymore,
and gives significant speedup (e.g. 2x on test_dma_record_time).
2018-08-12 19:17:45 +00:00
whitequark
2648b1b7a1
firmware: migrate to Rust 1.28.0.
...
This also updates / is a prerequisite for updating smoltcp.
Rationale for changes made:
* compiler_builtins is now shipped in the rust prefix.
* rustc's libpanic_unwind no longer works for us because it
has a hard dependency on Box (and it's a horrible hack);
fortunately, we only ever needed a personality function
from it.
* panic and oom handlers are now set in a completely different
way.
* allocators are quite different (and finally stable).
* NLL caused internal compiler errors in runtime, so code using
NLL was rewritten to not rely on it and it was turned off.
2018-08-12 19:17:45 +00:00
738d2c6bcb
hmc7043: REFSYNCIN → RFSYNCIN
2018-08-11 12:07:17 +08:00
bc3e715a8f
examples: fix kasli_tester
2018-08-11 10:51:42 +08:00
whitequark
fab6e5cdff
compiler: skip functional values in attribute writeback.
...
Fixes #1088 .
2018-08-10 12:02:49 +00:00
052e400f12
test: skip test_dma_playback_time on Kasli ( #946 )
2018-08-09 18:08:21 +08:00
957645a7e7
examples: move kasli tester out of kasli_basic
2018-08-09 18:07:44 +08:00
bbc98410e4
test: dds → ad9914dds
...
Prevent confusion with Urukul.
2018-08-09 16:55:09 +08:00
bf78e0c7d2
test: fix handling of missing devices
2018-08-09 16:51:12 +08:00
a061ba2505
grabber/kasli_basic: add grabber test
...
close #1121
2018-08-08 12:43:44 +02:00
f7678cc24a
grabber: refactor state machine
2018-08-07 18:07:46 +02:00
6cd2432e30
grabber: log all resolution changes
...
close #1120
2018-08-07 16:21:21 +02:00
99a15ca0c6
grabber: rationalize derived traits
2018-08-07 16:21:21 +02:00
49f7a1610f
sayma: use GTP_CLK1 only for all variants ( #1080 )
2018-08-07 20:53:14 +08:00
e2a49ce368
drtio: support external IBUFDS_GTE3
2018-08-07 20:52:45 +08:00
8b8e1844f0
kasli_sawgmaster: roughly match Urukul and Sayma amplitudes
2018-08-07 20:07:21 +08:00
9ce6233926
kasli: fix SYSU TTL directions
2018-08-07 19:29:28 +08:00
8aa88cfe70
kasli_sawgmaster: add Urukul-Sayma example
2018-08-07 19:29:28 +08:00
474bc7b65b
browser: handle windows file urls for feeding h5py
...
close #1014
2018-08-07 12:57:01 +02:00
whitequark
93af5d2a03
compiler: handle async RPC as last statement in try block.
...
Fixes #1107 .
2018-08-07 07:06:53 +00:00
whitequark
7bd7b6592a
rpc_proto: serialize keywords correctly.
...
Fixes #1109 .
2018-08-07 06:47:09 +00:00
whitequark
259f1576c3
Fix tests after a74958f0.
2018-08-07 06:06:49 +00:00
whitequark
a74958f01f
ksupport: raise RuntimeError on reraise with no inflight exception.
...
Fixes #1123 .
2018-08-07 05:53:13 +00:00
2008d02f4d
runtime: use different default IP and MAC for different kinds of boards
...
This helps reduce conflicts when having many boards on a development network.
2018-08-07 10:30:50 +08:00
bbe36b94f7
ad9154: enable sync in init
2018-08-06 19:02:27 +08:00
7f0b2ff594
jesd204sync: work around HMC7043 poor behavior with combined delays
...
The HMC7043 outputs poorly controlled signals when adjusting
two delays at once. This commit puts the DAC in one-shot SYSREF mode,
and only triggers synchronizations when SYSREF is stable.
2018-08-06 17:43:17 +08:00
f32f0126e2
Revert "ad9154: use continuous sync mode"
...
The HMC7043 is not really glitchless.
This reverts commit bd968211de
2018-08-06 16:59:53 +08:00
65f198bdee
kasli: use tester EEMs for DRTIO, add Urukul-Sayma sync example
2018-08-06 16:53:13 +08:00
bd968211de
ad9154: use continuous sync mode
2018-08-06 00:27:10 +08:00
b023865b42
sayma: instantiate dummy IBUFDS_GTE3 on unused but driven Si5324 clock pins
...
Solve same problem as e83ee3a0
2018-08-05 23:02:41 +08:00
e83ee3a07a
hmc7043: disable GTP_CLK1 when not in use
...
Termination and biasing are not active at the FPGA when IBUFDS_GTE3 is
not instantiated, and driving a clock then leads to overvoltage.
2018-08-03 10:03:52 +08:00
6fc8439399
tweak moninj to allow old dashboard with new firmware
2018-08-02 19:34:14 +08:00
04cbc3237b
test_moninj: test injection monitoring
2018-08-02 19:34:14 +08:00
47740c8930
share moninj injection state between dashboards
...
Previously if one dashboard overrode a channel this was not visible on
any other dashboard - the channel appeared to operate normally.
2018-08-02 19:34:14 +08:00
7d6a1b528d
ad9912: add ftw_to_frequency
2018-08-02 11:19:12 +00:00
e518a1f1d0
ad53xx: also increase slack after control readback
2018-08-02 11:19:12 +00:00
whitequark
5871d13da8
firmware: actually compact in config::compact().
...
Fixes #1116 .
2018-08-01 16:27:48 +00:00
David Nadlinger
829fca6112
pyon: Correctly deserialize bare NaNs
...
This also fixes (non-numpy) lists containing NaNs.
Previously, accidentally storing a NaN in a dataset would
bring down large parts of the system.
2018-07-30 11:08:56 +01:00
David Nadlinger
08ee91beb2
ad9910: Clarify chip_select range [nfc]
...
`assert 3 <= chip_select <= 7` is rather opaque without looking
at the CPLD source code otherwise.
2018-07-30 11:08:17 +01:00
David Nadlinger
6b89106578
ad53xx: Avoid sporadic RTIOUnderflow in init()
...
I observed sporadic RTIO underflows on Kasli before, by ~2.5 µs,
so 5 µs extra slack should be plenty. No underflows since.
2018-07-28 23:45:48 +01:00
e4d48a78eb
drtio: wait for remote to ack TSC synchronization
...
Sayma takes a long time after TSC sync to align SYSREF, and this caused two issues:
1. Aux packets getting lost and causing error reports
2. DRTIO links reported up and kernels proceeding despite the DACs not being properly synced.
2018-07-26 20:28:17 +08:00
83de8b2ba2
drtio: add ping timeout during link init
2018-07-26 20:27:53 +08:00
446f791180
firmware: simplify SYSREF DRTIO alignment
2018-07-26 19:37:59 +08:00
f8c17528e7
satman: use new SYSREF code
2018-07-26 16:26:57 +08:00
32c95ac034
sayma: automated DAC SYSREF phase calibration
2018-07-26 16:23:55 +08:00
dbcf2fe9b4
firmware: remove 'chip found' messages on Sayma
2018-07-26 16:07:37 +08:00
d523d03f71
sayma: automated FPGA SYSREF phase offset calibration
2018-07-26 14:53:28 +08:00
0a9d3638ee
config: add write_int
2018-07-26 14:49:32 +08:00
19c51c644e
grabber: cleanup GRABBER_STATE
2018-07-24 19:08:51 +08:00
fb96c1140e
grabber: add coredevice driver
2018-07-24 18:06:44 +08:00
b38c685857
grabber: fix pix.stb
2018-07-24 11:32:32 +08:00
60a7e0e40d
grabber: use usual order of ROI coordinates in cfg addresses
2018-07-24 10:55:13 +08:00
7b75026391
grabber: add MultiReg to transfer ROI boundaries
2018-07-21 13:40:12 +08:00
4a4d0f8e51
grabber: fix missing variable rename
2018-07-21 13:39:46 +08:00
3638a966e1
kasli: add false path between RTIO and CL clocks
2018-07-21 13:26:13 +08:00
031de58d21
grabber: complete RTIO PHY, untested
2018-07-21 13:25:47 +08:00
e3ba4b9516
grabber: minor ROI engine cleanup, export count_len, cap count width to 31
2018-07-21 13:25:13 +08:00
cab0ba408d
fmcdio_vhdci_eem: cleanup and document
2018-07-20 09:57:03 +08:00
d152506ecb
sayma: update fmcdio_vhdci_eem demo
2018-07-19 15:47:20 +08:00
8dfcd463aa
fmcdio_vhdci_eem: naming consistency
2018-07-19 15:46:04 +08:00
fe93a454d6
fmcdio_vhdci_eem: fix direction shift register permutation and polarity
2018-07-19 15:16:21 +08:00
e71cbe53a6
firmware: cleanup Cargo.lock
2018-07-18 10:37:43 +08:00
31f4f8792a
sayma: add Urukul and Zotino to example device_db
2018-07-18 10:31:55 +08:00
25170a53e5
sayma: add back Urukul and Zotino
2018-07-18 10:27:54 +08:00
5e62910a8d
examples: add Sayma VHDCI DIO
2018-07-17 23:28:05 +08:00
8b9a8be12a
fmcdio_vhdci_eem: add dirctl word computation functions
2018-07-17 23:27:29 +08:00
82145b1263
examples: sayma_drtio → sayma_masterdac
2018-07-17 20:32:30 +08:00
7fe76426fe
fmcdio_vhdci_eem: commit missing part of previous commit
2018-07-17 20:30:13 +08:00
d4d12e264d
fmcdio_vhdci_eem: refactor
...
This allows access to the pin allocation from kernels, which becomes useful
to configure the direction shift register.
2018-07-17 20:13:59 +08:00
4fdc20bb11
sayma: disable Urukul and Zotino for now
...
Ultrascale I/Os are being a pain as usual and the SPI core won't compile.
2018-07-17 20:08:21 +08:00
8335085fd6
fmcdio_vhdci_eem: fix cc pins
2018-07-17 19:50:34 +08:00
8f7c0c1646
fmcdio_vhdci_eem: fix iostandard
2018-07-17 19:40:34 +08:00
d724bd980c
sayma: add EEMs to Master
2018-07-17 18:58:23 +08:00
a0f2d8c2ea
gateware: add FMCDIO/EEM adapter definitions
2018-07-17 18:58:16 +08:00
3645a6424e
sayma: fix Master build
2018-07-17 18:56:33 +08:00
9b016dcd6d
eem: support specifying I/O standard
...
Xilinx FPGAs require different LVDS I/O standard names depending on I/O bank voltage.
2018-07-17 18:55:17 +08:00
3168b193e6
kc705: remove Zotino and Urukul
...
* use Kasli instead for using EEMs
* code required outdated VHDCI adapter 1.0
2018-07-17 17:48:57 +08:00
13984385a8
firmware: version → ident
2018-07-15 17:40:17 +08:00
b2695d03ed
sayma: remove with_sawg from Master variant
2018-07-15 17:38:29 +08:00
123e7bc054
pyon: sort string dicts by key when pretty-printing. Closes #1010
2018-07-15 17:38:09 +08:00
b27fa8964b
add variant in identifier string
...
Also add without-sawg suffixes on Sayma.
Closes #1060
Closes #1059
2018-07-15 17:21:17 +08:00
b6c70b3cb0
eem: add Zotino monitoring. Closes #1095
2018-07-15 15:35:04 +08:00
8bcba82b65
grabber: reset *_good signals on end of frame
...
This reduces the amount of time the ROI engine produces invalid output after
being reconfigured.
2018-07-15 15:34:00 +08:00
ea7f925852
Revert "worker_db: Only warn on repeated archive read if dataset changed"
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Breaks numpy arrays.
This reverts commit 141fcaaa8a
2018-07-13 10:41:06 +08:00
46fb5adac3
grabber: fix frequency counter formula
2018-07-12 20:14:38 +08:00
82def6b535
grabber: add frequency counter
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Cameras are a bit obscure about what they output, this can help with troubleshooting.
2018-07-12 17:05:18 +08:00
29c35ee553
hmc7043: fix dumb mistake in previous commit
2018-07-12 13:01:41 +08:00
8802b930de
hmc7043: add delay after init
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Delay required at step 9 of the "Typical Programming Sequence" (page 24 of the datasheet)
2018-07-12 12:37:12 +08:00
c66f9483f8
hmc7043: wait after changing delays
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Allows for the SPI transaction to finish, and for the delay to stabilize.
2018-07-12 12:33:53 +08:00
1c191a62bf
sayma: tune SYSREF phases
2018-07-12 12:33:35 +08:00
773240bef4
hmc7043: test GPO before using
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Based on code by David.
2018-07-12 11:30:24 +08:00
David Nadligner
141fcaaa8a
worker_db: Only warn on repeated archive read if dataset changed
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In larger experiments, it is quite natural for the same dataset
to be read from multiple unrelated components. The only situation
where multiple reads from an archived dataset are problematic is
when the valeu actually changes between reads. Hence, this commit
restricts the warning to the latter situation.
2018-07-12 10:15:42 +08:00
4843832329
hmc7043: check phase status on init. Closes #1055
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Troubleshooting by David.
2018-07-11 19:45:24 +08:00
9397fa7f5a
hmc7043: unstick SYSREF FSM ( #1055 )
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Troubleshooting by David.
Additionally, register 7D is broken.
Checking phase init state has to be done through another means.
2018-07-11 19:11:01 +08:00
88fb9ce4d6
sayma_rtm: add hmc7043_gpo monitoring
2018-07-11 19:04:29 +08:00
29e5c95afa
sayma_rtm: minor cleanup
2018-07-11 19:02:59 +08:00
7f05e0c121
sayma_rtm: remove UART loopback
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RTM power supply issues are fixed now, plus this will get in the way of satman support.
2018-07-11 19:00:18 +08:00
f8ceea20d0
grabber: add new ROI engine (untested)
2018-07-10 17:06:17 +08:00
d82beee540
grabber: make parser EOP a pulse
2018-07-10 17:04:07 +08:00
701c93d46c
grabber: add false path constraints
2018-07-10 14:28:23 +08:00
6a77032fa5
grabber: use BUFR/BUFIO
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Less jitter and frees up BUFGs.
2018-07-10 13:30:38 +08:00
208dc7c218
grabber: prevent glitches in last_x/last_y cdc
2018-07-10 12:56:37 +08:00
c4e3c66265
grabber: add clock constraint
2018-07-10 12:37:32 +08:00
David Nadlinger
768b970deb
Fixup 4359a437 (tuples of lists), add regression tests
2018-07-10 01:18:51 +01:00
David Nadlinger
edc314524c
test_embedding: Remove unused reference to led device
2018-07-10 01:11:47 +01:00
4f56710e4b
grabber: add parser, report detected frame size in core device log
2018-07-10 02:06:37 +08:00
David Nadlinger
4359a43732
compiler: Indirection status of TTuple depends on elements
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For instance, TTuple(TList(TInt32())) has indirections, while
TTuple(TInt32()) does not.
This fixes memory corruption with RPCs that return tuples of lists.
Signed-off-by: David Nadlinger <code@klickverbot.at>
2018-07-09 18:49:50 +08:00
d2c8e62cb7
test_rtio: relax ClockGeneratorLoopback performance requirements
2018-07-09 18:07:25 +08:00
423929a125
test: relax min transfer rates from 2MB/s to 1.9MB/s
2018-07-09 18:00:24 +08:00
9153c4d8a3
use tokenize.open() to open Python source files
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Fixes encoding issues especially with device databases modified in obscure editors.
2018-07-07 17:04:56 +08:00
4420046502
kasli_tester: support mixed AD9910/AD9912 systems
2018-07-06 15:43:38 +08:00
ac3f360c26
kasli_tester: fix AD9912 support
2018-07-06 15:43:25 +08:00
509562ddbf
kasli: add WIPM target
2018-07-06 15:41:28 +08:00
4eb26c0050
hmc7043: enable group 5
2018-07-03 14:16:31 +02:00
540bdae99c
grabber: enable DIFF_TERM on inputs
2018-07-01 09:28:51 +08:00
0483b8d14c
sayma_drtio: ditto
2018-06-28 17:03:32 +08:00
04d6ff45c8
kasli_sawgmaster: reset SAWGs
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Most importantly this resets the phase accumulators.
2018-06-28 17:01:48 +08:00
729ce58f98
sayma: use GTP_CLK1 to clock DRTIO satellite transceiver
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This is required to get constant skew between the DRTIO transceiver clock
(which then generates the RTIO clock) and the siphaser reference clock.
Both the Si5324 and the RTM clock tree have non-deterministic in-to-out skew
at 150MHz due to dividers.
2018-06-28 11:23:40 +08:00
a65721d649
sayma: put RTM clock tree into the siphaser loop
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* Fixes one bug where siphaser was one Si5324 output and the rest of the
system was clocked by the other. With the Si5324 settings we have, skew
between the outputs is not controlled.
* Puts the coaxial cable between AMC and RTM into the siphaser loop.
2018-06-27 21:46:55 +08:00
d49716dfac
satman: tune Sayma SYSREF phases
2018-06-27 18:09:35 +08:00
46c044099c
hmc7043,satman: verify alignment of SYSREF slips
2018-06-27 17:36:13 +08:00
7dfd70c502
hmc7043: make margin_{minus,plus} consistent with ad9154
2018-06-27 17:35:26 +08:00
4bbdd43bdf
hmc7043: do not freeze if SYSREF slip fails
2018-06-27 17:32:56 +08:00
a8a2ad68d3
runtime: tune Sayma SYSREF phases
2018-06-27 17:31:29 +08:00
811882943b
artiq_flash: RTM gateware is not required for master variant
2018-06-25 18:28:55 +08:00
c750de2955
sayma: add many-port pure DRTIO master
2018-06-25 18:21:22 +08:00
84b3d9ecc6
bootloader: also check firmware CRC in SDRAM ( #1065 )
2018-06-23 11:28:12 +08:00
68530fde07
sayma: generate 100MHz from Si5324 on standalone and master targets
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* Allow switching between DRTIO satellite and standalone without
touching the hardware.
* Allow operating standalone and master without an additional RF
signal generator.
2018-06-23 10:44:38 +08:00
whitequark
b6dd9c8bb0
runtime: support builds without RTIO DMA.
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Fixes #1079 .
2018-06-23 00:56:21 +00:00
whitequark
12fde6d34b
artiq_coremgmt: fix typo.
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Fixes #1056 .
2018-06-23 00:36:59 +00:00
51a5d8dff9
examples: add Kasli SAWG master
2018-06-22 18:57:49 +08:00
f87da95e57
jesd204: use jesd clock domain for sysref sampler
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RTIO domain is still in reset during calibration.
2018-06-22 17:13:01 +08:00
76fc63bbf7
jesd204: use separate controls for reset and input buffer disable
2018-06-22 11:38:18 +08:00
d9955fee76
jesd204: make sure IOB FF is used to sample SYSREF at FPGA
2018-06-22 11:00:56 +08:00
60b22217ce
sayma: set DRTIO master HMC830_REF to 100MHz
2018-06-22 10:10:09 +08:00
e6d1726754
sayma: add RTIO log to DRTIO master
2018-06-22 00:05:22 +08:00
83428961ad
sayma: add SAWG and JESD to DRTIO master
2018-06-22 00:04:22 +08:00
c1db02a351
drtio/gth_ultrascale: disable IBUFDS_GTE3 until stable_clkin
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Precaution against HMC7043 noise issues.
2018-06-21 22:56:07 +08:00
8b3c12e6eb
sayma: clock DRTIO master transceiver from HMC7043
2018-06-21 22:34:44 +08:00
de7d64d482
sayma: clock JESD204 from GTP CLK2
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This frees up GTP CLK1, which is routable to the SFP quads, for DRTIO.
2018-06-21 22:33:53 +08:00
b28ff587c5
sayma: add sysref sampler to DRTIO master
2018-06-21 22:28:34 +08:00
07bcdfd91e
hmc7043: stricter check of FPGA SYSREF margin
2018-06-21 22:26:49 +08:00
e29536351d
drtio: resync SYSREF when TSC is loaded
2018-06-21 17:00:32 +08:00
5a2a857a2f
firmware: clean up SYSREF phase management
2018-06-21 16:23:41 +08:00
05e908a0fd
hmc7043: align SYSREF with RTIO
2018-06-21 15:54:42 +08:00
9741654cad
hmc7043: style
2018-06-21 15:54:42 +08:00
45e8263208
hmc7043: do not configure phases during initial init
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They are determined later on.
2018-06-21 15:54:42 +08:00
whitequark
7cc3da4faf
firmware: do not lose the ".dirty" suffix in build versions.
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Fixes #1074 .
2018-06-21 05:18:51 +00:00
whitequark
095ee28fd9
runtime: fix size values for bytes and bytearray RPCs.
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Fixes #1076 .
2018-06-21 00:51:56 +00:00
whitequark
9260cdb2e8
compiler: support conversion of list to bytearray and bytes.
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Fixes #1077 .
2018-06-21 00:40:45 +00:00
5a91f820fd
examples: change Sayma sines frequency to 9MHz
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Well within Red Pitaya bandwidth.
2018-06-20 22:40:07 +08:00
9288301543
examples: add DRTIO sines
2018-06-20 22:39:40 +08:00
28fb0fd754
sayma: add SYSREF sampler gateware
2018-06-20 17:48:35 +08:00
814d0583db
hmc7043: improve smoothness of sysref phase control
2018-06-20 17:40:48 +08:00
9142a5ab8a
rtio: expose coarse timestamp in RTIO and DRTIO satellite cores
2018-06-20 17:39:54 +08:00
5272c11704
typo
2018-06-20 17:05:20 +08:00
0c32d07e8b
ad9154: new sysref scan
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Print margins around the pre-defined fixed phase.
Also report error if margins are too small.
The fixed phase is also changed by this commit (the value 88 is
from before the new HMC7043 initialization code, and is probably wrong).
2018-06-20 00:15:58 +08:00
4803ca3799
examples/sayma_drtio: add SAWG channels
2018-06-19 23:50:26 +08:00
3d0e92aefd
hmc7043: check that chip is disabled at startup
2018-06-19 23:49:17 +08:00
