forked from M-Labs/artiq
sawg: use new rtio_output() API
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@ -10,7 +10,7 @@ Output event replacement is supported except on the configuration channel.
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from artiq.language.types import TInt32, TFloat
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from numpy import int32, int64
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from artiq.language.core import kernel, now_mu
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from artiq.language.core import kernel
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from artiq.coredevice.spline import Spline
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from artiq.coredevice.rtio import rtio_output
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@ -69,7 +69,7 @@ class Config:
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``t_sawg_spline/t_rtio_coarse = div + 1``. Default: ``0``.
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:param n: Current value of the counter. Default: ``0``.
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"""
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rtio_output(now_mu(), self.channel, _SAWG_DIV, div | (n << 16))
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rtio_output((self.channel << 8) | _SAWG_DIV, div | (n << 16))
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delay_mu(self._rtio_interval)
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@kernel
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@ -108,7 +108,7 @@ class Config:
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:param clr2: Auto-clear phase accumulator of the ``phase2``/
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``frequency2`` DDS. Default: ``True``
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"""
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rtio_output(now_mu(), self.channel, _SAWG_CLR, clr0 |
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rtio_output((self.channel << 8) | _SAWG_CLR, clr0 |
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(clr1 << 1) | (clr2 << 2))
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delay_mu(self._rtio_interval)
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@ -135,7 +135,7 @@ class Config:
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DUC-DDS data of this SAWG's *buddy* channel to *this* DAC
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channel. Default: ``0``.
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"""
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rtio_output(now_mu(), self.channel, _SAWG_IQ_EN, i_enable |
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rtio_output((self.channel << 8) | _SAWG_IQ_EN, i_enable |
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(q_enable << 1))
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delay_mu(self._rtio_interval)
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@ -151,25 +151,25 @@ class Config:
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.. seealso:: :meth:`set_duc_max`
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"""
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rtio_output(now_mu(), self.channel, _SAWG_DUC_MAX, limit)
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rtio_output((self.channel << 8) | _SAWG_DUC_MAX, limit)
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delay_mu(self._rtio_interval)
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@kernel
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def set_duc_min_mu(self, limit: TInt32):
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""".. seealso:: :meth:`set_duc_max_mu`"""
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rtio_output(now_mu(), self.channel, _SAWG_DUC_MIN, limit)
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rtio_output((self.channel << 8) | _SAWG_DUC_MIN, limit)
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delay_mu(self._rtio_interval)
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@kernel
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def set_out_max_mu(self, limit: TInt32):
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""".. seealso:: :meth:`set_duc_max_mu`"""
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rtio_output(now_mu(), self.channel, _SAWG_OUT_MAX, limit)
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rtio_output((self.channel << 8) | _SAWG_OUT_MAX, limit)
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delay_mu(self._rtio_interval)
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@kernel
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def set_out_min_mu(self, limit: TInt32):
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""".. seealso:: :meth:`set_duc_max_mu`"""
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rtio_output(now_mu(), self.channel, _SAWG_OUT_MIN, limit)
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rtio_output((self.channel << 8) | _SAWG_OUT_MIN, limit)
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delay_mu(self._rtio_interval)
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@kernel
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@ -1,5 +1,5 @@
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from numpy import int32, int64
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from artiq.language.core import kernel, now_mu, portable, delay
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from artiq.language.core import kernel, portable, delay
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from artiq.coredevice.rtio import rtio_output, rtio_output_wide
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from artiq.language.types import TInt32, TInt64, TFloat
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@ -65,7 +65,7 @@ class Spline:
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:param value: Spline value in integer machine units.
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"""
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rtio_output(now_mu(), self.channel, 0, value)
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rtio_output(self.channel << 8, value)
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@kernel(flags={"fast-math"})
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def set(self, value: TFloat):
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@ -76,9 +76,9 @@ class Spline:
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if self.width > 32:
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l = [int32(0)] * 2
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self.pack_coeff_mu([self.to_mu64(value)], l)
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rtio_output_wide(now_mu(), self.channel, 0, l)
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rtio_output_wide(self.channel << 8, l)
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else:
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rtio_output(now_mu(), self.channel, 0, self.to_mu(value))
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rtio_output(self.channel << 8, self.to_mu(value))
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@kernel
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def set_coeff_mu(self, value): # TList(TInt32)
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@ -86,7 +86,7 @@ class Spline:
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:param value: Spline packed raw values.
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"""
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rtio_output_wide(now_mu(), self.channel, 0, value)
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rtio_output_wide(self.channel << 8, value)
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@portable(flags={"fast-math"})
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def pack_coeff_mu(self, coeff, packed): # TList(TInt64), TList(TInt32)
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