forked from M-Labs/artiq
ptb2: add sync to urukul0 for ad9910 usage
Signed-off-by: Robert Jördens <rj@quartiq.de>
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73b7124091
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@ -87,36 +87,42 @@ device_db.update({
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"class": "SPIMaster",
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"arguments": {"channel": 27}
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},
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"ttl_urukul0_io_update": {
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"ttl_urukul0_sync": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 28}
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"class": "TTLClockGen",
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"arguments": {"channel": 28, "acc_width": 4}
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},
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"ttl_urukul0_sw0": {
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"ttl_urukul0_io_update": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 29}
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},
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"ttl_urukul0_sw1": {
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"ttl_urukul0_sw0": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 30}
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},
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"ttl_urukul0_sw2": {
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"ttl_urukul0_sw1": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 31}
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},
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"ttl_urukul0_sw3": {
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"ttl_urukul0_sw2": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 32}
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},
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"ttl_urukul0_sw3": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 33}
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},
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"urukul0_cpld": {
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"type": "local",
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"module": "artiq.coredevice.urukul",
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@ -150,19 +156,19 @@ device_db.update({
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 33}
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"arguments": {"channel": 34}
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},
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"ttl_urukul1_sync": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLClockGen",
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"arguments": {"channel": 34, "acc_width": 4}
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"arguments": {"channel": 35, "acc_width": 4}
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},
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"ttl_urukul1_io_update": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 35}
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"arguments": {"channel": 36}
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},
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"urukul1_cpld": {
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"type": "local",
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@ -197,13 +203,13 @@ device_db.update({
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 36}
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"arguments": {"channel": 37}
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},
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"led1": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 37}
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"arguments": {"channel": 38}
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}
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})
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@ -213,19 +219,19 @@ device_db.update({
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"type": "local",
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"module": "artiq.coredevice.spi2",
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"class": "SPIMaster",
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"arguments": {"channel": 38}
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"arguments": {"channel": 39}
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},
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"ttl_zotino0_ldac": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 39}
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"arguments": {"channel": 40}
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},
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"ttl_zotino0_clr": {
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"type": "local",
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"module": "artiq.coredevice.ttl",
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"class": "TTLOut",
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"arguments": {"channel": 40}
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"arguments": {"channel": 41}
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},
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"zotino0": {
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"type": "local",
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@ -597,7 +597,8 @@ class PTB2(_StandaloneBase):
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eem.DIO.add_std(self, 2,
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ttl_serdes_7series.Output_8X, ttl_serdes_7series.Output_8X)
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eem.Sampler.add_std(self, 3, None, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 5, 4, ttl_serdes_7series.Output_8X)
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eem.Urukul.add_std(self, 5, 4, ttl_serdes_7series.Output_8X,
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ttl_simple.ClockGen)
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eem.Urukul.add_std(self, 6, None, ttl_serdes_7series.Output_8X,
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ttl_simple.ClockGen)
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