forked from M-Labs/artiq
sayma: set RTIO_FREQUENCY in MasterDAC
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@ -153,6 +153,7 @@ class MasterDAC(MiniSoC, AMPSoC, RTMCommon):
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self.config["HAS_SI5324"] = None
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self.config["SI5324_AS_SYNTHESIZER"] = None
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self.config["SI5324_SAYMA_REF"] = None
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self.config["RTIO_FREQUENCY"] = str(rtio_clk_freq/1e6)
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# ensure pins are properly biased and terminated
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si5324_clkout = platform.request("si5324_clkout", 0)
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self.specials += Instance(
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