forked from M-Labs/artiq
coredevice.ad9910: Fix phase tracking ref_time passing
This is difficult to test without hardware mocks or some form of phase readback, but the symptom was that e.g. `self.dds.set(…, ref_time=now_mu() - 1)` would fail periodically, that is, whenever bit 32 of the timestamp would be set (which would be turned into the sign bit). This is a fairly sinister issue, and is probably a compiler bug of some sort (either accepts-invalid or wrong type inference).
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@ -371,9 +371,11 @@ class AD9910:
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self.set_cfr1(power_down=bits)
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self.cpld.io_update.pulse(1*us)
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# KLUDGE: ref_time default argument is explicitly marked int64() to avoid
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# silent truncation of explicitly passed timestamps. (Compiler bug?)
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@kernel
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def set_mu(self, ftw, pow_=0, asf=0x3fff, phase_mode=_PHASE_MODE_DEFAULT,
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ref_time=-1, profile=0):
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ref_time=int64(-1), profile=0):
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"""Set profile 0 data in machine units.
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This uses machine units (FTW, POW, ASF). The frequency tuning word
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@ -514,7 +516,7 @@ class AD9910:
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@kernel
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def set(self, frequency, phase=0.0, amplitude=1.0,
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phase_mode=_PHASE_MODE_DEFAULT, ref_time=-1, profile=0):
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phase_mode=_PHASE_MODE_DEFAULT, ref_time=int64(-1), profile=0):
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"""Set profile 0 data in SI units.
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.. seealso:: :meth:`set_mu`
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