forked from M-Labs/artiq
test_ad9910: relax SYNC window
Signed-off-by: Robert Jördens <rj@quartiq.de>
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@ -414,7 +414,7 @@ class AD9910:
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self.cpld.io_update.pulse(1*us)
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@kernel
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def tune_sync_delay(self, sync_delay_seed=8):
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def tune_sync_delay(self, sync_delay_seed=9):
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"""Find a stable SYNC_IN delay.
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This method first locates the smallest SYNC_IN validity window at
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@ -430,8 +430,8 @@ class AD9910:
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"""
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dt = 14 # 1/(f_SYSCLK*75ps) taps per SYSCLK period
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max_delay = dt # 14*75ps > 1ns
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max_window = dt//4 + 1 # 2*75ps*4 = 600ps high > 1ns/2
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min_window = max(0, max_window - 2) # 2*75ps hold, 2*75ps setup
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max_window = dt//4 + 1 # 75ps*4 = 300ps setup and hold
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min_window = 1 # 1*75ps setup and hold
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for window in range(max_window - min_window + 1):
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window = max_window - window
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for in_delay in range(max_delay):
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@ -446,9 +446,8 @@ class AD9910:
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# integrate SMP_ERR statistics for a few hundred cycles
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# delay(10*us)
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err = urukul_sta_smp_err(self.cpld.sta_read())
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err = (err >> (self.chip_select - 4)) & 1
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delay(40*us) # slack
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if not err:
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if not (err >> (self.chip_select - 4)) & 1:
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window -= min_window # add margin
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self.set_sync(in_delay, window)
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self.clear_smp_err()
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