forked from M-Labs/artiq
jesd204sync: improve messaging
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3acee87df2
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@ -187,16 +187,17 @@ fn reach_sysref_ddmtd_target(target: i32, tolerance: i32) -> Result<(), &'static
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}
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fn calibrate_sysref_target(rising_average: i32, falling_average: i32) -> Result<i32, &'static str> {
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info!("calibrating SYSREF DDMTD target phase...");
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let coarse_target =
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if rising_average < falling_average {
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(rising_average + falling_average)/2
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} else {
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((falling_average - (DDMTD_N - rising_average))/2 + DDMTD_N) % DDMTD_N
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};
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info!("SYSREF calibration coarse target: {}", coarse_target);
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info!(" SYSREF calibration coarse target: {}", coarse_target);
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reach_sysref_ddmtd_target(coarse_target, 4)?;
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let target = measure_ddmdt_phase();
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info!("SYSREF calibrated target: {}", target);
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info!(" ...done, target={}", target);
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Ok(target)
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}
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@ -215,13 +216,14 @@ fn sysref_slip_rtio_cycle() {
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}
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pub fn sysref_rtio_align() -> Result<(), &'static str> {
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info!("aligning SYSREF with RTIO TSC...");
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let mut previous_sample = sysref_get_sample()?;
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let mut nslips = 0;
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loop {
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sysref_slip_rtio_cycle();
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let sample = sysref_get_sample()?;
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if sample && !previous_sample {
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info!("SYSREF aligned with RTIO TSC");
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info!(" ...done");
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return Ok(())
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}
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previous_sample = sample;
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@ -238,6 +240,7 @@ pub fn sysref_auto_rtio_align() -> Result<(), &'static str> {
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test_ddmtd_stability(false, 1)?;
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test_slip_ddmtd()?;
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info!("determining SYSREF S/H limits...");
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let sysref_sh_limits = measure_sysref_sh_limits()?;
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let rising_average = average_phases(&sysref_sh_limits.rising_phases, SYSREF_SH_MOD);
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let falling_average = average_phases(&sysref_sh_limits.falling_phases, SYSREF_SH_MOD);
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@ -249,11 +252,12 @@ pub fn sysref_auto_rtio_align() -> Result<(), &'static str> {
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let rising_max_deviation = rising_max_deviation >> SYSREF_SH_PRECISION_SHIFT;
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let falling_max_deviation = falling_max_deviation >> SYSREF_SH_PRECISION_SHIFT;
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info!("SYSREF S/H average limits (DDMTD phases): {} {}", rising_average, falling_average);
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info!("SYSREF S/H maximum limit deviation: {} {}", rising_max_deviation, falling_max_deviation);
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info!(" SYSREF S/H average limits (DDMTD phases): {} {}", rising_average, falling_average);
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info!(" SYSREF S/H maximum limit deviation: {} {}", rising_max_deviation, falling_max_deviation);
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if rising_max_deviation > 4 || falling_max_deviation > 4 {
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return Err("excessive SYSREF S/H limit deviation");
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}
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info!(" ...done");
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let entry = config::read_str("sysref_ddmtd_phase_fpga", |r| r.map(|s| s.parse()));
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let target_phase = match entry {
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@ -270,10 +274,12 @@ pub fn sysref_auto_rtio_align() -> Result<(), &'static str> {
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}
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};
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info!("aligning SYSREF with RTIO clock...");
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reach_sysref_ddmtd_target(target_phase, 3)?;
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if sysref_sh_error() {
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return Err("SYSREF does not meet S/H timing at DDMTD phase target");
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}
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info!(" ...done");
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sysref_rtio_align()?;
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