forked from M-Labs/artiq
sayma: fix DDMTD STA
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parent
cb04230f86
commit
359fb1f207
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@ -283,6 +283,8 @@ class MasterDAC(MiniSoC, AMPSoC, RTMCommon):
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self.submodules.sysref_ddmtd = jesd204_tools.DDMTD(platform.request("adc_sysref"))
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self.csr_devices.append("sysref_ddmtd")
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platform.add_false_path_constraints(self.ad9154_crg.cd_jesd.clk,
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self.sysref_ddmtd.cd_helper.clk)
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self.submodules.sysref_sampler = jesd204_tools.SysrefSampler(
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platform.request("dac_sysref"), self.rtio_tsc.coarse_ts)
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self.csr_devices.append("sysref_sampler")
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@ -576,6 +578,8 @@ class Satellite(BaseSoC, RTMCommon):
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self.submodules.sysref_ddmtd = jesd204_tools.DDMTD(platform.request("adc_sysref"))
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self.csr_devices.append("sysref_ddmtd")
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platform.add_false_path_constraints(self.ad9154_crg.cd_jesd.clk,
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self.sysref_ddmtd.cd_helper.clk)
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self.submodules.sysref_sampler = jesd204_tools.SysrefSampler(
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platform.request("dac_sysref"), self.rtio_tsc.coarse_ts)
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self.csr_devices.append("sysref_sampler")
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