forked from M-Labs/artiq
ad9154: enable sync in init
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@ -370,6 +370,11 @@ fn dac_setup(dacno: u8, linerate: u64) -> Result<(), &'static str> {
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write(ad9154_reg::LMFC_VAR_0, 0x0a); // receive buffer delay
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write(ad9154_reg::LMFC_VAR_1, 0x0a);
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write(ad9154_reg::SYNC_ERRWINDOW, 0); // +- 1/2 DAC clock
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// datasheet seems to say ENABLE and ARM should be separate steps,
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// so enable now so it can be armed in dac_sync().
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write(ad9154_reg::SYNC_CONTROL,
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0x1*ad9154_reg::SYNCMODE | 1*ad9154_reg::SYNCENABLE |
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0*ad9154_reg::SYNCARM | 0*ad9154_reg::SYNCCLRSTKY);
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write(ad9154_reg::XBAR_LN_0_1,
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0*ad9154_reg::LOGICAL_LANE0_SRC | 1*ad9154_reg::LOGICAL_LANE1_SRC);
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