forked from M-Labs/artiq
fix previous commits
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@ -150,8 +150,9 @@ class LLVMIRGenerator:
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ll.Constant(lli64, 1)
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])
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assert self.lldatalayout in "eE"
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self.little_endian = self.lldatalayout[0] == "e"
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data_layout = str(self.lldatalayout)
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assert data_layout[0] in "eE"
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self.little_endian = data_layout[0] == "e"
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def needs_sret(self, lltyp, may_be_large=True):
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if isinstance(lltyp, ll.VoidType):
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