David Nadlinger
990e0b7dd9
compiler: Fix comparison of tuples of lists
2019-03-31 17:10:27 +01:00
David Nadlinger
baf102dbb2
compiler: Fix comparison of nested lists
2019-03-31 17:10:27 +01:00
David Nadlinger
8e225433a5
firmware: Fix kernel RPC strings size (memory corruption)
...
Test case to follow.
2019-03-31 17:10:27 +01:00
David Nadlinger
b8ff627be9
firmware: Fix kernel RPC tuple size calculation (memory corruption)
...
Test case to follow.
2019-03-31 17:10:27 +01:00
David Nadlinger
fc95183e04
coredevice: Fix host-side serialization of (nested) lists
...
Test case to follow.
2019-03-31 17:10:27 +01:00
David Nadlinger
f9af058b96
compiler: Quote tuples as TTuple values
...
Previously, they would end up being TInstances,
rendering them useless.
2019-03-31 23:40:21 +08:00
3634cfac86
typo
2019-03-31 22:27:07 +08:00
4580f3dac8
test/lit: support overriding libartiq_support.so
2019-03-31 22:26:09 +08:00
4499ef1748
kasli: only add moninj core if there are probes to monitor
2019-03-24 14:09:52 +08:00
5d31cf2268
sayma_rtm2: si5324_clkout -> cdr_clk_clean
2019-03-23 13:48:36 +08:00
560849e693
sayma_amc: add DRTIO transceiver on rtm_amc_link for v2 hardware
2019-03-23 13:41:22 +08:00
bbb8c00518
sayma_amc: default to satellite variant
2019-03-23 13:37:55 +08:00
18fbe0b081
sayma_rtm_drtio: support v2 hardware
2019-03-23 13:31:28 +08:00
c7205ad82f
sayma_rtm: preliminary v2 support
2019-03-23 12:37:03 +08:00
d07c6fcfea
ad9910: handle unprogrammed EEPROM and numpy corner cases
2019-03-22 14:28:47 +08:00
7cdcaf0d00
tests: fix coredevice tests after implementing scheduler defaults
2019-03-22 07:27:55 +08:00
33b28f6e56
sayma_amc: add placeholder code to use DDMTD signals on v2 hardware
2019-03-21 17:37:22 +08:00
2ec5a58c59
sayma_amc: si5324_clkout -> cdr_clk_clean
2019-03-21 14:09:33 +08:00
af785b9a9c
artiq_compile: fix after adding scheduler defaults
...
Closes #1290
2019-03-21 09:56:19 +08:00
8d2c1be44f
artiq_flash: ignore rtm_gateware on Sayma for variant autodetection
2019-03-17 15:57:50 +08:00
c2622297bd
urukul: use board_data instead of user_data to store calibration in EEPROM
2019-03-15 17:57:35 +08:00
a01425bc9c
kasli_tester: do not attempt to synchronize AD9912 Urukul
2019-03-15 17:13:29 +08:00
fcf8828cb6
fix tests, artiq_run after implementing scheduler defaults ( #1290 )
2019-03-13 17:20:30 +01:00
5e7c83c9cf
artiq_ddb_template: enable Urukul synchronization from EEPROM
2019-03-13 15:42:51 +08:00
e504262b67
kasli_tester: calibrate Urukul synchronization and write to EEPROM
2019-03-13 15:36:05 +08:00
346299e7f8
kasli_tester: enable EEPROM for Urukul synchronization
2019-03-13 15:35:23 +08:00
04e0c23e78
ad9910: support reading synchronization values from EEPROM
2019-03-13 15:34:47 +08:00
852048dce4
artiq_ddb_template: create Urukul EEPROM device
2019-03-13 15:34:23 +08:00
964a349a19
add Kasli I2C driver
2019-03-13 15:33:50 +08:00
c56c3e5588
dashboard: add support for experiment pipeline/priority/flush defaults
2019-03-12 10:54:15 +01:00
8659c769cb
master/language: add methods to set experiment pipeline/priority/flush defaults
2019-03-12 10:54:15 +01:00
b2177eff81
kasli_tester: run test_i2c_switch
2019-03-11 21:06:28 +08:00
227c729f56
fix permissions
2019-03-11 20:43:28 +08:00
David Nadlinger
b3db3ea6fc
dashboard: Sort TTL moninj channels by name
...
With growing system complexity, the moninj channel index is
no longer a very intuitive ordering for typical end users.
2019-03-11 03:30:14 +01:00
David Nadlinger
5fd92a6175
gui: Fix crash when quickly opening/closing applets
...
Quickly closing/reopening applets (e.g. quickly clicking the checkbox
on an entire folder of applets) would previously lead to an occasional
KeyError on the self.dock_to_item access in on_dock_closed, as close()
would be invoked more than once.
The geometry/checked state handling can potentially be cleaned up
further, but at least this avoid the crash.
2019-03-10 20:57:10 +00:00
e47ba4b35e
kasli_generic: fix identifier string
2019-03-08 19:57:20 +08:00
b219f8b5c7
artiq_flash: autodetect variant
2019-03-08 19:47:24 +08:00
fc9d4c7bdc
artiq_flash: fix sayma master detection
2019-03-08 19:36:35 +08:00
25bcebd1f6
artiq_flash: not all boards are development boards
2019-03-08 19:35:20 +08:00
ed2d8dfa7a
artiq_flash: resolve openocd symbolic links
...
On NixOS, openocd may be a symlink in /run/current-system/sw/bin when installed system-wide.
2019-03-08 12:43:06 +08:00
0d05d4b813
artiq_client: python 3.7 compatibility
2019-02-26 17:09:38 +08:00
ec966de007
thorlabs_tcube: cleanup
2019-02-26 16:50:19 +08:00
62c7f75a9e
sayma_amc: support hardware revisions
2019-02-25 23:49:45 +08:00
d45249197c
siphaser: improve ultrascale clock routing
2019-02-25 23:00:01 +08:00
de3992bbdd
kasli: remove HUST variants (supported by kasli_generic)
2019-02-23 15:44:17 +08:00
791f830ef6
kasli_generic: support DRTIO
2019-02-23 15:41:05 +08:00
d39338d59f
artiq_ddb_template: fix --satellite
2019-02-23 15:27:18 +08:00
d79a6ee41c
artiq_ddb_template: fix pll_vco indentation
2019-02-22 23:50:30 +08:00
62985fbd29
binaries -> board-support
2019-02-22 23:18:01 +08:00
1c35c051a5
kasli: remove variants supported by generic builder
2019-02-22 23:08:49 +08:00
05b128469f
artiq_ddb_template: support setting Urukul pll_vco
2019-02-22 22:59:20 +08:00
cd60803f21
device_ddb_template: add Sampler, Zotino, Grabber and SFP LED support
2019-02-22 20:07:15 +08:00
269f0a4d6f
artiq_ddb_template: add Urukul support
2019-02-22 19:33:27 +08:00
8049c52d06
frontend: add artiq_ddb_template (WIP, TTL only)
2019-02-22 17:19:48 +08:00
8edc2318ab
style
2019-02-22 17:19:20 +08:00
aee8965897
ad9910: add ram conversion tooling and unittests
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-02-21 15:59:52 +00:00
ec6588174b
ad9910: add ram operation unittests
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-02-21 15:14:32 +00:00
b57cad77ad
ad9910: make ram read work for short segments
...
also cleanup and style
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-02-21 14:47:58 +00:00
596d3e20d7
dashboard,browser: do not call get_user_config_dir() in argparse
...
This caused two problems when building the docs:
* the path printed in the docs depends on the machine where they are built
* it pollutes ~/.config, and also breaks Nix builds
2019-02-19 15:43:04 +08:00
40a0cf806d
support overriding versioneer
2019-02-17 14:49:52 +08:00
6ad2e13515
kasli: add generic builder (WIP)
2019-02-12 19:18:09 +08:00
2104a93f78
build_soc: allow overriding SoC class name
2019-02-12 18:33:52 +08:00
ff4e4f15ed
kasli: expose base SoC classes
2019-02-12 18:33:27 +08:00
whitequark
0a84dd38c1
Add missing test from d6eb2b02.
2019-02-10 07:25:53 +00:00
David Nadlinger
01c3000ef3
master: Print offending key on HDF5 dataset type error
...
This helps debugging the cause of TypeErrors arising from types
not handled by the HDF5 serializer, as the backtrace doesn't
otherwise include any useful information.
2019-02-09 20:50:38 +00:00
David Nadlinger
56b2e0c262
artiq_influxdb: Support append() in dataset _Mock
...
This went undetected as append mods were not actually in use
in any part of the codebase previously.
2019-02-09 20:50:38 +00:00
David Nadlinger
bf84226c7d
language: Support appending to datasets
2019-02-09 20:50:38 +00:00
David Nadlinger
820326960e
test: Add basic experiment dataset interface tests
2019-02-09 20:50:38 +00:00
2de1eaa521
dashboard: reconnect to core moninj
...
* handle disconnects like core device address changes and do a
disconnect/connect iteration
* after connection failure wait 10 seconds and try again
* this addresses the slight regression from release-2
to release-3 where the moninj protocol was made stateful
(#838 and #1125 )
* it would be much better to fix smoltcp/runtime to no loose the
connection under pressure (#1125 )
* the crashes reported in #838 look more like a race condition
* master disconnects still require dashboard restarts
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-02-08 23:52:16 +08:00
1cfd26dc2e
kasli: add UNSW variant
2019-02-08 17:51:51 +08:00
3e8fe3f29d
suservo: fix permissions
2019-02-08 14:54:02 +08:00
David Nadlinger
ef934ad958
Add test/release notes for command-less controllers
...
See eaa1b44b00
2019-02-07 21:51:15 +00:00
eaa1b44b00
ctlmgr: ignore controllers without a "command" field
...
Allow controllers to be specified without a "command" field. The user takes
responsibility for ensuring the controller is running: the controller manager
does not attempt to ping the controller. This is useful when one has a common
controller shared between several masters.
2019-02-07 21:50:29 +00:00
hartytp
0ebff04ad7
SUServo: apply bit masks to servo memory writes to prevent overflows
...
Signed-off-by: TPH <thomas.harty@physics.ox.ac.uk>
2019-02-07 17:04:11 +01:00
hartytp
f6142816b8
Revert "SUServo: remove references to non-existent a0 parameter" ( #1270 )
...
This reverts commit f3aab2b89156bbc1b12f847093a87a8933293df2.
Signed-off-by: TPH <thomas.harty@physics.ox.ac.uk>
2019-02-07 15:57:43 +00:00
hartytp
fe63c9b366
SUServo: remove references to non-existent a0 parameter ( #1268 )
...
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
2019-02-07 15:29:32 +00:00
hartytp
df6c1fca2c
SUServo: flake8 [NFC] ( #1267 )
...
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
2019-02-07 15:13:44 +00:00
hartytp
87e85bcc14
suservo: fix coefficient data writing
...
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
2019-02-07 14:47:11 +01:00
whitequark
d6eb2b023a
compiler: monomorphize casts first, but more carefully.
...
This reverts 425cd7851Fixes #1252 .
2019-02-07 06:24:32 +00:00
b56c7cec1e
kasli: use 100MHz RTIO and 800MHz Urukul frequencies on Berkeley target
...
Urukul sync is not reliable at 125/1000
2019-02-05 11:24:45 +08:00
5a7460a38e
kasli: add sync delays to device_db_berkeley
2019-02-01 22:14:03 +08:00
ea431b6982
sayma_rtm: use 150MHz RTIO freq for DDMTD
2019-01-31 20:43:44 +08:00
ec230d6560
sayma: move SYSREF DDMTD to the RTM
...
Put RTM Si5324 into bypass mode before running.
Needs rework to cut RTM Si5324 reset trace.
Needs rework to fix LVDS termination on RTM R310/R313 and R314/R315.
Needs uFL jumper cables between RTM "REF LO DIAG" and "CRD AUX CLKIN" (sic).
2019-01-31 20:39:33 +08:00
8119000982
sayma_rtm_drtio: use Si5324 soft reset
...
Needs easy board rework to cut trace at pin 1 of Si5324.
The Si5324 contains an internal pull-up on that pin.
Allows using Si5324 + HMC7043 chips at the same time.
Allows the Si5324 bypass hack for DDMTD experiments on the RTM.
2019-01-31 19:43:54 +08:00
82106dcd95
si5324: add bypass function
2019-01-31 19:38:55 +08:00
8bbd4207d8
si5324: use consistent bitmask
2019-01-31 19:35:56 +08:00
d3c608aaec
jesd204sync: reset and check lock status of DDMTD helper PLL in firmware
2019-01-31 15:11:16 +08:00
fa3b40141d
hmc830_7043: document sayma clock muxes
2019-01-31 15:10:11 +08:00
ec8560911f
siphaser: bugfixes
...
* Fix integer overflow in degree computation
* Add some phase slips after the first transition to get out of the jitter zone and avoid intermittent short windows
2019-01-30 16:56:38 +08:00
c591009220
sayma: report TSC phase of SYSREF (TSC LSBs on SYSREF rising edge) in SYSREF sampler
...
Better visibility, better diagnostics, allows some changing of SYSREF frequency while keeping the same gateware.
2019-01-29 23:30:01 +08:00
9d0d02a561
jesd204sync: increase tolerance for coarse->final target in calibrate_sysref_target
...
There is plenty of slack (it only needs to meet timing at the RTIO frequency).
2019-01-29 16:48:55 +08:00
ed6aa29897
jesd204sync: print more information on test_slip_ddmtd error
2019-01-29 16:47:29 +08:00
2e8decbce3
kasli_sawgmaster: generate a HMC830 clock with Urukul
2019-01-29 15:06:45 +08:00
9ae57fd51e
sayma: pass rtio_clk_freq to DDMTD core
2019-01-29 15:06:45 +08:00
90c9fa446f
test: add array transfer test
...
200 kB/s, more than a factor of 10 slower than the bare string transfer
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-28 14:30:44 +00:00
7a5d28b73d
jesd204sync: test SYSREF period
2019-01-28 19:11:38 +08:00
1a42e23fb4
jesd204sync: print DDMTD SYSREF final alignment delta
2019-01-28 18:39:16 +08:00
eebff6d77f
jesd204sync: fix max_phase_deviation
2019-01-28 18:38:18 +08:00
b9e3fab49c
jesd204sync: improve messaging
2019-01-28 18:37:46 +08:00
145f08f3fe
jesd204sync: update SYSREF S/H limit deviation tolerance
...
Follows the increased DDMTD resolution.
2019-01-28 18:21:31 +08:00
ba21dc8498
jesd204sync: improve messaging
2019-01-28 18:08:20 +08:00
3acee87df2
firmware: improve DDMTD resolution using dithering/averaging
2019-01-28 16:04:04 +08:00
cfe66549ff
jesd204sync: cleanup DDMTD averaging code
2019-01-28 14:14:50 +08:00
2b0d63db23
hmc830_7043: support 125MHz RTIO
2019-01-28 13:44:08 +08:00
bdd4e52a53
ad9154: support 125MHz RTIO
2019-01-28 13:43:52 +08:00
47312e55d3
sayma: set RTIO_FREQUENCY in MasterDAC
2019-01-28 13:43:28 +08:00
443d6d8688
sayma_amc: pass RTIO clock frequency to SiPhaser
2019-01-28 09:49:03 +08:00
3b6f47886e
firmware: print more info on DDMTD stability error
2019-01-27 23:06:11 +08:00
74fdd04622
firmware: test DDMTD stability
2019-01-27 20:39:12 +08:00
81b0046f98
ddmtd: add deglitchers
2019-01-27 20:38:41 +08:00
8254560577
sayma: properly determine SYSREF coarse calibration target
2019-01-27 16:00:36 +08:00
214394e3b0
sayma: reimplement DAC SYSREF autocalibration
2019-01-27 15:28:39 +08:00
fdbf1cc2b2
sayma: rework DAC SYSREF margin validation
...
Previous code did not work when delay range was not enough for two rotations.
This removes autocalibration, to be done later. Uses hardcoded value for now.
2019-01-27 14:17:54 +08:00
7e5c062c2c
firmware: bypass channel divider for HMC7043 DCLK
2019-01-27 11:49:34 +08:00
f73ffe44f9
firmware: implement DDMTD-based SYSREF/RTIO alignment (draft)
...
Mostly works and usually gets the DAC synchronized at 2.4GHz with Urukul across DRTIO.
Needs cleanup and optimization/characterization.
2019-01-27 09:51:24 +08:00
8632b553d2
ddmtd: use IOB register to sample input
2019-01-27 09:50:02 +08:00
d1ef036948
kasli_sawgmaster: initialize SAWG phase according to RTIO TSC
2019-01-27 09:49:31 +08:00
9966e789fc
sayma: simplify Ultrascale LVDS T false path
...
Recommended by Xilinx.
2019-01-25 23:40:48 +08:00
359fb1f207
sayma: fix DDMTD STA
2019-01-25 23:39:19 +08:00
cb04230f86
sayma: SYSREF setup/hold validation demonstration
...
This also removes the standalone target as the ISERDES used
for setup/hold check requires the fine RTIO clock, which in turn
requires a DRTIO transceiver due to the Ultrascale TPWS bug.
2019-01-25 16:58:58 +08:00
3356717316
sayma: DDMTD SYSREF measurement demonstration
2019-01-25 16:00:31 +08:00
4941fb3300
sayma: 2.4GHz DAC clocking (4X interpolation)
...
* gets another clock divider out of the way
* gets one cycle within range of the HMC7043 analog delay alone
* SYSREF/RTIO alignment removed, to be replaced with DDMTD-based scheme
2019-01-25 13:47:04 +08:00
cc9420d2c8
hmc7043: fix divider programming
2019-01-25 11:48:50 +08:00
8c5a502591
ad53xx: ignore F3 (reserved)
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-24 15:50:46 +01:00
bbac92442f
sayma: check hmc7043 slip period
2019-01-24 20:13:43 +08:00
a92cc91dcb
kasli_sawgmaster: correctly tune DDS and SAWG
2019-01-24 19:37:14 +08:00
f8b39b0b9a
sayma: enable 2X DAC interpolation
...
Seems to work just fine and gets one clock divider out of the way.
2019-01-24 18:28:01 +08:00
07b5b0d36d
kasli: adapt Master target to new hardware
2019-01-24 18:27:15 +08:00
154269b77a
kasli: fix HUST satellite Urukul
2019-01-23 17:59:43 +08:00
3b5fd3ac11
kasli_tester: fix grabber test
2019-01-23 17:59:25 +08:00
330c5610e9
ad9912: fix imports
2019-01-23 17:59:08 +08:00
390f05f762
firmware: use smoltcp release
2019-01-23 16:15:05 +08:00
d7e6f104d2
kasli: add HUST variants
2019-01-23 14:11:51 +08:00
81f2b2c864
kasli: remove unpopulated Tester EEMs
...
* matches hardware and avoids issues with programs that process the DDB (e.g. kasli_tester)
* shortens compilation times
2019-01-23 12:14:44 +08:00
b692981c8e
ad9910: add note about red front panel led
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-22 12:49:42 +01:00
a0eba5b09b
satman: support Grabber
2019-01-22 19:36:13 +08:00
2e3555de85
firmware: fix compilation error with more than 1 Grabber
2019-01-22 19:35:46 +08:00
9ee5fea88d
kasli: support optional SATA port for DRTIO
2019-01-22 18:06:48 +08:00
91e375ce6a
ad9910: don't reset the input divide-by-two
...
suspected of causing weird PLL lock timout errors
https://freenode.irclog.whitequark.org/m-labs/2019-01-22#1548148750-1548143221 ;
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-22 09:37:20 +00:00
81ff3d4b29
ad9912: add some slack after init
2019-01-21 17:10:58 +00:00
a9678dd9f2
test_frontends: always skip GUI programs
...
The "import PyQt5" hack breaks on nix/hydra.
2019-01-21 23:41:07 +08:00
84f7d006e8
ad9910: add precision about tune_io_update_delay/tune_sync_delay order
2019-01-21 19:40:55 +08:00
30051133b7
urukul: fix typos
2019-01-21 19:40:55 +08:00
30b2f54baa
kasli_tester: skip Zotino test when no Zotino is present
2019-01-21 18:11:41 +08:00
bff8c8cb05
kasli: add Berkeley variant
2019-01-21 17:44:17 +08:00
a987d2b2e5
kasli_tester: skip Grabber test when no Grabber is present
2019-01-21 17:43:48 +08:00
David Nadlinger
4ba4e9c540
test_scheduler: Test for hang when exiting with running experiments
...
The respective code path in artiq.master.scheduler._mk_worker_method
wasn't previously covered.
2019-01-20 19:45:50 +00:00
David Nadlinger
0dab7ecd73
master: Include RID in worker exception messages
...
This helps when debugging unexpected shutdown problems
after the fact.
2019-01-20 19:45:50 +00:00
David Nadlinger
e24e893303
master/scheduler: Fix misleading indentation [nfc]
2019-01-20 19:45:47 +00:00
David Nadlinger
e165a9a352
sync_struct: Factor action strings out into enum and document them [nfc]
2019-01-19 20:19:17 +00:00
David Nadlinger
c213ab13ba
sync_struct: Notifier.{read -> raw_view}, factor out common dict update code [nfc]
2019-01-19 20:19:17 +00:00
David Nadlinger
bd71852427
sync_struct: Tweak variable name to avoid confusion with init mod action [nfc]
2019-01-19 20:19:17 +00:00
David Nadlinger
90c144a685
test_pc_rpc: Remove leftover debug print [nfc]
...
This tidies up the test suite output, and we have verbose asserts
to show further information on breakage, should it occur.
2019-01-19 20:18:33 +00:00
a2ff2cc173
sayma_amc: use more selective IOBUFDS false path
2019-01-19 11:47:50 +08:00
40187d1957
ad9910: support configurable refclk divider and pll bypass
...
for #1248
* also always keep refclk input divider (by two) reset
2019-01-18 12:23:53 +00:00
385916a9a4
ad9912: support configurable clk_div
2019-01-18 12:16:08 +00:00
2bea5e3d58
urukul: support configurable refclk divider
...
for #1248
2019-01-18 12:09:32 +00:00
689714965b
monkey_patches: disable for Python >= 3.6.7
...
3.6 >=7 are fixed
3.7.0 is incompatible with the monkey patches and they do more harm than good
3.7 >=1 are fixed
2019-01-15 20:29:20 +08:00
David Nadlinger
1c71ae636a
examples: Add edge counters to kasli_tester variant
...
This enables test_edge_counter on the CI system.
2019-01-15 10:55:07 +00:00
David Nadlinger
67a6882e91
examples: Fix kasli_tester device_db offset comments
2019-01-15 10:55:07 +00:00
David Nadlinger
a565f77538
Add gateware input event counter
2019-01-15 10:55:07 +00:00
4cb9f77fd8
sayma_amc: fix Master timing constraints
2019-01-13 13:53:07 +08:00
David Nadlinger
6c52359e59
coredevice: Add _mu suffix to AD991x ref_time arguments
...
GitHub: Fixes #1243 .
2019-01-12 17:34:35 +00:00
David Nadlinger
24b1b9a480
Add smoke test for frontend commands
...
This ensures that at least --help works for all the commands,
preventing regressions like that in f3323a35d5
2019-01-12 13:50:53 +00:00
whitequark
425cd7851e
compiler: first monomorphize ints, then casts.
...
Fixes #1242 .
2019-01-12 13:40:12 +00:00
whitequark
49682d0159
Improve Python 3.7 compatibility.
...
async is now a full (non-contextual) keyword.
There are two more instances:
- artiq/frontend/artiq_client.py
- artiq/devices/thorlabs_tcube/driver.py
It is not immediately clear how to fix those, so they are left for
later work.
2019-01-12 13:17:59 +00:00
David Nadlinger
f3323a35d5
artiq_influxdb: Unbreak after verbosity_args rename
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This fixes commit f2c1d32e54
2019-01-12 12:02:22 +00:00
David Nadlinger
48fc175a6b
coredevice.ttl: More imperative mood in docstrings [nfc]
...
This follows Python conventions (PEP257) and unifies the style with
other comments.
2019-01-12 12:01:55 +00:00
Drew
f2c1d32e54
frontend: add --version flag to cmd line args ( #1181 )
2019-01-12 09:47:47 +08:00
David Nadlinger
3e84ec2bf1
coredevice.ad9910: Fix phase tracking ref_time passing
...
This is difficult to test without hardware mocks or some
form of phase readback, but the symptom was that e.g.
`self.dds.set(…, ref_time=now_mu() - 1)` would fail
periodically, that is, whenever bit 32 of the timestamp
would be set (which would be turned into the sign bit).
This is a fairly sinister issue, and is probably a compiler
bug of some sort (either accepts-invalid or wrong type inference).
2019-01-12 00:47:38 +00:00
Drew
66861e6708
test_pc_rpc: fix equality bug ( #1188 ) ( #1239 )
...
Fixes bug from 5108ed8. Truth value of multi-element numpy array is
not defined. Completes #1186 and fixes/amends #1188 .
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
2019-01-11 10:15:44 +08:00
101671fbbf
core_analyzer: support uniform VCD time intervals
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close #1236
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-10 19:35:09 +01:00
Drew
99a0f61b35
artiq_client: remove custom input validation for built-in argparse ( #1185 )
2019-01-10 12:58:11 +08:00
Drew
721c6f3bcc
pc_rpc: fix handling of type annotations
2019-01-10 12:13:22 +08:00
088530604e
test_ad9910: relax tests
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* tune_sync_delay: the opposite IO_UPDATE to SYNC_CLK alignment may not be perfectly
mis-aligned
* set_mu_speed: seems to be slower on the buildbot
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-09 17:27:42 +00:00
19748fe495
ad9910: fix RTIO fine timestamp nudging
...
Previously the TSC was truncated to an even coarse RTIO periods before doing
the setting SPI xfer. Afterwards the the IO update pulse would introduce
at least one but less than two RTIO cycles. Ultimately the RTIO TSC was
truncated again to even. If the SPI xfer takes an odd number of RTIO
periods, then a subsequent xfer would collide.
close #1229
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-09 17:22:57 +00:00
b25ab1fc88
ad9910: add more slack in tune_sync_delay
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close #1235
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-09 16:07:31 +00:00
9b213b17af
sayma_amc: forward RTM UART in Master variant as well
2019-01-09 18:57:57 +08:00
c7b18952b8
sayma_amc: work around Ultrascale LVDS Toutbuf_delay_td_pad
2019-01-09 13:47:08 +08:00
62599c5f91
firmware: use consistent terminology
2019-01-09 13:46:18 +08:00
Drew
b3b0b6f0a5
artiq_influxdb: clarify argparse groups ( #1212 )
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Make names of argparse group variables relate to what they're doing.
Meets Flake8.
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
2019-01-09 11:40:55 +08:00
David Nadlinger
101ed5d534
examples: Fix DRTIO destination indices ( #1231 )
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Using the default routing table, links numbers and destinations
are offset by 1, as destination 0 is local RTIO.
2019-01-09 11:40:15 +08:00
Drew
40370c4d45
Docs: fix build warnings ( #1234 )
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* ad9910: finish CONT_RECIRCULATE -> CONT_RAMPUP
Found while building docs. Forgot to refactor strings.
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
* spi2: reformat update_xfer_duration_mu docstring
update_xfer_duration_mu docstring threw warning while building docs,
didn't use consistent indent in warning.
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
2019-01-09 11:39:23 +08:00
David Nadlinger
4fb434674d
coredevice: Fix ad9910 __all__ exports
2019-01-08 18:55:26 +00:00
887cb110a7
firmware: fix default DRTIO routing table
2019-01-08 20:46:53 +08:00
David Nadlinger
cadde970e1
urukul: Expand CPLD sync_sel explanation [nfc]
2019-01-08 02:37:58 +00:00
David Nadlinger
7bcdeb825b
ad9910: Add inverse FTW/ASF conversions
2019-01-08 02:18:14 +00:00
David Nadlinger
4d793d7149
ad9910: Truncate phase word to 16 bits
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This avoids overflowing into the asf portion of the register.
2019-01-08 02:18:14 +00:00
332bd6090f
satman: wait for CPLL/QPLL lock after setting drtio_transceiver::stable_clkin
2019-01-07 17:09:19 +08:00
3217488824
add Sayma RTM DRTIO target
2019-01-07 00:13:47 +08:00
b5501aaf00
firmware: program I2C switch on Sayma RTM
2019-01-06 14:54:52 +08:00
66b3132c28
sayma_amc: fix RTIO TSC instantiation
2019-01-06 14:54:32 +08:00
6e43c41103
firmware: support building without SDRAM
2019-01-05 23:41:30 +08:00
cf9447ab77
rtio/cri: remove unneeded CSR management
2019-01-05 23:40:45 +08:00
2c3510497b
firmware: fix not(has_spiflash) build
2019-01-05 23:40:03 +08:00
2100a8b1f1
sayma_amc: more fighting with vivado timing analyzer
2019-01-05 12:25:30 +08:00
Drew Risinger
b58d59a9e7
pyon: fix grammar in module docstring.
...
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
2019-01-04 19:31:08 +00:00
a93fdb8c9d
drtio: disable all destinations in gateware at startup
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Otherwise, kernels fail to get a RTIODestinationUnreachable exception when attempting
to reach a DRTIO destination that has never been up.
2019-01-04 23:42:12 +08:00
62d7c89c48
sayma_amc: use high-resolution TTL on SMAs ( #792 )
2019-01-03 20:50:38 +08:00
0972d61e81
ttl_serdes_ultrascale: use GTH clock domains
2019-01-03 20:50:04 +08:00
f007895fad
drtio/gth_ultrascale: fix rtiox clock domain
2019-01-03 20:49:38 +08:00
10ebf63c47
jesd204_tools: get the Vivado timing analyzer to behave
2019-01-03 20:22:35 +08:00
d6a3172a3e
update copyright year
2019-01-03 20:21:34 +08:00
4af8fd6a0d
ttl_serdes_ultrascale: fix Input
2019-01-03 20:14:54 +08:00
175f8b8ccc
drtio/gth_ultrascale: generate multiplied RTIO clock from BUFG_GT ( #792 )
2019-01-03 20:14:18 +08:00
77126ce5b3
kasli: use hwrev 1.1 by default for DRTIO examples
2019-01-02 23:04:20 +08:00
ab9ca0ee0a
kasli: use 150MHz for DRTIO by default (Sayma compatibility)
2019-01-02 23:03:57 +08:00
cc58318500
siphaser: autocalibrate skew using RX synchronizer
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* removes the hardcoded, (poorly) manually determined skew value
* does not need si5324_clkout_fabric anymore (broken on Sayma RTM due to wrong IO voltage)
2019-01-02 22:29:27 +08:00
f5cda3689e
sayma_amc: enable DRTIO on master SATA connector for MasterDAC variant
2019-01-02 16:46:16 +08:00
Drew
d60b95f481
tdr.py: typo ( #1220 )
2018-12-18 18:47:09 +00:00
a7d4d3bda9
ad9910: CONT_RECIRCULATE -> CONT_RAMPUP
2018-12-17 13:25:00 +00:00
35bdf26f01
Merge branch 'ad9910-ram'
2018-12-17 21:16:44 +08:00
David Nadlinger
e608d6ffd3
coredevice, firmware: Add rtio_input_timestamped_data
...
Integration tests to follow as part of an RTIO counter phy that
makes use of this.
2018-12-15 00:35:04 +00:00
David Nadlinger
8e30c4574b
firmware: Treat timestamps consistently as signed [nfc]
...
This matches other functions and the ARTIQ Python side, but
isn't actually an ABI change.
2018-12-15 00:02:18 +00:00
38ce7ab8ff
sync_struct: handle TimeoutError as subscriber disconnection. Closes #1215
2018-12-13 06:58:54 +08:00
79eadb9465
ad9910: add RAM mode methods
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* also refactor the CFR1 access into a method
c.f. #1154
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-12-11 14:54:16 +00:00
6df4ae934f
eem: name the servo submodule
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This allows the migen namer to derive names for the ADC return clock
domain in the case of multiple SUServos
close #1201
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-12-11 11:36:40 +01:00
efd400b02c
ad9910: style [nfc]
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-12-11 11:36:25 +01:00
David Nadlinger
d4c393b2a8
firmware/ksupport: Update cfg(not(has_rtio)) stub signatures
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This fixes up 8caea0e6d3
2018-12-11 01:22:48 +00:00
d90eb3ae88
ad9910: add read64()
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-12-07 21:27:00 +00:00
baf88050fd
urukul: expand attenuator HITL unittests
...
* read back with cleared backing state
* individual channel settings
* check backing state
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-12-07 21:06:12 +00:00
Kaifeng
cc143d5fec
kasli_tester: add support for windows platform. ( #1204 )
2018-12-05 14:06:45 +01:00
6aa341bc44
test_loopback_gate_timing: fix lat_offset
2018-12-02 20:52:32 +08:00
421834fa3e
compiler: document Target.little_endian
2018-12-02 19:07:18 +08:00
981a77834a
compiler: use default triple to determine data_layout for JIT
2018-12-02 18:52:13 +08:00
d931967e5c
fix previous commits
2018-12-02 18:32:03 +08:00
dd03fdfd1a
typo
2018-12-02 18:26:54 +08:00
8940009e1a
compiler: pass data_layout string to llvm.create_target_data before determining endianness
2018-12-02 18:26:19 +08:00
2e66788c6c
compiler: support little endian target when storing now
2018-12-02 17:40:34 +08:00
7e14f3ca4e
compiler,gateware: atomic now stores
2018-12-02 05:06:46 +08:00
fd00021a52
ctlmgr: do not raise exceptions in Controllers.__setitem__. Closes #1198
2018-12-01 18:09:58 +08:00
7f55376c75
test_loopback_gate_timing: print input timing for debugging
2018-12-01 18:09:53 +08:00
dce4f036db
grabber: work around windows numpy int peculiarity (same as a81c12de9)
2018-11-30 18:41:14 +08:00
156afb48ee
language: fix syscall arg handling
2018-11-30 17:59:24 +08:00
Paweł K
57caa7b149
artiq_flash: add command to erase flash memory ( #1197 )
2018-11-28 12:33:32 +02:00
c56c0ba41f
rtio/dds: use write-only RT2WB
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This saves one address bit and prevents issues with AD9914 and 8-bit addresses.
2018-11-26 07:38:15 +08:00
09141e5bee
rtio/wishbone: support write-only interface
2018-11-26 07:38:06 +08:00
450a035f9e
suservo: move overflowing RTIO address bits into data
2018-11-26 06:54:20 +08:00
ae8ef18f47
rtlink: sanity-check parameters
2018-11-26 01:14:02 +08:00
b32e89444c
Merge branch 'master' into new
2018-11-26 01:02:19 +08:00
af9ea1f324
gui: update background
2018-11-26 01:01:36 +08:00
a81c12de94
urukul: work around windows numpy int peculiarity
...
"OverflowError: Python int too large to convert to C long" otherwise
opticlock#74
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-25 16:56:45 +01:00
8f9858be4c
ad9914: remove automatic continuous phase compensation (like Urukul)
2018-11-19 22:00:20 +08:00
22a223bf82
examples/master: clean up remnants of early urukul tests
2018-11-19 21:42:41 +08:00
53e79f553f
Merge branch 'master' into new
2018-11-19 11:54:50 +08:00
a3e0b1c5b4
ad9914,spi2: add warnings about driver state and DMA. Closes #1113
2018-11-17 22:10:20 +08:00
78d4b3a7da
gateware/targets: expose variant lists
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This allows writing scripts that build all variants.
2018-11-17 22:10:20 +08:00
69e699c7bd
ttl: compensate for SED latency in input gating
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Closes #1137
2018-11-17 22:10:20 +08:00
3ad68f65c5
urukul: make get_att_mu() not alter state
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-16 14:56:26 +00:00
d1eee7c0ea
ad9910: ensure sync is driven when required
...
close #1194
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-16 13:21:01 +00:00
1b841805f6
Merge branch 'master' into new
2018-11-16 15:20:32 +08:00
d3483c1d26
kasli: fix SDRAM read delay reset/wrap issue. Closes #1149
2018-11-15 19:40:35 +08:00
494ffca4d3
gui,scan: add CenterScan Scannable variant
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* parametrized by center/span/step instead of
start/stop/npoints which is more convenient in some applications
* no scan widget support so far
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-15 13:30:43 +08:00
f77a75ab17
test_ad9910: robustify w.r.t. profile synchronization
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 08:42:27 +01:00
c3178c2cab
ad9910: profile support
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 08:30:28 +01:00
d0cadfeb4b
ad9910: more idiomatic register names
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 07:55:01 +01:00
a52d1be140
urukul: expose PROFILE setting
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* add documentation
* add unittest
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 07:43:56 +01:00
2af6edb8f5
eem: fix reset/sync in suservo
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-13 13:00:54 +00:00
whitequark
248c1cf7dc
firmware: fix another TOCTTOU race in sync/async RPC code.
2018-11-13 00:58:20 +08:00
whitequark
68aad3e482
firmware: fix TOCTTOU race in sync/async RPC code.
...
Before this commit, the main loop in session code was laid like:
1. process_kern_queued_rpc
2. process_host_message
3. process_kern_message
If a host message (such as an RPC reply) caused the kernel to exit,
then any async RPCs would not complete, since RunFinished immediately
shuts down the kernel.
Fix this by reordering 1 and 2.
2018-11-13 00:57:09 +08:00
whitequark
dd829afebd
firmware: fix another TOCTTOU race in sync/async RPC code.
2018-11-12 15:42:07 +00:00
whitequark
583bba8777
Revert "firmware: workaround for RPC failures"
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This reverts commit 59033d2588
2018-11-12 15:36:36 +00:00
whitequark
0edae64afb
firmware: fix TOCTTOU race in sync/async RPC code.
...
Before this commit, the main loop in session code was laid like:
1. process_kern_queued_rpc
2. process_host_message
3. process_kern_message
If a host message (such as an RPC reply) caused the kernel to exit,
then any async RPCs would not complete, since RunFinished immediately
shuts down the kernel.
Fix this by reordering 1 and 2.
2018-11-12 15:30:59 +00:00
59033d2588
firmware: workaround for RPC failures
2018-11-12 19:51:54 +08:00
84a6b3d09b
runtime: fix DMA recording after now-pinning
2018-11-10 14:14:55 +08:00
a4997c56cf
ad9910: simplify edge detection logic
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 18:54:34 +00:00
14b6b63916
ad9910: rewire io_delay tuning
...
This now reliably locates the SYNC_CLK-IO_UPDATE edge by doing two
scans at different delays between start and stop IO_UPDATE.
It also works well when one delay is very close to the edge.
And it correctly identifies which (start or stop) pulse hit or crossed
the SYNC_CLK edge.
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 18:38:27 +00:00
1f7858b80b
test/dsp: fix rtio_output
2018-11-09 22:11:44 +08:00
e509ab8553
test/dsp: use absolute import path
...
Avoids "ImportError: attempted relative import with no known parent package"
when doing a simple "python -m unittest test_XXX.py".
2018-11-09 22:10:46 +08:00
38c6878d49
urukul: mention min/max attenuation
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 13:32:05 +01:00
e565ca6b82
urukul: slow down att write to datasheet limit
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 13:23:06 +01:00
998be50f07
urukul: handle MSB in att_reg
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 13:21:14 +01:00
c990b5e4f1
Merge remote-tracking branch 'origin/master' into new
2018-11-08 20:21:56 +08:00
a0cc7311ad
test: tighten test_pulse_rate
2018-11-08 20:17:55 +08:00
0bee43aa58
sawg: use new rtio_output() API
2018-11-08 20:16:30 +08:00
bec25cbaa0
suservo: use new rtio_output() API
2018-11-08 20:13:14 +08:00
e8d58b35b4
spi2: use new rtio_output() API
2018-11-08 20:12:30 +08:00
d18546550e
grabber: use new rtio_output() API
2018-11-08 19:15:50 +08:00
2549e623c1
ad9914: use new rtio_output() API
2018-11-08 19:15:44 +08:00
David Nadlinger
9740032a94
firmware: Fix dma_record_output_wide
2018-11-08 11:06:43 +00:00
f74dda639f
drtio: 8-bit address
2018-11-08 18:36:20 +08:00
8caea0e6d3
gateware,runtime: optimize RTIO kernel interface further
...
* now pinning (TODO: atomicity)
* for inputs, merge request and timeout registers
2018-11-08 18:29:24 +08:00
fcb611d1d2
test_ad9910: don't expect large SYNC_IN delay margins
...
sinara-hw/Urukul#16
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-07 18:18:35 +01:00
aadf5112b7
rtio: remove incorrect comment
2018-11-08 00:02:44 +08:00
fae95e73ad
ttl: use optimized rtio_output API
2018-11-07 23:41:43 +08:00
3d0c3cc1cf
gateware,runtime: optimize RTIO output interface
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* reduce address to 8 bits
* merge core, channel and address into 32-bit pre-computable "target"
* merge we register into data register
2018-11-07 23:39:58 +08:00
e6efe830c4
ad9910: rewire sync delay tuning
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* search from wide window end
* decouple margins and minimum window size
* add note about kasli jitter
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-07 14:52:03 +00:00
ad0254c17b
Merge branch 'switching125' into new
2018-11-07 22:03:18 +08:00
efd735a6ab
Revert "drtio: monitor RTIOClockMultiplier PLL ( #1155 )"
...
This reverts commit 469a66db61
2018-11-07 22:01:03 +08:00
6c00ab57c0
test_ad9910: relax SYNC window
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 19:31:38 +01:00
172633c7da
test_ad9910: default to a useful seed
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 17:35:57 +01:00
0b2661a34d
ad9910: robustify SYNC window finding
...
don't integrate too long, find the window tip fast and early
a couple 100 SYNC pulses are sufficient
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 12:41:21 +00:00
ba4bf6e59b
kasli: don't pass rtio pll feedback through bufg
...
UG472: "The MMCM performance increases because the
feedback clock is not subjected to noise on the core supply since it
never passes through a block powered by this supply."
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 11:58:55 +00:00
b6e4961b0f
kasli: lower RTIO clock jitter
...
* high bandwidth since the si5324 is good
* no low power ibufgds
* drop bufg between ibufgds and pll
* increase pll vco frequency to 1.5 GHz
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 11:43:19 +00:00
e17e458c58
ptb2: add sync to urukul0 for ad9910 usage
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 10:06:51 +00:00
73b7124091
test_ad9910: print sync scan for debugging
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Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 10:04:21 +01:00
9a3d81ffee
kasli: fix tester clk_sel
2018-11-06 14:49:21 +08:00
fb12df7e01
Revert "kasli_tester: urukul0 mmcx clock defunct"
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This reverts commit 68220c316d
2018-11-06 14:33:21 +08:00
31f68ddf6c
Merge branch 'urukul-sync'
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* urukul-sync: (29 commits)
urukul: flake8 [nfc]
ad9910: flake8 [nfc]
urukul/ad9910 test: remove unused import
test_urukul: relax speed
urukul,ad9910: print speed metrics
kasli: add PTB2 (external clock and SYNC)
kasli: add sync to LUH, HUB, Opticlock
kasli_tester: urukul0 mmcx clock defunct
test_ad9910: relax ifc mode read
tests: add Urukul-AD9910 HITL unittests including SYNC
ad9910: add init bit explanation
test: add Urukul CPLD HITL tests
ad9910: fiducial timestamp for tracking phase mode
ad9910: add phase modes
ad9910: fix pll timeout loop
tester: add urukul sync
ptb: back out urukul-sync
ad9910: add IO_UPDATE alignment and tuning
urukul: set up sync_in generator
ad9910: add io_update alignment measurement
...
close #1143
2018-11-05 19:54:30 +01:00
6fb18270a2
urukul: flake8 [nfc]
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:45:24 +01:00
832690af9a
ad9910: flake8 [nfc]
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:44:51 +01:00
6d525e2f9a
urukul/ad9910 test: remove unused import
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:40:57 +01:00
36c5a7cd04
test_urukul: relax speed
...
works fine at < 3µs here but needs <5 µs on buildbot-kasli-tester
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:20 +01:00
89fecfab50
urukul,ad9910: print speed metrics
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:18 +01:00
32d538f72b
kasli: add PTB2 (external clock and SYNC)
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:16 +01:00
d8a5951a13
kasli: add sync to LUH, HUB, Opticlock
...
for #1143 , also add missing LUH device db
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:14 +01:00
68220c316d
kasli_tester: urukul0 mmcx clock defunct
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:11 +01:00
89fadab63d
test_ad9910: relax ifc mode read
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:08 +01:00
f522e211ba
tests: add Urukul-AD9910 HITL unittests including SYNC
...
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:06 +01:00
9fb850ae75
ad9910: add init bit explanation
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:02 +01:00
bc04da15c5
test: add Urukul CPLD HITL tests
...
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:00 +01:00
141cc7d99f
ad9910: fiducial timestamp for tracking phase mode
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:58 +01:00
2f6d3f79ff
ad9910: add phase modes
...
* simplified and cross-referenced the explanation of the different
phase modes.
* semantically and functionally merged absolute and tracking/coherent
phase modes.
* simplified numerics to calculate phase correction
* added warning about possible inconsistency with DMA and default
phase mode
* restricted __all__ imports
* moved continuous/relative phase offset tracking from an instance
variable to a "handle" returned by set()/set_mu() in order to avoid
state inconsistency with DMA (#1113 #1115 )
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:55 +01:00
d3ad2b7633
ad9910: fix pll timeout loop
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:53 +01:00
4269d5ad5c
tester: add urukul sync
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:52 +01:00
60d3bc63a7
ptb: back out urukul-sync
...
... for backwards compatibility.
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:50 +01:00
06139c0f4d
ad9910: add IO_UPDATE alignment and tuning
...
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:48 +01:00
1066430fa8
urukul: set up sync_in generator
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:46 +01:00
4bbd833cfe
ad9910: add io_update alignment measurement
...
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:44 +01:00
7b92282012
ad9910: add docs for sync tuning, refactor
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:42 +01:00
8a47a6b2fb
ad9910: disable sync_clk output
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:40 +01:00
65e2ebf960
ad9910: add sync delay control, auto tuning
...
* expose multi device sync functionality
* sync delay configuration interface
* auto-tuning of sync delay from device_db seed
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:37 +01:00
8dbf5f87fd
ad9910: simplify io_update pulsing on init, set_mu
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:35 +01:00
0b3b07a7da
ad9910: add power down method
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:34 +01:00
3538444876
urukul: add sync_in to eem0-7 name
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:32 +01:00
0433e8f4fe
urukul: add sync_in generator
...
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:30 +01:00
f62c1ff0bb
TTLClockGen: expose acc_width
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:27 +01:00
f755a4682a
device_db_ptb: fix zotino clr
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:24 +01:00
David Nadlinger
f79b9d9e1e
ttl: Expand input gate/count API docstrings
2018-11-03 20:33:19 +08:00
David Nadlinger
f02ceee626
language: Clarify now_mu() docstring [nfc]
2018-11-03 20:33:19 +08:00
David Nadlinger
5d2e3f975f
coredevice: Add get_rtio_counter_mu() docstring [nfc]
2018-11-03 20:33:19 +08:00
David Nadlinger
d6fcc0529f
coredevice: Imperative mood in docstrings [nfc]
...
This follows Python conventions (PEP257) and unifies the style with
other comments.
2018-11-03 20:33:19 +08:00
David Nadlinger
cbdef0225c
ttl: Add target RTIO time argument to timestamp/count functions
...
Software-based tracking of timestamps is problematic (e.g. when
using DMA, see GitHub #1113 ).
2018-11-03 20:33:19 +08:00
David Nadlinger
2a0e1dabfb
ttl: Remove unused attribute [nfc]
2018-11-03 20:33:19 +08:00
David Nadlinger
17a5fb2dce
ttl: Remove error-prone sync() calls
...
These methods are problematic, as with DMA in the picture, the
timestamp member variables did not necessarily reflect the last
submitted event timestamp (see GitHub #1113 ).
sync() is only very rarely used in typical experimental code, so
the methods are removed without a transition period.
Core.wait_until() can be used to busy-wait for a specified RTIO
timestamp value on the core device CPU instead.
2018-11-03 20:33:19 +08:00
David Nadlinger
11e8c9d5f7
coredevice: Add Core.wait_until_mu()
...
(This supersedes TTLOut.sync(), see see GitHub #1113.)
2018-11-03 20:33:19 +08:00
David Nadlinger
cbfbe24d7a
ttl: Remove broken TTLClockGen.sync
...
The code currently doesn't compile because of a typo in the timestamp
field name. However, tracking event timestamps in software is
problematic anyway (e.g. with DMA, see GitHub #1113 ), so just remove
`sync()` altogether.
2018-11-03 20:33:19 +08:00
bc4a8157c0
kasli: add tsinghua2
2018-11-01 18:26:37 +08:00
89a961fb00
urukul, ad9912, ad9910: expose CFG RF switch better
...
* conincident setting of multiple switches
* per channel setting
2018-10-24 13:04:46 +02:00
48a142ed63
use FutureWarning instead of DeprecationWarning
...
DeprecationWarning is disabled by default and too easy to ignore.
2018-10-21 12:14:51 +08:00
9793632282
enviromnment: rename 'save' in set_dataset to 'archive'. Closes #1171
2018-10-21 12:08:34 +08:00
Marius Weber
029f9d983a
Tpz fixes ( #1178 )
...
* flake8
* fix TPZ constructor after move to asyncio
* Tcube fix docummentation in set_channel_enable_state
2018-10-20 20:49:15 +08:00
c52a6ca8e9
typo ( #1179 )
2018-10-20 20:40:07 +08:00
Florent Kermarrec
3318925f4e
firmware/liboard_misoc/sdram: use similar loops on read_level_scan and read_level for consistent results
2018-10-16 09:40:39 +02:00
6357a50d33
kasli: update nudt variant
2018-10-15 18:04:57 +08:00
David Nadlinger
e3cfbfed06
master: Add minimal docstring to worker_impl [nfc]
2018-10-14 10:41:32 +08:00
David Nadlinger
64b9a377da
master: Factor RIDCounter out into own module, explain worker_db module [nfc]
...
The docstrings are quite minimal still, but should already
help with navigating the different layers when getting
accustomed with the code base.
RIDCounter was moved to its own module, as it isn't really
related to the other classes (used from master only).
2018-10-14 10:41:32 +08:00
David Nadlinger
4641ddf002
master: Remove unused import [nfc]
2018-10-14 10:41:32 +08:00
661dd00c4c
ad9912: phase offset is 14 bit LSB aligned
...
c.f. sinara-hw/Urukul#15
2018-10-11 15:16:08 +02:00
hartytp
08074d5275
Urukul: add support for hardware v1.3 clocking options
2018-10-10 09:26:35 +02:00
469a66db61
drtio: monitor RTIOClockMultiplier PLL ( #1155 )
...
Debugging by Tom Harty
2018-10-08 14:50:02 +02:00
hartytp
1a1b454ed9
Urukul: flake8 (NFC)
2018-10-08 10:09:49 +01:00
5de319d76a
bit2bin: don't print string terminator
2018-10-08 10:13:03 +02:00
hartytp
9a509e5070
Zotino: increase delay after register read in init method to avoid underflows
2018-10-06 21:45:17 +08:00
86fe6b0594
kasli: add NUDT variant
2018-10-04 23:20:09 +08:00
a89bd6b684
kasli: swap Urukul EEMs for Tester
...
Updated to Urukul 1.3.
2018-10-04 23:19:31 +08:00
9f96b6bcda
kasli: use 125MHz DRTIO freq for testing
2018-10-04 10:41:01 +08:00
969a305c5a
Merge branch 'master' into switching125
2018-10-04 10:08:42 +08:00
d0ee2c2955
opticlock: external 100 MHz
2018-09-28 19:05:18 +02:00
3b3fddb5a4
kasli: add mitll2
2018-09-27 23:21:52 +08:00
998a468983
examples: add grabber to device databases
2018-09-27 16:09:25 +08:00
c71e442929
documentation improvements
...
Based on PR #1101 by @drewrisinger
2018-09-26 12:12:37 +08:00
b92350b0f6
drtio: monitor RTIOClockMultiplier PLL ( #1155 )
...
Debugging by Tom Harty
2018-09-26 10:52:08 +08:00
53c7a5f2c6
dashboard: fix TTL moninj level display
2018-09-26 10:32:08 +08:00
212892d92f
style
2018-09-26 10:13:33 +08:00
20cddb6a25
tester: handle no available ttl outputs
2018-09-24 09:19:28 +00:00
73f0de7c79
sayma: DRTIO master fixes
2018-09-20 11:15:45 +08:00
1b7f403a4b
drtio: remove remote RTIO PHY resets
2018-09-20 11:10:32 +08:00
53a979e74d
rtio: cleanup resets
2018-09-20 10:58:38 +08:00
251d90c3d5
drtio: clear read request in satellite only after reply has been fully sent
...
Otherwise, chan_sel become invalid before the end of the packet, which
can cause the interconnect to invalidate i_timestamp and i_data which results
in corruption of the end of the packet.
2018-09-20 08:53:45 +08:00
69d060b639
drtio: fix satellite i_status handling
2018-09-19 20:57:21 +08:00
b86b6dcc09
drtio: add switching input test
2018-09-19 17:50:29 +08:00
08be176369
drtio: fix satellite i_status handling
2018-09-19 17:50:18 +08:00
3d965910f7
Revert "drtio: implement per-destination underflow margins"
...
This reverts commit 142c952e3d
2018-09-19 17:05:48 +08:00
142c952e3d
drtio: implement per-destination underflow margins
2018-09-19 17:03:15 +08:00
62642957cd
runtime: fix DRTIO aux channel race condition
2018-09-19 11:16:21 +08:00
David Nadlinger
b482f5feae
firmware: Use larger ARP cache
...
This works around a problematic interaction between ARP cache
expiry in smoltcp (with its 3 seconds timeout before a discovery
request is sent) and our TCP keepalive settings, where the timeout
is reached before the keepalive had a chance to be sent.
GitHub: Closes #1150 .
2018-09-18 14:46:52 +00:00
970d1bf147
drtio: add switching unittest
2018-09-18 15:27:52 +08:00
eda15a596c
drtio: add buffering to repeater
2018-09-18 15:27:25 +08:00
2b44786f73
drtio: add repeater input support
2018-09-17 23:45:27 +08:00
whitequark
c33f74dabe
firmware: derive Clone for Mutex.
2018-09-15 15:24:44 +00:00
c8cd830118
drtio: implement get_rtio_destination_status for kernels
2018-09-15 19:11:22 +08:00
f7ad7a99e3
firmware: set DEST_COUNT to 0 without routing
2018-09-15 19:10:52 +08:00
3cbdf2fbac
kasli: cleanup drtio blink example
2018-09-15 18:43:27 +08:00
d38755feff
drtio: implement destination state checks on operations
2018-09-15 15:55:45 +08:00
whitequark
1990ab35d3
firmware: implement mutexes.
2018-09-15 07:35:35 +00:00
cd61ee858c
kasli: fix satellite TSC instantiation
2018-09-15 14:06:54 +08:00
7565d816e4
frontend: remove artiq_pcap. Closes #1152
2018-09-15 12:09:37 +08:00
eaeab0c9bd
frontend: add artiq_rtiomon
2018-09-15 12:09:32 +08:00
c0c413196a
frontend: remove artiq_pcap. Closes #1152
2018-09-15 12:08:06 +08:00
f097b4104c
satman: not(has_drtio_routing) fixes
2018-09-15 12:06:47 +08:00
0017cb756e
frontend: add artiq_rtiomon
2018-09-15 10:44:59 +08:00
2f010e0109
runtime: improve moninj aux error logging
2018-09-15 10:44:41 +08:00
20ed393c1e
style
2018-09-15 10:43:50 +08:00
f8c6fa5ad6
typo
2018-09-15 10:43:36 +08:00
65da1fee4a
firmware: fix build without DRTIO
2018-09-14 20:38:41 +08:00
d19550daf8
firmware: simplify drtioaux function names
2018-09-14 20:32:09 +08:00
ae72e3a51e
firmware: add support for moninj and kern_hwreq over DRTIO switching
2018-09-14 20:26:39 +08:00
1ef39a98a7
drtio: implement per-destination buffer space
2018-09-13 16:16:32 +08:00
e95638e0a7
style
2018-09-13 15:54:28 +08:00
042b0065de
runtime: print destination up message for local RTIO
2018-09-13 14:10:52 +08:00
fa872c3341
firmware: implement DRTIO destination survey
2018-09-13 12:00:29 +08:00
6cf3db3485
satman: forward RTIO resets
2018-09-12 23:02:54 +08:00
5a9cc004f2
drtio: receive and print unsolicited aux packets
...
Helps with debugging and prevents the aux channel from getting stuck after packets arrive after the timeout.
2018-09-12 22:57:21 +08:00
0befec7d26
drtio: improve repeater error reports
2018-09-12 20:54:01 +08:00
420e1cb1d0
cri: fix firmware routing table access
2018-09-12 18:08:16 +08:00
e36a8536d7
runtime: better handling of aux timeouts
2018-09-12 17:31:23 +08:00
5bcd40ff59
cri: fix routing table depth
2018-09-12 17:30:55 +08:00
edf403b837
drtio: improve error reporting
2018-09-12 15:44:34 +08:00
95432a4ac1
drtio: remove old debugging features
2018-09-12 13:01:27 +08:00
8227037a84
examples: add kasli_drtioswitching
2018-09-11 22:20:18 +08:00
41972d6773
drtio: rt_packet_satellite CRI fixes
2018-09-11 22:19:55 +08:00
051bafbfd9
drtio: ensure 2 cycles between frames on the link
...
This gives time for setting chan_sel before cmd on CRI.
2018-09-11 22:18:42 +08:00
251b9a2b0d
drtio: do not lock up master when satellite repeatedly fails to answer buffer space reqs
2018-09-11 22:17:57 +08:00
5439abaa9d
satman: fix error messages
2018-09-11 20:10:52 +08:00
36e3fedfc6
runtime: print routing table at boot
2018-09-11 20:10:33 +08:00
e6bd835b5d
satman: fix rank setting
2018-09-11 20:04:51 +08:00
2679a35082
firwmare: propagate DRTIO routing table and rank all the way
2018-09-11 18:28:17 +08:00
c0c5867f9e
satman: increase stack size
...
Prevents crashing when running the routing code.
Will have to be shrunk back on Sayma RTM.
2018-09-11 18:23:51 +08:00
a23af67f2b
satman: print better debugging information on exception
2018-09-11 18:23:36 +08:00
f5b386c0d8
firmware: fix routing table formatting
2018-09-11 18:22:45 +08:00
b38c57d73b
firmware: send DRTIO routing table to satellite
2018-09-11 14:12:41 +08:00
3d29a7ed14
firmware: add fmt::Display to RoutingTable
2018-09-11 11:27:56 +08:00
2fff96802b
runtime: remove support for building without RTIO
2018-09-10 23:09:02 +08:00
19a14b68b1
runtime: program DRTIO routing table into gateware
2018-09-10 22:48:56 +08:00
264078baba
style
2018-09-10 22:29:35 +08:00
e01efbcb8a
runtime: merge sync_tsc and wait_tsc_ack
2018-09-10 22:17:00 +08:00
4d889c0c4e
firmware: improve DRTIO log messages
2018-09-10 21:40:02 +08:00
663432adbd
satman: load TSCs of downstream devices
2018-09-10 20:34:33 +08:00
bc1d3fda6a
satman: ping repeater links
...
Tested OK on hardware.
2018-09-10 20:17:13 +08:00
31bef9918e
firmware: fix drtio_routing compatibility with master and satellite
2018-09-10 20:16:42 +08:00
7ec45efdcf
kasli: add missing cri_con to Satellite
2018-09-10 20:16:09 +08:00
014cfd8dbd
firmware: add drtioaux routing packets
2018-09-09 22:44:25 +08:00
7ae44f3417
firmware: add routing table (WIP)
2018-09-09 21:49:28 +08:00
496d1b08fd
kasli: enable routing in Master
2018-09-09 21:48:12 +08:00
ec302747e0
kasli: add DRTIO repeaters
2018-09-09 16:27:39 +08:00
d5577ec0d0
cri: add routing table support
2018-09-09 16:26:48 +08:00
df61b85988
drtio: fix imports
2018-09-09 14:11:32 +08:00
312256a18d
grabber: fix frame size off-by-1
2018-09-07 16:55:43 +02:00
ec62eb9373
drtio: minor cleanup
2018-09-07 17:51:38 +08:00
4d73fb5bc9
grabber: only advance when DVAL
2018-09-06 11:01:08 +02:00
87e0384e97
drtio: separate aux controller
...
This helps with managing CSR groups and heterogeneous (satellite/repeaters) DRTIO cores.
2018-09-05 17:56:58 +08:00
92be9324df
add missing files
2018-09-05 16:09:02 +08:00
2884d595b3
drtio: add rt_controller_repeater
2018-09-05 16:08:40 +08:00
839f748a1d
drtio: add external TSC to repeater
2018-09-05 15:55:20 +08:00
5f20d79408
drtio: add timeout on satellite internal CRI buffer space request
2018-09-05 14:12:11 +08:00
1450e17a73
sayma: adapt to TSC and DRTIOSatellite changes
2018-09-05 12:10:41 +08:00
19ae9ac1b1
kc705: adapt to TSC changes
2018-09-05 12:07:28 +08:00
3d531cc923
kasli: adapt to TSC and DRTIOSatellite changes
2018-09-05 12:06:47 +08:00
4e4398afa6
analyzer: adapt to TSC changes
2018-09-05 12:06:20 +08:00
