dc71039934
sayma, metlino: increase integrated_sram_size on Ethernet-enabled variants
2019-10-30 21:36:00 +08:00
3042476230
artiq_netboot: remove unnecessary import
2019-10-30 21:29:33 +08:00
c96de7454d
remove artiq_devtool
2019-10-30 21:27:24 +08:00
88dbff46f4
add netboot tool
2019-10-30 21:24:51 +08:00
462cf5967e
bootloader: add netboot support
2019-10-30 21:23:42 +08:00
1f15e55021
comm_analyzer: don't assume every message has data
...
close #1377
2019-10-28 15:35:44 +01:00
David Nadlinger
611bcc4db4
compiler: Cache expensive target data layout queries
...
On one typical experiment, this shaves about 3 seconds (~25%)
off the overall kernel compilation time.
GitHub: Closes #1370 .
2019-10-28 11:09:25 +00:00
David Nadlinger
5d7f22ffa4
compiler: Remove provision for unused four-parameter llptr_to_var() form [nfc]
...
`var_type` was presumably intended to convert to a target type,
but wasn't actually acted on in the function body (nor was it
used anywhere in the codebase).
2019-10-28 11:02:46 +00:00
f2f7170d20
hmc7043: use recommend I/O standards
...
https://github.com/sinara-hw/Sayma_RTM/issues/116#issuecomment-544187952
2019-10-21 22:56:10 +08:00
47a83c71f1
firmware: more readable network addresses message
2019-10-21 14:00:14 +08:00
818d6b2f5a
bootloader: fix compilation problems
2019-10-21 13:28:17 +08:00
8f76a3218e
firmware: move i2c to libboard_misoc, enable IPv6 in bootloader, share network settings
2019-10-21 12:58:52 +08:00
1c5e749036
satman: remove compilation warning without JESD DACs
2019-10-21 12:53:54 +08:00
d26d80410e
runtime: refactor network settings
2019-10-19 17:56:35 +08:00
6d5dcb4211
runtime: enable IPv6. Closes #349
2019-10-19 17:20:33 +08:00
05e8f24c24
sayma2: JESD204 synchronization
2019-10-18 23:28:47 +08:00
62b49882b9
examples/kc705: fix dds_test
2019-10-17 07:37:00 +08:00
a8f85860c4
coreanalyzer: AD9914 fixes ( #1376 )
2019-10-17 07:29:33 +08:00
d42ff81144
examples/sayma_master: update device_db
2019-10-16 18:49:25 +08:00
8fa3c6460e
sayma_amc: set direction of external TTL buffer according to RTIO PHY OE
2019-10-16 18:48:50 +08:00
37d0a5dc19
rtio/ttl: expose OE
2019-10-16 18:48:20 +08:00
bc060b7f01
style
2019-10-16 18:18:11 +08:00
40d64fc782
sayma: remove standalone examples (no longer supported)
2019-10-16 17:54:39 +08:00
21a1c6de3f
sayma: use SFP0 for DRTIO master
2019-10-16 17:53:40 +08:00
6cf06fba7b
examples: use default IP addresses for boards
2019-10-16 16:18:30 +08:00
314d9b5d06
kasli: default to 125MHz frequency for DRTIO
...
This is the consistent and most common option. Sayma will also eventually move to it.
2019-10-08 12:59:52 +08:00
4df2c5d1fb
sayma: prepare for SYSREF align
...
We will try DDMTD on the AMC first, as this is simpler and perhaps will work on v2 after the power supply fixes.
2019-10-08 12:30:47 +08:00
5ee81dc643
satman: define constants for JdacBasicRequest reqnos
2019-10-08 10:27:04 +08:00
4b3baf4825
firmware: run PRBS and STPL JESD204 tests
2019-10-08 00:10:36 +08:00
03007b896e
sayma_amc: sma -> mcx
2019-10-07 20:31:35 +08:00
ebd5d890f1
satman: check for JESD ready
2019-10-06 23:10:57 +08:00
90e3b83e80
hmc7043: turn on AMC_FPGA_SYSREF1
...
Florent's JESD core won't work at all without.
2019-10-06 22:49:00 +08:00
97a0dee3e8
jesd204: remove ibuf_disable
...
We use the MOSFET to mute the HMC7043 noise on hardware v2 instead.
2019-10-06 22:26:31 +08:00
1bc7743e03
sayma: fix hmc7043 output settings for v2 hardware
2019-10-06 21:50:29 +08:00
a421820a32
sayma: initialize DACs over DRTIO
2019-10-06 21:42:45 +08:00
f8e4cc37d0
sayma_rtm: reset and detect DACs
2019-10-06 20:15:27 +08:00
f62dc7e1d4
sayma: refactor JESD DAC channel groups
2019-10-06 20:15:09 +08:00
c4c884b8ce
ad9154: simplify, focus on AD9154 config and do not include JESD
2019-10-06 20:07:02 +08:00
fdba0bfbbc
satman: move now-unrelated hmc830_7043 init away from DRTIO transceiver init
2019-10-06 19:22:46 +08:00
1c6c22fde9
sayma_amc: HMC830_REF moved to RTM side
2019-10-06 18:15:37 +08:00
ad63908aff
hmc830_7043: enable_fpga_ibuf -> unmute
2019-10-06 18:13:59 +08:00
5ad65b9d30
hmc830_7043: remove clock_mux
2019-10-06 18:13:27 +08:00
e6ff44301b
sayma_amc: cleanup (v2.0 only)
2019-10-06 18:11:43 +08:00
e9b81f6e33
remove serwb
...
DRTIO is a better solution
2019-10-06 18:10:23 +08:00
7cd02d30b7
sayma_rtm_drtio: replace sayma_rtm
2019-10-06 17:59:53 +08:00
b3b85135a3
sayma_rtm_drtio: add DDMTD core, move specific cores out of SatelliteBase
2019-10-06 17:59:11 +08:00
346c985347
sayma_rtm_drtio: use artiq_sayma folder
2019-10-06 17:30:08 +08:00
e2a924449d
artiq_flash: use DRTIO RTM gateware
2019-10-06 17:28:14 +08:00
4198033657
sayma_rtm_drtio: cleanup (v2.0 only)
2019-10-06 16:42:34 +08:00
5612b31860
sayma_rtm_drtio: add HMC clock chip and DAC control
2019-10-06 16:15:24 +08:00
a8cf4c2b18
sayma_rtm: hwrev v2.0 by default
2019-10-06 13:25:30 +08:00
1bc5d44a7c
artiq_flash: do not flash RTM gateware on Sayma variants that don't need it
2019-10-06 13:15:50 +08:00
bb5ff46f7d
Merge branch 'wrpll'
2019-10-05 10:24:11 +08:00
7b95814cf5
sayma_amc: refactor, add SimpleSatellite variant
2019-10-05 10:24:06 +08:00
58b7bdcecc
sayma_amc: refactor RTM FPGA code
2019-10-05 10:24:06 +08:00
96fc4a21e8
sayma_amc: remove dummy FPGA pin assignment testing code
2019-10-05 10:24:06 +08:00
Tim Ballance
ada3b39f4e
Fix ad9910 ram mode asf scale error in polar mode
2019-10-04 20:14:41 +02:00
Tim Ballance
448080e71d
Fix ad9910 ram mode asf scale error
...
RAM mode amplitude to ASF conversion should be << 18 rather than << 16
2019-10-04 20:14:41 +02:00
6aa68e1715
sayma_rtm2: select filtered clock from Si5324
2019-10-04 22:56:16 +08:00
6cb0f5de59
sayma_amc: enable DRTIO switching
2019-10-04 22:55:23 +08:00
0cf8a46bbd
sayma_amc2: select filtered clock from Si5324
2019-10-04 21:28:26 +08:00
6f533727cb
artiq_flash: use regular bscan_spi_xcku040 for Sayma
...
The modified version is no longer necessary on v2 boards, and breaks flash bank 1.
2019-10-04 17:50:45 +08:00
4c1fe1de0d
environment: implement HasEnvironment.call_child_method ( #1366 )
2019-09-30 23:58:36 +08:00
Charles Baynham
0b1fb255a9
tools: Wrap Task _do() calls in a generic exception handler
...
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2019-09-20 23:00:59 +08:00
Charles Baynham
e50a6d5aaf
worker_impy: ignore newline at start of experiment docstring
2019-09-20 22:10:49 +08:00
f0e87d2e59
grabber: remove unused code
2019-09-20 15:26:12 +02:00
4e77be0511
firmware: add Cargo.lock header that newer cargo wants
2019-09-17 15:22:14 +08:00
Charles Baynham
b7abf2fb53
pyon: Handle inf in decoding
2019-09-12 09:46:05 +08:00
38fca01189
artiq_ddb_template: add su-servo support ( #1343 )
2019-09-11 15:52:25 +08:00
991c686d72
kasli_generic,eem: print RTIO channels in hex like artiq_ddb_template
2019-09-11 15:51:53 +08:00
f4dd7e5e29
kasli_tester: init urukul channel before calibrating
...
Otherwise the DDS is not initialized and with a cold system it fails to
find IO_UPDATE edges.
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-09-11 07:16:35 +00:00
7492a59f6d
kasli_generic: add SUServo support ( #1343 )
2019-09-11 11:12:48 +08:00
David Nadlinger
6d6f66338b
runtime: Update core config panic_reset command suggestion message
2019-09-10 19:31:19 +01:00
Charles Baynham
ddd34e5a9c
influx_schedule: log repo_rev along with other info
...
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2019-09-10 13:46:28 +02:00
98caaebade
consistent use of 'class name' terminology to select a class within an experiment file. Closes #1348
2019-09-09 15:16:33 +08:00
21021beb08
kasli: remove opticlock (moved to kasli_generic)
2019-09-09 15:03:10 +08:00
436662be52
ddb_template: add Novogorny support
2019-09-09 15:00:45 +08:00
69c2acd9d7
ddb_template: sampler cnv is ttl not spi
2019-09-09 14:57:42 +08:00
cfb5ef5548
kasli_generic: add Novogorny support
2019-09-09 14:54:34 +08:00
0b9168994f
Revert "dashboard: Sort TTL moninj channels by name"
...
This reverts commit b3db3ea6fcCloses #1288
2019-09-06 11:17:10 +08:00
Charles Baynham
d31f30a436
influxdb_schedule: fix typo in parameter name
2019-09-05 17:42:56 +02:00
Charles Baynham
7ac8feea19
influxdb_schedule: Handle all exceptions
2019-09-05 17:42:56 +02:00
1fb317778a
eem/grabber: allow third EEM to be specified
2019-08-29 18:58:12 +08:00
90e8e074cd
firmware: turn errors into &str for remote_i2c as well
...
should resolve breakage on a few targets/variants introduced by PR #1351
2019-08-29 09:05:47 +08:00
71b3c66af9
firmware: conditionally compile has_si5324
...
avoids unused warnings where this module is not used.
2019-08-29 09:04:54 +08:00
959679d8b7
wrpll: add I2CMasterMachine
2019-08-27 18:02:05 +08:00
c03c35f375
Revert "compiler: armv7-unknown-linux-gnueabihf -> armv7-linux-gnueabihf"
...
rustc insists on -unknown.
This reverts commit cf47fa44d8
2019-08-26 11:23:00 +08:00
cf47fa44d8
compiler: armv7-unknown-linux-gnueabihf -> armv7-linux-gnueabihf
2019-08-26 11:12:49 +08:00
98cd9a539c
compiler: support Cortex A9 target
2019-08-26 10:46:22 +08:00
afe162ceca
firmware: don't unwrap() but propagate pca9548 errors
2019-08-17 09:15:26 +08:00
a8aabd3815
firwmare: turn i2c errors into &str
2019-08-17 09:15:26 +08:00
8fc5ce902f
firmware: let kasli obtain default hardware_addr from i2c_eeprom
2019-08-17 09:15:26 +08:00
d666f3d573
firmware: factor out mod pca9548 from si5324
...
orepares for further i2c devices.
2019-08-17 09:15:26 +08:00
1fd2322662
wrpll/thls: implement global writeback
2019-08-15 23:16:17 +08:00
24082b687e
wrpll/filters: clean up and make compatible with thls
2019-08-15 17:58:22 +08:00
9331fafab0
wrpll/filters: new code from Weida
2019-08-15 17:24:40 +08:00
5c3974c265
wrpll/thls: fix opcode decoding
2019-08-15 17:12:48 +08:00
19620948bf
wrpll/thls: implement signed numbers
2019-08-15 17:04:17 +08:00
efc43142a6
wrpll/thls: implement min/max
2019-08-15 16:42:59 +08:00
44969b03ad
wrpll/thls: rework instruction decoding
2019-08-15 15:55:13 +08:00
2776c5b16b
wrpll/thls: support mulshift
2019-08-15 15:07:13 +08:00
e9b78b62db
kasli_tester/zotino: always alternate voltage sign
...
Before the voltages on a second Zotino would start 2.1, 1.9, 2.2, 1.8
..., 3.6, 0.4 and overlap with the voltages on the first.
Now the voltages are 2.1, -2.1, 2.2, -2.2, ..., 3.6, -3.6 which allows
quick identification of card/channel and easy prediction when deploying.
2019-08-06 17:38:55 +02:00
f861459ace
wrpll: add filter algorithms (WIP)
2019-08-02 13:23:16 +08:00
David Nadlinger
99e490f9ff
coredevice/suservo: Slightly reword get_adc[_mu]() docstring for clarity
...
This hopefully suggests a bit better that the value is the last one
fetched by the servo (i.e. needs the servo active to update), rather
than somehow requesting a new sample to be taken.
2019-07-30 12:22:08 +01:00
3f0657f2a8
artiq_influxdb_schedule: add schedule logger
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-07-26 14:47:18 +02:00
7a5dcbe60e
wrpll/thls: support processor start/stop
2019-07-24 18:51:33 +08:00
b8870997d0
doc: clarify TTL direction control with buffered cards
2019-07-24 10:04:45 +08:00
623446f82c
wrpll/thls: simple simulation demo
2019-07-20 18:50:57 +08:00
831b3514d3
wrpll/thls: stop at return statement
2019-07-19 16:27:29 +08:00
David Nadlinger
280915d54f
coredevice/suservo: Adjust T_CYCLE to match gateware
...
See GitHub #1338 .
2019-07-17 00:20:22 +01:00
34222b3f38
wrpll: encode thls program
2019-07-09 17:56:14 +08:00
5f461d08cd
wrpll: add simple thls compiler
2019-07-09 16:07:31 +08:00
f7e10759dc
suservo: note requirement to stop servo when accessing state
...
As already mentioned in the gateware.
One alternative would be to detect address collisions and
stall the read for one cycle.
Note that there will in general not be a consistent view of the servo
state unless the servo is stopped.
close #1337
2019-07-08 18:37:42 +02:00
e4fff390a8
si590 -> si549
...
Had mistaken the part numbers.
2019-07-07 09:39:55 +08:00
dceb5ae501
wrpll: Si590 I2C mux, CDC
2019-07-05 23:42:37 +08:00
f8dba7ae35
rtio: use BlindTransfer from Migen
2019-07-05 18:46:18 +08:00
5a9bb0ecba
runtime: fix incorrect 'RTIO clock failed' report
2019-06-24 23:33:13 +08:00
David Nadlinger
8bf9640185
coredevice/suservo: Fix output IIR state width in docstring
2019-06-21 11:27:39 +02:00
David Nadlinger
34f48f57cc
coredevice/suservo: Fix {get,set}_y_mu() scaling
...
Previously, Channel.set_y(1) would set the output to -1 instead.
2019-06-21 11:27:39 +02:00
f6edceb23d
kasli_tester: cleanup/fix test skipping
2019-06-21 16:00:14 +08:00
whitequark
b8b9fa51bd
libdyld: accept objects with no rela relocations.
2019-06-17 06:43:34 +00:00
David Nadlinger
0353966ef7
gateware/suservo: Sign-extend data on RTIO read-back
...
See GitHub #1327 for original patch by Brad Bondurant.
2019-06-14 23:46:16 +01:00
David Nadlinger
720838a23e
gateware/suservo: Avoid magic number for activation delay width
...
Mostly for documentation purposes; 8 bits ought to be enough for
everyone.
2019-06-14 23:45:40 +01:00
53789ba9aa
tester: handle urukul switch differences
2019-06-14 10:54:00 +00:00
6655e567df
ddb_template: urukul fixes
...
* fix/add sw (ad9912 and ad9910)
* allow pll_n to be changed
2019-06-14 10:53:03 +00:00
53c778ae2d
runtime: fix previous commit
2019-06-14 15:53:01 +08:00
a947867887
runtime: support Kasli Si5324 bypass via rtio_clock=e
2019-06-14 15:48:05 +08:00
66a66b03b4
style
2019-06-14 15:29:16 +08:00
87ce24e867
runtime: refactor startup and RTIO clocking initialization
2019-06-14 15:26:30 +08:00
43e58c939c
sayma: drop MasterDAC
...
This seemed like a good idea then, but it introduces complexity, corner cases, and additional testing difficulties.
Now Sayma works fine with Kasli as a master, which is simpler.
2019-06-14 14:06:16 +08:00
b04e15741b
drop SI5324_SAYMA_REF
2019-06-14 14:03:48 +08:00
636b4cae5a
tester: urukul single-eem mode
2019-06-13 12:48:42 +00:00
591de0e579
ddb_template: support urukul single-eem mode
2019-06-13 12:19:12 +00:00
967d192cbe
ddb_template: wrong copy paste comma
2019-06-13 11:30:22 +00:00
8853cf8df9
dashboard: work around disappearing TTL/DDS panel bug. Closes #1307
2019-06-13 18:41:42 +08:00
1a898c423a
aqctl_corelog: filter log messages. Closes #1316
2019-06-13 18:17:52 +08:00
834d03527b
examples/dds_setter: fix RTIO underflow
2019-06-13 18:07:39 +08:00
e3c58d5872
remove outdated kc705 examples
2019-06-13 18:06:26 +08:00
74e4b01201
urukul: document consequences of incorrect CPLD clock settings
2019-06-11 11:12:12 +08:00
adf3df2bb5
suservo coredevice driver: mask ftw to avoid erroneous sign extension
2019-06-03 21:40:04 +02:00
bc2cfd77f5
metlino: add EEMs
2019-05-19 18:16:00 +08:00
cdef50c0dd
sayma_amc: Urukul v1.3
2019-05-19 16:54:38 +08:00
34c61db790
artiq_flash: fix Metlino support
2019-05-19 16:37:40 +08:00
88b6496c8c
artiq_flash: add Metlino support
2019-05-19 16:30:10 +08:00
9dcaae6395
metlino: use variant output directory
2019-05-19 16:24:51 +08:00
b4779969d0
metlino: work around vivado bug ( #1230 )
2019-05-19 11:27:27 +08:00
874542f33f
add Metlino support
2019-05-19 10:57:43 +08:00
hartytp
cfe1f56f73
suservo: add some more comments to the RTServoMem to clarify the RTIO interface ( #1323 )
2019-05-17 16:12:35 +01:00
David Nadlinger
84b91ee8bd
master/scheduler: Document Deleter semantics [nfc]
...
From looking at the code, it wasn't obvious to me that this is
supposed to handle multiple calls to delete(). This is the case,
however, when for instance Scheduler.delete()ing a run, which
will then also be deleted again from AnalyzeStage.
2019-05-14 22:37:16 +01:00
hartytp
c2b4f0cfe3
sync_struct: catch ConnectionErrors in _receive_cr ( #1319 )
2019-05-10 12:53:51 +01:00
hartytp
bbcd1db025
sync_struct: replace ConnectionError subclasses with ConnectionError ( #1318 )
2019-05-10 12:48:12 +01:00
hartytp
30fe624fe5
sync_struct: flake8 [nfc] ( #1317 )
2019-05-10 12:42:06 +01:00
1a3d71760d
consolidate kasli example folders
2019-05-10 12:17:38 +08:00
f551491a84
remove sayma_masterdac example
2019-05-10 12:13:07 +08:00
72f7f8386f
remove old Kasli device databases ( #1289 )
2019-05-10 12:11:42 +08:00
86f462f40e
artiq_ddb_template: add edge counter support
2019-05-09 17:20:13 +08:00
fda3cb2482
kasli_generic: add edge counter support
2019-05-09 17:19:11 +08:00
ead9a42842
kasli: remove VLBAIMaster, VLBAISatellite variants
2019-05-08 15:58:25 +00:00
0c9b810501
kasli: remove PTB/PTB2/LUH/HUB variants
...
see sinara-systems and nix-scripts repos
2019-05-08 15:51:18 +00:00
1d2cc60e0d
kasli_generic: support ext_ref
2019-05-08 15:51:18 +00:00
948ea396c0
remove old buildbot kc705 device-db
2019-05-07 17:28:06 +08:00
3209197b0b
artiq_flash: do not needlessly look for artifacts
2019-05-07 17:20:13 +08:00
a1c97ec4dd
kasli_tester: support selection of TTL output to use as stimulus
2019-05-07 16:58:00 +08:00
4cc9bd33ce
test: only test_rpc_timing actually requires ARTIQ_LOW_LATENCY
2019-04-24 11:22:07 +08:00
bb39eedf5b
fix previous commit
2019-04-20 10:44:07 +08:00
93f4f31f45
devices.ctlmgr -> master.ctlmgr
2019-04-20 00:25:44 +08:00
56033b60a7
move thorlabs_tcube out of tree ( #887 )
2019-04-20 00:09:58 +08:00
eaec519ac8
move lda out of tree ( #887 )
2019-04-19 23:43:14 +08:00
d4781e9a8a
aqctl_corelog: add simulation mode
2019-04-19 23:42:37 +08:00
62e9b2d85e
move novatech409b out of tree ( #887 )
2019-04-19 21:56:16 +08:00
4c1fb0c2a1
move korad_ka3005p out of tree ( #887 )
2019-04-19 19:47:41 +08:00
73d6078883
use IP instead of hostname for kc705-1
...
Makes it easier to run tests in the Windows VM
2019-04-18 22:59:32 +08:00
David Nadlinger
4d215cf541
firmware: Add Si5324 config for 125 MHz ext ref
...
PLL divider settings as suggested by DSPLLsim 5.1.
2019-04-15 22:22:19 +01:00
David Nadlinger
dc7a642b26
test/lit: Make abs() integration test slightly more interesting
...
I had accidentally not included this local diff in the PR that was
merged as commit cdaf554736
2019-04-14 04:12:40 +01:00
David Nadlinger
cdaf554736
compiler: Implement abs() for scalars
...
GitHub: Fixes #1303 .
2019-04-13 13:39:16 +08:00
97b7ed557b
sayma_amc: do not use SFP0 (now used for Ethernet)
2019-04-12 18:47:18 +08:00
David Nadlinger
cd7a5a3683
firmware: Fix kernel RPC handling of zero-size values (e.g. empty arrays)
2019-03-31 18:33:44 +01:00
David Nadlinger
b4ddf4c86b
firmware: Make "unexpected reply from kernel CPU" log messages unique
...
This makes it easier to localize issues based on the log output.
2019-03-31 18:31:56 +01:00
David Nadlinger
236b30ac5f
coredevice: Add test for recent kernel RPC fixes
...
This covers all three (de)serialisation fixes.
2019-03-31 18:25:56 +01:00
David Nadlinger
88fd5c8440
compiler: Fix crash in escape analysis for assigning string literals
2019-03-31 17:10:27 +01:00
David Nadlinger
990e0b7dd9
compiler: Fix comparison of tuples of lists
2019-03-31 17:10:27 +01:00
David Nadlinger
baf102dbb2
compiler: Fix comparison of nested lists
2019-03-31 17:10:27 +01:00
David Nadlinger
8e225433a5
firmware: Fix kernel RPC strings size (memory corruption)
...
Test case to follow.
2019-03-31 17:10:27 +01:00
David Nadlinger
b8ff627be9
firmware: Fix kernel RPC tuple size calculation (memory corruption)
...
Test case to follow.
2019-03-31 17:10:27 +01:00
David Nadlinger
fc95183e04
coredevice: Fix host-side serialization of (nested) lists
...
Test case to follow.
2019-03-31 17:10:27 +01:00
David Nadlinger
f9af058b96
compiler: Quote tuples as TTuple values
...
Previously, they would end up being TInstances,
rendering them useless.
2019-03-31 23:40:21 +08:00
3634cfac86
typo
2019-03-31 22:27:07 +08:00
4580f3dac8
test/lit: support overriding libartiq_support.so
2019-03-31 22:26:09 +08:00
4499ef1748
kasli: only add moninj core if there are probes to monitor
2019-03-24 14:09:52 +08:00
5d31cf2268
sayma_rtm2: si5324_clkout -> cdr_clk_clean
2019-03-23 13:48:36 +08:00
560849e693
sayma_amc: add DRTIO transceiver on rtm_amc_link for v2 hardware
2019-03-23 13:41:22 +08:00
bbb8c00518
sayma_amc: default to satellite variant
2019-03-23 13:37:55 +08:00
18fbe0b081
sayma_rtm_drtio: support v2 hardware
2019-03-23 13:31:28 +08:00
c7205ad82f
sayma_rtm: preliminary v2 support
2019-03-23 12:37:03 +08:00
d07c6fcfea
ad9910: handle unprogrammed EEPROM and numpy corner cases
2019-03-22 14:28:47 +08:00
7cdcaf0d00
tests: fix coredevice tests after implementing scheduler defaults
2019-03-22 07:27:55 +08:00
33b28f6e56
sayma_amc: add placeholder code to use DDMTD signals on v2 hardware
2019-03-21 17:37:22 +08:00
2ec5a58c59
sayma_amc: si5324_clkout -> cdr_clk_clean
2019-03-21 14:09:33 +08:00
af785b9a9c
artiq_compile: fix after adding scheduler defaults
...
Closes #1290
2019-03-21 09:56:19 +08:00
8d2c1be44f
artiq_flash: ignore rtm_gateware on Sayma for variant autodetection
2019-03-17 15:57:50 +08:00
c2622297bd
urukul: use board_data instead of user_data to store calibration in EEPROM
2019-03-15 17:57:35 +08:00
a01425bc9c
kasli_tester: do not attempt to synchronize AD9912 Urukul
2019-03-15 17:13:29 +08:00
fcf8828cb6
fix tests, artiq_run after implementing scheduler defaults ( #1290 )
2019-03-13 17:20:30 +01:00
5e7c83c9cf
artiq_ddb_template: enable Urukul synchronization from EEPROM
2019-03-13 15:42:51 +08:00
e504262b67
kasli_tester: calibrate Urukul synchronization and write to EEPROM
2019-03-13 15:36:05 +08:00
346299e7f8
kasli_tester: enable EEPROM for Urukul synchronization
2019-03-13 15:35:23 +08:00
04e0c23e78
ad9910: support reading synchronization values from EEPROM
2019-03-13 15:34:47 +08:00
852048dce4
artiq_ddb_template: create Urukul EEPROM device
2019-03-13 15:34:23 +08:00
964a349a19
add Kasli I2C driver
2019-03-13 15:33:50 +08:00
c56c3e5588
dashboard: add support for experiment pipeline/priority/flush defaults
2019-03-12 10:54:15 +01:00
8659c769cb
master/language: add methods to set experiment pipeline/priority/flush defaults
2019-03-12 10:54:15 +01:00
b2177eff81
kasli_tester: run test_i2c_switch
2019-03-11 21:06:28 +08:00
227c729f56
fix permissions
2019-03-11 20:43:28 +08:00
David Nadlinger
b3db3ea6fc
dashboard: Sort TTL moninj channels by name
...
With growing system complexity, the moninj channel index is
no longer a very intuitive ordering for typical end users.
2019-03-11 03:30:14 +01:00
David Nadlinger
5fd92a6175
gui: Fix crash when quickly opening/closing applets
...
Quickly closing/reopening applets (e.g. quickly clicking the checkbox
on an entire folder of applets) would previously lead to an occasional
KeyError on the self.dock_to_item access in on_dock_closed, as close()
would be invoked more than once.
The geometry/checked state handling can potentially be cleaned up
further, but at least this avoid the crash.
2019-03-10 20:57:10 +00:00
e47ba4b35e
kasli_generic: fix identifier string
2019-03-08 19:57:20 +08:00
b219f8b5c7
artiq_flash: autodetect variant
2019-03-08 19:47:24 +08:00
fc9d4c7bdc
artiq_flash: fix sayma master detection
2019-03-08 19:36:35 +08:00
25bcebd1f6
artiq_flash: not all boards are development boards
2019-03-08 19:35:20 +08:00
ed2d8dfa7a
artiq_flash: resolve openocd symbolic links
...
On NixOS, openocd may be a symlink in /run/current-system/sw/bin when installed system-wide.
2019-03-08 12:43:06 +08:00
0d05d4b813
artiq_client: python 3.7 compatibility
2019-02-26 17:09:38 +08:00
ec966de007
thorlabs_tcube: cleanup
2019-02-26 16:50:19 +08:00
62c7f75a9e
sayma_amc: support hardware revisions
2019-02-25 23:49:45 +08:00
d45249197c
siphaser: improve ultrascale clock routing
2019-02-25 23:00:01 +08:00
de3992bbdd
kasli: remove HUST variants (supported by kasli_generic)
2019-02-23 15:44:17 +08:00
791f830ef6
kasli_generic: support DRTIO
2019-02-23 15:41:05 +08:00
d39338d59f
artiq_ddb_template: fix --satellite
2019-02-23 15:27:18 +08:00
d79a6ee41c
artiq_ddb_template: fix pll_vco indentation
2019-02-22 23:50:30 +08:00
62985fbd29
binaries -> board-support
2019-02-22 23:18:01 +08:00
1c35c051a5
kasli: remove variants supported by generic builder
2019-02-22 23:08:49 +08:00
05b128469f
artiq_ddb_template: support setting Urukul pll_vco
2019-02-22 22:59:20 +08:00
cd60803f21
device_ddb_template: add Sampler, Zotino, Grabber and SFP LED support
2019-02-22 20:07:15 +08:00
269f0a4d6f
artiq_ddb_template: add Urukul support
2019-02-22 19:33:27 +08:00
8049c52d06
frontend: add artiq_ddb_template (WIP, TTL only)
2019-02-22 17:19:48 +08:00
8edc2318ab
style
2019-02-22 17:19:20 +08:00
aee8965897
ad9910: add ram conversion tooling and unittests
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-02-21 15:59:52 +00:00
ec6588174b
ad9910: add ram operation unittests
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-02-21 15:14:32 +00:00
b57cad77ad
ad9910: make ram read work for short segments
...
also cleanup and style
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-02-21 14:47:58 +00:00
596d3e20d7
dashboard,browser: do not call get_user_config_dir() in argparse
...
This caused two problems when building the docs:
* the path printed in the docs depends on the machine where they are built
* it pollutes ~/.config, and also breaks Nix builds
2019-02-19 15:43:04 +08:00
40a0cf806d
support overriding versioneer
2019-02-17 14:49:52 +08:00
6ad2e13515
kasli: add generic builder (WIP)
2019-02-12 19:18:09 +08:00
2104a93f78
build_soc: allow overriding SoC class name
2019-02-12 18:33:52 +08:00
ff4e4f15ed
kasli: expose base SoC classes
2019-02-12 18:33:27 +08:00
whitequark
0a84dd38c1
Add missing test from d6eb2b02.
2019-02-10 07:25:53 +00:00
David Nadlinger
01c3000ef3
master: Print offending key on HDF5 dataset type error
...
This helps debugging the cause of TypeErrors arising from types
not handled by the HDF5 serializer, as the backtrace doesn't
otherwise include any useful information.
2019-02-09 20:50:38 +00:00
David Nadlinger
56b2e0c262
artiq_influxdb: Support append() in dataset _Mock
...
This went undetected as append mods were not actually in use
in any part of the codebase previously.
2019-02-09 20:50:38 +00:00
David Nadlinger
bf84226c7d
language: Support appending to datasets
2019-02-09 20:50:38 +00:00
David Nadlinger
820326960e
test: Add basic experiment dataset interface tests
2019-02-09 20:50:38 +00:00
2de1eaa521
dashboard: reconnect to core moninj
...
* handle disconnects like core device address changes and do a
disconnect/connect iteration
* after connection failure wait 10 seconds and try again
* this addresses the slight regression from release-2
to release-3 where the moninj protocol was made stateful
(#838 and #1125 )
* it would be much better to fix smoltcp/runtime to no loose the
connection under pressure (#1125 )
* the crashes reported in #838 look more like a race condition
* master disconnects still require dashboard restarts
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-02-08 23:52:16 +08:00
1cfd26dc2e
kasli: add UNSW variant
2019-02-08 17:51:51 +08:00
3e8fe3f29d
suservo: fix permissions
2019-02-08 14:54:02 +08:00
David Nadlinger
ef934ad958
Add test/release notes for command-less controllers
...
See eaa1b44b00
2019-02-07 21:51:15 +00:00
eaa1b44b00
ctlmgr: ignore controllers without a "command" field
...
Allow controllers to be specified without a "command" field. The user takes
responsibility for ensuring the controller is running: the controller manager
does not attempt to ping the controller. This is useful when one has a common
controller shared between several masters.
2019-02-07 21:50:29 +00:00
hartytp
0ebff04ad7
SUServo: apply bit masks to servo memory writes to prevent overflows
...
Signed-off-by: TPH <thomas.harty@physics.ox.ac.uk>
2019-02-07 17:04:11 +01:00
hartytp
f6142816b8
Revert "SUServo: remove references to non-existent a0 parameter" ( #1270 )
...
This reverts commit f3aab2b89156bbc1b12f847093a87a8933293df2.
Signed-off-by: TPH <thomas.harty@physics.ox.ac.uk>
2019-02-07 15:57:43 +00:00
hartytp
fe63c9b366
SUServo: remove references to non-existent a0 parameter ( #1268 )
...
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
2019-02-07 15:29:32 +00:00
hartytp
df6c1fca2c
SUServo: flake8 [NFC] ( #1267 )
...
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
2019-02-07 15:13:44 +00:00
hartytp
87e85bcc14
suservo: fix coefficient data writing
...
Signed-off-by: Thomas Harty <thomas.harty@physics.ox.ac.uk>
2019-02-07 14:47:11 +01:00
whitequark
d6eb2b023a
compiler: monomorphize casts first, but more carefully.
...
This reverts 425cd7851Fixes #1252 .
2019-02-07 06:24:32 +00:00
b56c7cec1e
kasli: use 100MHz RTIO and 800MHz Urukul frequencies on Berkeley target
...
Urukul sync is not reliable at 125/1000
2019-02-05 11:24:45 +08:00
5a7460a38e
kasli: add sync delays to device_db_berkeley
2019-02-01 22:14:03 +08:00
ea431b6982
sayma_rtm: use 150MHz RTIO freq for DDMTD
2019-01-31 20:43:44 +08:00
ec230d6560
sayma: move SYSREF DDMTD to the RTM
...
Put RTM Si5324 into bypass mode before running.
Needs rework to cut RTM Si5324 reset trace.
Needs rework to fix LVDS termination on RTM R310/R313 and R314/R315.
Needs uFL jumper cables between RTM "REF LO DIAG" and "CRD AUX CLKIN" (sic).
2019-01-31 20:39:33 +08:00
8119000982
sayma_rtm_drtio: use Si5324 soft reset
...
Needs easy board rework to cut trace at pin 1 of Si5324.
The Si5324 contains an internal pull-up on that pin.
Allows using Si5324 + HMC7043 chips at the same time.
Allows the Si5324 bypass hack for DDMTD experiments on the RTM.
2019-01-31 19:43:54 +08:00
82106dcd95
si5324: add bypass function
2019-01-31 19:38:55 +08:00
8bbd4207d8
si5324: use consistent bitmask
2019-01-31 19:35:56 +08:00
d3c608aaec
jesd204sync: reset and check lock status of DDMTD helper PLL in firmware
2019-01-31 15:11:16 +08:00
fa3b40141d
hmc830_7043: document sayma clock muxes
2019-01-31 15:10:11 +08:00
ec8560911f
siphaser: bugfixes
...
* Fix integer overflow in degree computation
* Add some phase slips after the first transition to get out of the jitter zone and avoid intermittent short windows
2019-01-30 16:56:38 +08:00
c591009220
sayma: report TSC phase of SYSREF (TSC LSBs on SYSREF rising edge) in SYSREF sampler
...
Better visibility, better diagnostics, allows some changing of SYSREF frequency while keeping the same gateware.
2019-01-29 23:30:01 +08:00
9d0d02a561
jesd204sync: increase tolerance for coarse->final target in calibrate_sysref_target
...
There is plenty of slack (it only needs to meet timing at the RTIO frequency).
2019-01-29 16:48:55 +08:00
ed6aa29897
jesd204sync: print more information on test_slip_ddmtd error
2019-01-29 16:47:29 +08:00
2e8decbce3
kasli_sawgmaster: generate a HMC830 clock with Urukul
2019-01-29 15:06:45 +08:00
9ae57fd51e
sayma: pass rtio_clk_freq to DDMTD core
2019-01-29 15:06:45 +08:00
90c9fa446f
test: add array transfer test
...
200 kB/s, more than a factor of 10 slower than the bare string transfer
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-28 14:30:44 +00:00
7a5d28b73d
jesd204sync: test SYSREF period
2019-01-28 19:11:38 +08:00
1a42e23fb4
jesd204sync: print DDMTD SYSREF final alignment delta
2019-01-28 18:39:16 +08:00
eebff6d77f
jesd204sync: fix max_phase_deviation
2019-01-28 18:38:18 +08:00
b9e3fab49c
jesd204sync: improve messaging
2019-01-28 18:37:46 +08:00
145f08f3fe
jesd204sync: update SYSREF S/H limit deviation tolerance
...
Follows the increased DDMTD resolution.
2019-01-28 18:21:31 +08:00
ba21dc8498
jesd204sync: improve messaging
2019-01-28 18:08:20 +08:00
3acee87df2
firmware: improve DDMTD resolution using dithering/averaging
2019-01-28 16:04:04 +08:00
cfe66549ff
jesd204sync: cleanup DDMTD averaging code
2019-01-28 14:14:50 +08:00
2b0d63db23
hmc830_7043: support 125MHz RTIO
2019-01-28 13:44:08 +08:00
bdd4e52a53
ad9154: support 125MHz RTIO
2019-01-28 13:43:52 +08:00
47312e55d3
sayma: set RTIO_FREQUENCY in MasterDAC
2019-01-28 13:43:28 +08:00
443d6d8688
sayma_amc: pass RTIO clock frequency to SiPhaser
2019-01-28 09:49:03 +08:00
3b6f47886e
firmware: print more info on DDMTD stability error
2019-01-27 23:06:11 +08:00
74fdd04622
firmware: test DDMTD stability
2019-01-27 20:39:12 +08:00
81b0046f98
ddmtd: add deglitchers
2019-01-27 20:38:41 +08:00
8254560577
sayma: properly determine SYSREF coarse calibration target
2019-01-27 16:00:36 +08:00
214394e3b0
sayma: reimplement DAC SYSREF autocalibration
2019-01-27 15:28:39 +08:00
fdbf1cc2b2
sayma: rework DAC SYSREF margin validation
...
Previous code did not work when delay range was not enough for two rotations.
This removes autocalibration, to be done later. Uses hardcoded value for now.
2019-01-27 14:17:54 +08:00
7e5c062c2c
firmware: bypass channel divider for HMC7043 DCLK
2019-01-27 11:49:34 +08:00
f73ffe44f9
firmware: implement DDMTD-based SYSREF/RTIO alignment (draft)
...
Mostly works and usually gets the DAC synchronized at 2.4GHz with Urukul across DRTIO.
Needs cleanup and optimization/characterization.
2019-01-27 09:51:24 +08:00
8632b553d2
ddmtd: use IOB register to sample input
2019-01-27 09:50:02 +08:00
d1ef036948
kasli_sawgmaster: initialize SAWG phase according to RTIO TSC
2019-01-27 09:49:31 +08:00
9966e789fc
sayma: simplify Ultrascale LVDS T false path
...
Recommended by Xilinx.
2019-01-25 23:40:48 +08:00
359fb1f207
sayma: fix DDMTD STA
2019-01-25 23:39:19 +08:00
cb04230f86
sayma: SYSREF setup/hold validation demonstration
...
This also removes the standalone target as the ISERDES used
for setup/hold check requires the fine RTIO clock, which in turn
requires a DRTIO transceiver due to the Ultrascale TPWS bug.
2019-01-25 16:58:58 +08:00
3356717316
sayma: DDMTD SYSREF measurement demonstration
2019-01-25 16:00:31 +08:00
4941fb3300
sayma: 2.4GHz DAC clocking (4X interpolation)
...
* gets another clock divider out of the way
* gets one cycle within range of the HMC7043 analog delay alone
* SYSREF/RTIO alignment removed, to be replaced with DDMTD-based scheme
2019-01-25 13:47:04 +08:00
cc9420d2c8
hmc7043: fix divider programming
2019-01-25 11:48:50 +08:00
8c5a502591
ad53xx: ignore F3 (reserved)
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-24 15:50:46 +01:00
bbac92442f
sayma: check hmc7043 slip period
2019-01-24 20:13:43 +08:00
a92cc91dcb
kasli_sawgmaster: correctly tune DDS and SAWG
2019-01-24 19:37:14 +08:00
f8b39b0b9a
sayma: enable 2X DAC interpolation
...
Seems to work just fine and gets one clock divider out of the way.
2019-01-24 18:28:01 +08:00
07b5b0d36d
kasli: adapt Master target to new hardware
2019-01-24 18:27:15 +08:00
154269b77a
kasli: fix HUST satellite Urukul
2019-01-23 17:59:43 +08:00
3b5fd3ac11
kasli_tester: fix grabber test
2019-01-23 17:59:25 +08:00
330c5610e9
ad9912: fix imports
2019-01-23 17:59:08 +08:00
390f05f762
firmware: use smoltcp release
2019-01-23 16:15:05 +08:00
d7e6f104d2
kasli: add HUST variants
2019-01-23 14:11:51 +08:00
81f2b2c864
kasli: remove unpopulated Tester EEMs
...
* matches hardware and avoids issues with programs that process the DDB (e.g. kasli_tester)
* shortens compilation times
2019-01-23 12:14:44 +08:00
b692981c8e
ad9910: add note about red front panel led
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-22 12:49:42 +01:00
a0eba5b09b
satman: support Grabber
2019-01-22 19:36:13 +08:00
2e3555de85
firmware: fix compilation error with more than 1 Grabber
2019-01-22 19:35:46 +08:00
9ee5fea88d
kasli: support optional SATA port for DRTIO
2019-01-22 18:06:48 +08:00
91e375ce6a
ad9910: don't reset the input divide-by-two
...
suspected of causing weird PLL lock timout errors
https://freenode.irclog.whitequark.org/m-labs/2019-01-22#1548148750-1548143221 ;
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-22 09:37:20 +00:00
81ff3d4b29
ad9912: add some slack after init
2019-01-21 17:10:58 +00:00
a9678dd9f2
test_frontends: always skip GUI programs
...
The "import PyQt5" hack breaks on nix/hydra.
2019-01-21 23:41:07 +08:00
84f7d006e8
ad9910: add precision about tune_io_update_delay/tune_sync_delay order
2019-01-21 19:40:55 +08:00
30051133b7
urukul: fix typos
2019-01-21 19:40:55 +08:00
30b2f54baa
kasli_tester: skip Zotino test when no Zotino is present
2019-01-21 18:11:41 +08:00
bff8c8cb05
kasli: add Berkeley variant
2019-01-21 17:44:17 +08:00
a987d2b2e5
kasli_tester: skip Grabber test when no Grabber is present
2019-01-21 17:43:48 +08:00
David Nadlinger
4ba4e9c540
test_scheduler: Test for hang when exiting with running experiments
...
The respective code path in artiq.master.scheduler._mk_worker_method
wasn't previously covered.
2019-01-20 19:45:50 +00:00
David Nadlinger
0dab7ecd73
master: Include RID in worker exception messages
...
This helps when debugging unexpected shutdown problems
after the fact.
2019-01-20 19:45:50 +00:00
David Nadlinger
e24e893303
master/scheduler: Fix misleading indentation [nfc]
2019-01-20 19:45:47 +00:00
David Nadlinger
e165a9a352
sync_struct: Factor action strings out into enum and document them [nfc]
2019-01-19 20:19:17 +00:00
David Nadlinger
c213ab13ba
sync_struct: Notifier.{read -> raw_view}, factor out common dict update code [nfc]
2019-01-19 20:19:17 +00:00
David Nadlinger
bd71852427
sync_struct: Tweak variable name to avoid confusion with init mod action [nfc]
2019-01-19 20:19:17 +00:00
David Nadlinger
90c144a685
test_pc_rpc: Remove leftover debug print [nfc]
...
This tidies up the test suite output, and we have verbose asserts
to show further information on breakage, should it occur.
2019-01-19 20:18:33 +00:00
a2ff2cc173
sayma_amc: use more selective IOBUFDS false path
2019-01-19 11:47:50 +08:00
40187d1957
ad9910: support configurable refclk divider and pll bypass
...
for #1248
* also always keep refclk input divider (by two) reset
2019-01-18 12:23:53 +00:00
385916a9a4
ad9912: support configurable clk_div
2019-01-18 12:16:08 +00:00
2bea5e3d58
urukul: support configurable refclk divider
...
for #1248
2019-01-18 12:09:32 +00:00
689714965b
monkey_patches: disable for Python >= 3.6.7
...
3.6 >=7 are fixed
3.7.0 is incompatible with the monkey patches and they do more harm than good
3.7 >=1 are fixed
2019-01-15 20:29:20 +08:00
David Nadlinger
1c71ae636a
examples: Add edge counters to kasli_tester variant
...
This enables test_edge_counter on the CI system.
2019-01-15 10:55:07 +00:00
David Nadlinger
67a6882e91
examples: Fix kasli_tester device_db offset comments
2019-01-15 10:55:07 +00:00
David Nadlinger
a565f77538
Add gateware input event counter
2019-01-15 10:55:07 +00:00
4cb9f77fd8
sayma_amc: fix Master timing constraints
2019-01-13 13:53:07 +08:00
David Nadlinger
6c52359e59
coredevice: Add _mu suffix to AD991x ref_time arguments
...
GitHub: Fixes #1243 .
2019-01-12 17:34:35 +00:00
David Nadlinger
24b1b9a480
Add smoke test for frontend commands
...
This ensures that at least --help works for all the commands,
preventing regressions like that in f3323a35d5
2019-01-12 13:50:53 +00:00
whitequark
425cd7851e
compiler: first monomorphize ints, then casts.
...
Fixes #1242 .
2019-01-12 13:40:12 +00:00
whitequark
49682d0159
Improve Python 3.7 compatibility.
...
async is now a full (non-contextual) keyword.
There are two more instances:
- artiq/frontend/artiq_client.py
- artiq/devices/thorlabs_tcube/driver.py
It is not immediately clear how to fix those, so they are left for
later work.
2019-01-12 13:17:59 +00:00
David Nadlinger
f3323a35d5
artiq_influxdb: Unbreak after verbosity_args rename
...
This fixes commit f2c1d32e54
2019-01-12 12:02:22 +00:00
David Nadlinger
48fc175a6b
coredevice.ttl: More imperative mood in docstrings [nfc]
...
This follows Python conventions (PEP257) and unifies the style with
other comments.
2019-01-12 12:01:55 +00:00
Drew
f2c1d32e54
frontend: add --version flag to cmd line args ( #1181 )
2019-01-12 09:47:47 +08:00
David Nadlinger
3e84ec2bf1
coredevice.ad9910: Fix phase tracking ref_time passing
...
This is difficult to test without hardware mocks or some
form of phase readback, but the symptom was that e.g.
`self.dds.set(…, ref_time=now_mu() - 1)` would fail
periodically, that is, whenever bit 32 of the timestamp
would be set (which would be turned into the sign bit).
This is a fairly sinister issue, and is probably a compiler
bug of some sort (either accepts-invalid or wrong type inference).
2019-01-12 00:47:38 +00:00
Drew
66861e6708
test_pc_rpc: fix equality bug ( #1188 ) ( #1239 )
...
Fixes bug from 5108ed8. Truth value of multi-element numpy array is
not defined. Completes #1186 and fixes/amends #1188 .
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
2019-01-11 10:15:44 +08:00
101671fbbf
core_analyzer: support uniform VCD time intervals
...
close #1236
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-10 19:35:09 +01:00
Drew
99a0f61b35
artiq_client: remove custom input validation for built-in argparse ( #1185 )
2019-01-10 12:58:11 +08:00
Drew
721c6f3bcc
pc_rpc: fix handling of type annotations
2019-01-10 12:13:22 +08:00
088530604e
test_ad9910: relax tests
...
* tune_sync_delay: the opposite IO_UPDATE to SYNC_CLK alignment may not be perfectly
mis-aligned
* set_mu_speed: seems to be slower on the buildbot
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-09 17:27:42 +00:00
19748fe495
ad9910: fix RTIO fine timestamp nudging
...
Previously the TSC was truncated to an even coarse RTIO periods before doing
the setting SPI xfer. Afterwards the the IO update pulse would introduce
at least one but less than two RTIO cycles. Ultimately the RTIO TSC was
truncated again to even. If the SPI xfer takes an odd number of RTIO
periods, then a subsequent xfer would collide.
close #1229
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-09 17:22:57 +00:00
b25ab1fc88
ad9910: add more slack in tune_sync_delay
...
close #1235
Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-01-09 16:07:31 +00:00
9b213b17af
sayma_amc: forward RTM UART in Master variant as well
2019-01-09 18:57:57 +08:00
c7b18952b8
sayma_amc: work around Ultrascale LVDS Toutbuf_delay_td_pad
2019-01-09 13:47:08 +08:00
62599c5f91
firmware: use consistent terminology
2019-01-09 13:46:18 +08:00
Drew
b3b0b6f0a5
artiq_influxdb: clarify argparse groups ( #1212 )
...
Make names of argparse group variables relate to what they're doing.
Meets Flake8.
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
2019-01-09 11:40:55 +08:00
David Nadlinger
101ed5d534
examples: Fix DRTIO destination indices ( #1231 )
...
Using the default routing table, links numbers and destinations
are offset by 1, as destination 0 is local RTIO.
2019-01-09 11:40:15 +08:00
Drew
40370c4d45
Docs: fix build warnings ( #1234 )
...
* ad9910: finish CONT_RECIRCULATE -> CONT_RAMPUP
Found while building docs. Forgot to refactor strings.
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
* spi2: reformat update_xfer_duration_mu docstring
update_xfer_duration_mu docstring threw warning while building docs,
didn't use consistent indent in warning.
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
2019-01-09 11:39:23 +08:00
David Nadlinger
4fb434674d
coredevice: Fix ad9910 __all__ exports
2019-01-08 18:55:26 +00:00
887cb110a7
firmware: fix default DRTIO routing table
2019-01-08 20:46:53 +08:00
David Nadlinger
cadde970e1
urukul: Expand CPLD sync_sel explanation [nfc]
2019-01-08 02:37:58 +00:00
David Nadlinger
7bcdeb825b
ad9910: Add inverse FTW/ASF conversions
2019-01-08 02:18:14 +00:00
David Nadlinger
4d793d7149
ad9910: Truncate phase word to 16 bits
...
This avoids overflowing into the asf portion of the register.
2019-01-08 02:18:14 +00:00
332bd6090f
satman: wait for CPLL/QPLL lock after setting drtio_transceiver::stable_clkin
2019-01-07 17:09:19 +08:00
3217488824
add Sayma RTM DRTIO target
2019-01-07 00:13:47 +08:00
b5501aaf00
firmware: program I2C switch on Sayma RTM
2019-01-06 14:54:52 +08:00
66b3132c28
sayma_amc: fix RTIO TSC instantiation
2019-01-06 14:54:32 +08:00
6e43c41103
firmware: support building without SDRAM
2019-01-05 23:41:30 +08:00
cf9447ab77
rtio/cri: remove unneeded CSR management
2019-01-05 23:40:45 +08:00
2c3510497b
firmware: fix not(has_spiflash) build
2019-01-05 23:40:03 +08:00
2100a8b1f1
sayma_amc: more fighting with vivado timing analyzer
2019-01-05 12:25:30 +08:00
Drew Risinger
b58d59a9e7
pyon: fix grammar in module docstring.
...
Signed-off-by: Drew Risinger <drewrisinger@users.noreply.github.com>
2019-01-04 19:31:08 +00:00
a93fdb8c9d
drtio: disable all destinations in gateware at startup
...
Otherwise, kernels fail to get a RTIODestinationUnreachable exception when attempting
to reach a DRTIO destination that has never been up.
2019-01-04 23:42:12 +08:00
62d7c89c48
sayma_amc: use high-resolution TTL on SMAs ( #792 )
2019-01-03 20:50:38 +08:00
0972d61e81
ttl_serdes_ultrascale: use GTH clock domains
2019-01-03 20:50:04 +08:00
f007895fad
drtio/gth_ultrascale: fix rtiox clock domain
2019-01-03 20:49:38 +08:00
10ebf63c47
jesd204_tools: get the Vivado timing analyzer to behave
2019-01-03 20:22:35 +08:00
d6a3172a3e
update copyright year
2019-01-03 20:21:34 +08:00
4af8fd6a0d
ttl_serdes_ultrascale: fix Input
2019-01-03 20:14:54 +08:00
175f8b8ccc
drtio/gth_ultrascale: generate multiplied RTIO clock from BUFG_GT ( #792 )
2019-01-03 20:14:18 +08:00
77126ce5b3
kasli: use hwrev 1.1 by default for DRTIO examples
2019-01-02 23:04:20 +08:00
ab9ca0ee0a
kasli: use 150MHz for DRTIO by default (Sayma compatibility)
2019-01-02 23:03:57 +08:00
cc58318500
siphaser: autocalibrate skew using RX synchronizer
...
* removes the hardcoded, (poorly) manually determined skew value
* does not need si5324_clkout_fabric anymore (broken on Sayma RTM due to wrong IO voltage)
2019-01-02 22:29:27 +08:00
f5cda3689e
sayma_amc: enable DRTIO on master SATA connector for MasterDAC variant
2019-01-02 16:46:16 +08:00
Drew
d60b95f481
tdr.py: typo ( #1220 )
2018-12-18 18:47:09 +00:00
a7d4d3bda9
ad9910: CONT_RECIRCULATE -> CONT_RAMPUP
2018-12-17 13:25:00 +00:00
35bdf26f01
Merge branch 'ad9910-ram'
2018-12-17 21:16:44 +08:00
David Nadlinger
e608d6ffd3
coredevice, firmware: Add rtio_input_timestamped_data
...
Integration tests to follow as part of an RTIO counter phy that
makes use of this.
2018-12-15 00:35:04 +00:00
David Nadlinger
8e30c4574b
firmware: Treat timestamps consistently as signed [nfc]
...
This matches other functions and the ARTIQ Python side, but
isn't actually an ABI change.
2018-12-15 00:02:18 +00:00
38ce7ab8ff
sync_struct: handle TimeoutError as subscriber disconnection. Closes #1215
2018-12-13 06:58:54 +08:00
79eadb9465
ad9910: add RAM mode methods
...
* also refactor the CFR1 access into a method
c.f. #1154
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-12-11 14:54:16 +00:00
6df4ae934f
eem: name the servo submodule
...
This allows the migen namer to derive names for the ADC return clock
domain in the case of multiple SUServos
close #1201
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-12-11 11:36:40 +01:00
efd400b02c
ad9910: style [nfc]
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-12-11 11:36:25 +01:00
David Nadlinger
d4c393b2a8
firmware/ksupport: Update cfg(not(has_rtio)) stub signatures
...
This fixes up 8caea0e6d3
2018-12-11 01:22:48 +00:00
d90eb3ae88
ad9910: add read64()
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-12-07 21:27:00 +00:00
baf88050fd
urukul: expand attenuator HITL unittests
...
* read back with cleared backing state
* individual channel settings
* check backing state
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-12-07 21:06:12 +00:00
Kaifeng
cc143d5fec
kasli_tester: add support for windows platform. ( #1204 )
2018-12-05 14:06:45 +01:00
6aa341bc44
test_loopback_gate_timing: fix lat_offset
2018-12-02 20:52:32 +08:00
421834fa3e
compiler: document Target.little_endian
2018-12-02 19:07:18 +08:00
981a77834a
compiler: use default triple to determine data_layout for JIT
2018-12-02 18:52:13 +08:00
d931967e5c
fix previous commits
2018-12-02 18:32:03 +08:00
dd03fdfd1a
typo
2018-12-02 18:26:54 +08:00
8940009e1a
compiler: pass data_layout string to llvm.create_target_data before determining endianness
2018-12-02 18:26:19 +08:00
2e66788c6c
compiler: support little endian target when storing now
2018-12-02 17:40:34 +08:00
7e14f3ca4e
compiler,gateware: atomic now stores
2018-12-02 05:06:46 +08:00
fd00021a52
ctlmgr: do not raise exceptions in Controllers.__setitem__. Closes #1198
2018-12-01 18:09:58 +08:00
7f55376c75
test_loopback_gate_timing: print input timing for debugging
2018-12-01 18:09:53 +08:00
dce4f036db
grabber: work around windows numpy int peculiarity (same as a81c12de9)
2018-11-30 18:41:14 +08:00
156afb48ee
language: fix syscall arg handling
2018-11-30 17:59:24 +08:00
Paweł K
57caa7b149
artiq_flash: add command to erase flash memory ( #1197 )
2018-11-28 12:33:32 +02:00
c56c0ba41f
rtio/dds: use write-only RT2WB
...
This saves one address bit and prevents issues with AD9914 and 8-bit addresses.
2018-11-26 07:38:15 +08:00
09141e5bee
rtio/wishbone: support write-only interface
2018-11-26 07:38:06 +08:00
450a035f9e
suservo: move overflowing RTIO address bits into data
2018-11-26 06:54:20 +08:00
ae8ef18f47
rtlink: sanity-check parameters
2018-11-26 01:14:02 +08:00
b32e89444c
Merge branch 'master' into new
2018-11-26 01:02:19 +08:00
af9ea1f324
gui: update background
2018-11-26 01:01:36 +08:00
a81c12de94
urukul: work around windows numpy int peculiarity
...
"OverflowError: Python int too large to convert to C long" otherwise
opticlock#74
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-25 16:56:45 +01:00
8f9858be4c
ad9914: remove automatic continuous phase compensation (like Urukul)
2018-11-19 22:00:20 +08:00
22a223bf82
examples/master: clean up remnants of early urukul tests
2018-11-19 21:42:41 +08:00
53e79f553f
Merge branch 'master' into new
2018-11-19 11:54:50 +08:00
a3e0b1c5b4
ad9914,spi2: add warnings about driver state and DMA. Closes #1113
2018-11-17 22:10:20 +08:00
78d4b3a7da
gateware/targets: expose variant lists
...
This allows writing scripts that build all variants.
2018-11-17 22:10:20 +08:00
69e699c7bd
ttl: compensate for SED latency in input gating
...
Closes #1137
2018-11-17 22:10:20 +08:00
3ad68f65c5
urukul: make get_att_mu() not alter state
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-16 14:56:26 +00:00
d1eee7c0ea
ad9910: ensure sync is driven when required
...
close #1194
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-16 13:21:01 +00:00
1b841805f6
Merge branch 'master' into new
2018-11-16 15:20:32 +08:00
d3483c1d26
kasli: fix SDRAM read delay reset/wrap issue. Closes #1149
2018-11-15 19:40:35 +08:00
494ffca4d3
gui,scan: add CenterScan Scannable variant
...
* parametrized by center/span/step instead of
start/stop/npoints which is more convenient in some applications
* no scan widget support so far
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-15 13:30:43 +08:00
f77a75ab17
test_ad9910: robustify w.r.t. profile synchronization
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 08:42:27 +01:00
c3178c2cab
ad9910: profile support
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 08:30:28 +01:00
d0cadfeb4b
ad9910: more idiomatic register names
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 07:55:01 +01:00
a52d1be140
urukul: expose PROFILE setting
...
* add documentation
* add unittest
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-14 07:43:56 +01:00
2af6edb8f5
eem: fix reset/sync in suservo
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-13 13:00:54 +00:00
whitequark
248c1cf7dc
firmware: fix another TOCTTOU race in sync/async RPC code.
2018-11-13 00:58:20 +08:00
whitequark
68aad3e482
firmware: fix TOCTTOU race in sync/async RPC code.
...
Before this commit, the main loop in session code was laid like:
1. process_kern_queued_rpc
2. process_host_message
3. process_kern_message
If a host message (such as an RPC reply) caused the kernel to exit,
then any async RPCs would not complete, since RunFinished immediately
shuts down the kernel.
Fix this by reordering 1 and 2.
2018-11-13 00:57:09 +08:00
whitequark
dd829afebd
firmware: fix another TOCTTOU race in sync/async RPC code.
2018-11-12 15:42:07 +00:00
whitequark
583bba8777
Revert "firmware: workaround for RPC failures"
...
This reverts commit 59033d2588
2018-11-12 15:36:36 +00:00
whitequark
0edae64afb
firmware: fix TOCTTOU race in sync/async RPC code.
...
Before this commit, the main loop in session code was laid like:
1. process_kern_queued_rpc
2. process_host_message
3. process_kern_message
If a host message (such as an RPC reply) caused the kernel to exit,
then any async RPCs would not complete, since RunFinished immediately
shuts down the kernel.
Fix this by reordering 1 and 2.
2018-11-12 15:30:59 +00:00
59033d2588
firmware: workaround for RPC failures
2018-11-12 19:51:54 +08:00
84a6b3d09b
runtime: fix DMA recording after now-pinning
2018-11-10 14:14:55 +08:00
a4997c56cf
ad9910: simplify edge detection logic
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 18:54:34 +00:00
14b6b63916
ad9910: rewire io_delay tuning
...
This now reliably locates the SYNC_CLK-IO_UPDATE edge by doing two
scans at different delays between start and stop IO_UPDATE.
It also works well when one delay is very close to the edge.
And it correctly identifies which (start or stop) pulse hit or crossed
the SYNC_CLK edge.
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 18:38:27 +00:00
1f7858b80b
test/dsp: fix rtio_output
2018-11-09 22:11:44 +08:00
e509ab8553
test/dsp: use absolute import path
...
Avoids "ImportError: attempted relative import with no known parent package"
when doing a simple "python -m unittest test_XXX.py".
2018-11-09 22:10:46 +08:00
38c6878d49
urukul: mention min/max attenuation
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 13:32:05 +01:00
e565ca6b82
urukul: slow down att write to datasheet limit
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 13:23:06 +01:00
998be50f07
urukul: handle MSB in att_reg
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-09 13:21:14 +01:00
c990b5e4f1
Merge remote-tracking branch 'origin/master' into new
2018-11-08 20:21:56 +08:00
a0cc7311ad
test: tighten test_pulse_rate
2018-11-08 20:17:55 +08:00
0bee43aa58
sawg: use new rtio_output() API
2018-11-08 20:16:30 +08:00
bec25cbaa0
suservo: use new rtio_output() API
2018-11-08 20:13:14 +08:00
e8d58b35b4
spi2: use new rtio_output() API
2018-11-08 20:12:30 +08:00
d18546550e
grabber: use new rtio_output() API
2018-11-08 19:15:50 +08:00
2549e623c1
ad9914: use new rtio_output() API
2018-11-08 19:15:44 +08:00
David Nadlinger
9740032a94
firmware: Fix dma_record_output_wide
2018-11-08 11:06:43 +00:00
f74dda639f
drtio: 8-bit address
2018-11-08 18:36:20 +08:00
8caea0e6d3
gateware,runtime: optimize RTIO kernel interface further
...
* now pinning (TODO: atomicity)
* for inputs, merge request and timeout registers
2018-11-08 18:29:24 +08:00
fcb611d1d2
test_ad9910: don't expect large SYNC_IN delay margins
...
sinara-hw/Urukul#16
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-07 18:18:35 +01:00
aadf5112b7
rtio: remove incorrect comment
2018-11-08 00:02:44 +08:00
fae95e73ad
ttl: use optimized rtio_output API
2018-11-07 23:41:43 +08:00
3d0c3cc1cf
gateware,runtime: optimize RTIO output interface
...
* reduce address to 8 bits
* merge core, channel and address into 32-bit pre-computable "target"
* merge we register into data register
2018-11-07 23:39:58 +08:00
e6efe830c4
ad9910: rewire sync delay tuning
...
* search from wide window end
* decouple margins and minimum window size
* add note about kasli jitter
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-07 14:52:03 +00:00
ad0254c17b
Merge branch 'switching125' into new
2018-11-07 22:03:18 +08:00
efd735a6ab
Revert "drtio: monitor RTIOClockMultiplier PLL ( #1155 )"
...
This reverts commit 469a66db61
2018-11-07 22:01:03 +08:00
6c00ab57c0
test_ad9910: relax SYNC window
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 19:31:38 +01:00
172633c7da
test_ad9910: default to a useful seed
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 17:35:57 +01:00
0b2661a34d
ad9910: robustify SYNC window finding
...
don't integrate too long, find the window tip fast and early
a couple 100 SYNC pulses are sufficient
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 12:41:21 +00:00
ba4bf6e59b
kasli: don't pass rtio pll feedback through bufg
...
UG472: "The MMCM performance increases because the
feedback clock is not subjected to noise on the core supply since it
never passes through a block powered by this supply."
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 11:58:55 +00:00
b6e4961b0f
kasli: lower RTIO clock jitter
...
* high bandwidth since the si5324 is good
* no low power ibufgds
* drop bufg between ibufgds and pll
* increase pll vco frequency to 1.5 GHz
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 11:43:19 +00:00
e17e458c58
ptb2: add sync to urukul0 for ad9910 usage
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 10:06:51 +00:00
73b7124091
test_ad9910: print sync scan for debugging
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-06 10:04:21 +01:00
9a3d81ffee
kasli: fix tester clk_sel
2018-11-06 14:49:21 +08:00
fb12df7e01
Revert "kasli_tester: urukul0 mmcx clock defunct"
...
This reverts commit 68220c316d
2018-11-06 14:33:21 +08:00
31f68ddf6c
Merge branch 'urukul-sync'
...
* urukul-sync: (29 commits)
urukul: flake8 [nfc]
ad9910: flake8 [nfc]
urukul/ad9910 test: remove unused import
test_urukul: relax speed
urukul,ad9910: print speed metrics
kasli: add PTB2 (external clock and SYNC)
kasli: add sync to LUH, HUB, Opticlock
kasli_tester: urukul0 mmcx clock defunct
test_ad9910: relax ifc mode read
tests: add Urukul-AD9910 HITL unittests including SYNC
ad9910: add init bit explanation
test: add Urukul CPLD HITL tests
ad9910: fiducial timestamp for tracking phase mode
ad9910: add phase modes
ad9910: fix pll timeout loop
tester: add urukul sync
ptb: back out urukul-sync
ad9910: add IO_UPDATE alignment and tuning
urukul: set up sync_in generator
ad9910: add io_update alignment measurement
...
close #1143
2018-11-05 19:54:30 +01:00
6fb18270a2
urukul: flake8 [nfc]
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:45:24 +01:00
832690af9a
ad9910: flake8 [nfc]
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:44:51 +01:00
6d525e2f9a
urukul/ad9910 test: remove unused import
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:40:57 +01:00
36c5a7cd04
test_urukul: relax speed
...
works fine at < 3µs here but needs <5 µs on buildbot-kasli-tester
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:20 +01:00
89fecfab50
urukul,ad9910: print speed metrics
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:18 +01:00
32d538f72b
kasli: add PTB2 (external clock and SYNC)
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:16 +01:00
d8a5951a13
kasli: add sync to LUH, HUB, Opticlock
...
for #1143 , also add missing LUH device db
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:14 +01:00
68220c316d
kasli_tester: urukul0 mmcx clock defunct
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:11 +01:00
89fadab63d
test_ad9910: relax ifc mode read
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:08 +01:00
f522e211ba
tests: add Urukul-AD9910 HITL unittests including SYNC
...
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:06 +01:00
9fb850ae75
ad9910: add init bit explanation
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:02 +01:00
bc04da15c5
test: add Urukul CPLD HITL tests
...
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:37:00 +01:00
141cc7d99f
ad9910: fiducial timestamp for tracking phase mode
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:58 +01:00
2f6d3f79ff
ad9910: add phase modes
...
* simplified and cross-referenced the explanation of the different
phase modes.
* semantically and functionally merged absolute and tracking/coherent
phase modes.
* simplified numerics to calculate phase correction
* added warning about possible inconsistency with DMA and default
phase mode
* restricted __all__ imports
* moved continuous/relative phase offset tracking from an instance
variable to a "handle" returned by set()/set_mu() in order to avoid
state inconsistency with DMA (#1113 #1115 )
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:55 +01:00
d3ad2b7633
ad9910: fix pll timeout loop
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:53 +01:00
4269d5ad5c
tester: add urukul sync
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:52 +01:00
60d3bc63a7
ptb: back out urukul-sync
...
... for backwards compatibility.
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:50 +01:00
06139c0f4d
ad9910: add IO_UPDATE alignment and tuning
...
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:48 +01:00
1066430fa8
urukul: set up sync_in generator
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:46 +01:00
4bbd833cfe
ad9910: add io_update alignment measurement
...
for #1143
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:44 +01:00
7b92282012
ad9910: add docs for sync tuning, refactor
...
Signed-off-by: Robert Jördens <rj@quartiq.de>
2018-11-05 19:36:42 +01:00
