forked from M-Labs/artiq
ad9910: add ram conversion tooling and unittests
Signed-off-by: Robert Jördens <rj@quartiq.de>
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@ -310,8 +310,8 @@ class AD9910:
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:param drg_autoclear: Autoclear digital ramp generator.
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:param internal_profile: Internal profile control.
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:param ram_destination: RAM destination
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(:const:`_AD9910_RAM_DEST_FTW`, :const:`_AD9910_RAM_DEST_POW`,
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:const:`_AD9910_RAM_DEST_ASF`, :const:`_AD9910_RAM_DEST_POWASF`).
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(:const:`RAM_DEST_FTW`, :const:`RAM_DEST_POW`,
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:const:`RAM_DEST_ASF`, :const:`RAM_DEST_POWASF`).
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:param ram_enable: RAM mode enable.
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"""
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self.write32(_AD9910_REG_CFR1,
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@ -516,6 +516,60 @@ class AD9910:
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amplitude scale factor."""
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return asf / float(0x3ffe)
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@portable(flags={"fast-math"})
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def frequency_to_ram(self, frequency, ram):
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"""Convert frequency values to RAM profile data.
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To be used with :const:`RAM_DEST_FTW`.
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:param frequency: List of frequency values in Hz.
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:param ram: List to write RAM data into.
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Suitable for :meth:`write_ram`.
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"""
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for i in range(len(ram)):
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ram[i] = self.frequency_to_ftw(frequency[i])
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@portable(flags={"fast-math"})
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def turns_to_ram(self, turns, ram):
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"""Convert phase values to RAM profile data.
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To be used with :const:`RAM_DEST_POW`.
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:param turns: List of phase values in turns.
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:param ram: List to write RAM data into.
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Suitable for :meth:`write_ram`.
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"""
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for i in range(len(ram)):
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ram[i] = self.turns_to_pow(turns[i]) << 16
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@portable(flags={"fast-math"})
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def amplitude_to_ram(self, amplitude, ram):
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"""Convert amplitude values to RAM profile data.
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To be used with :const:`RAM_DEST_ASF`.
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:param amplitude: List of amplitude values in units of full scale.
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:param ram: List to write RAM data into.
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Suitable for :meth:`write_ram`.
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"""
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for i in range(len(ram)):
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ram[i] = self.amplitude_to_asf(amplitude[i]) << 16
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@portable(flags={"fast-math"})
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def turns_amplitude_to_ram(self, turns, amplitude, ram):
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"""Convert phase and amplitude values to RAM profile data.
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To be used with :const:`RAM_DEST_POWASF`.
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:param turns: List of phase values in turns.
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:param amplitude: List of amplitude values in units of full scale.
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:param ram: List to write RAM data into.
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Suitable for :meth:`write_ram`.
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"""
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for i in range(len(ram)):
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ram[i] = ((self.turns_to_pow(turns[i]) << 16) |
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self.amplitude_to_asf(amplitude[i]))
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@kernel
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def set_frequency(self, frequency):
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return self.set_ftw(self.frequency_to_ftw(frequency))
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@ -231,8 +231,8 @@ class AD9910Exp(EnvExperiment):
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@kernel
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def ram_exec(self):
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ftw0 = [0x12345678]*10
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ftw1 = [0x55aaaa55]*10
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ftw0 = [0x12345678]*2
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ftw1 = [0x55aaaa55]*2
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self.core.break_realtime()
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self.dev.cpld.init()
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self.dev.init()
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@ -268,6 +268,40 @@ class AD9910Exp(EnvExperiment):
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self.set_dataset("ftw", [ftw0[0], ftw0r, ftw1[0], ftw1r])
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@kernel
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def ram_convert_frequency(self):
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freq = [33*MHz]*2
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ram = [0]*len(freq)
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self.dev.frequency_to_ram(freq, ram)
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self.core.break_realtime()
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self.dev.cpld.init()
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self.dev.init()
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self.dev.set_cfr1(ram_enable=0)
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self.dev.cpld.io_update.pulse_mu(8)
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self.dev.set_profile_ram(
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start=100, end=100 + len(ram) - 1, step=1,
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profile=6, mode=RAM_MODE_RAMPUP)
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self.dev.cpld.set_profile(6)
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self.dev.cpld.io_update.pulse_mu(8)
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self.dev.write_ram(ram)
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self.dev.set_cfr1(ram_enable=1, ram_destination=RAM_DEST_FTW)
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self.dev.cpld.io_update.pulse_mu(8)
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ftw_read = self.dev.read32(_AD9910_REG_FTW)
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self.set_dataset("ram", ram)
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self.set_dataset("ftw_read", ftw_read)
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self.set_dataset("freq", freq)
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@kernel
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def ram_convert_powasf(self):
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amplitude = [.1, .9]
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turns = [.3, .5]
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ram = [0]*2
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self.dev.turns_amplitude_to_ram(turns, amplitude, ram)
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self.set_dataset("amplitude", amplitude)
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self.set_dataset("turns", turns)
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self.set_dataset("ram", ram)
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class AD9910Test(ExperimentCase):
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def test_instantiate(self):
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@ -353,3 +387,24 @@ class AD9910Test(ExperimentCase):
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ftw = self.dataset_mgr.get("ftw")
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self.assertEqual(ftw[0], ftw[1])
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self.assertEqual(ftw[2], ftw[3])
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def test_ram_convert_frequency(self):
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exp = self.execute(AD9910Exp, "ram_convert_frequency")
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ram = self.dataset_mgr.get("ram")
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ftw_read = self.dataset_mgr.get("ftw_read")
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self.assertEqual(ftw_read, ram[0])
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freq = self.dataset_mgr.get("freq")
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self.assertEqual(ftw_read, exp.dev.frequency_to_ftw(freq[0]))
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self.assertAlmostEqual(freq[0], exp.dev.ftw_to_frequency(ftw_read),
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delta=.25)
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def test_ram_convert_powasf(self):
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exp = self.execute(AD9910Exp, "ram_convert_powasf")
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ram = self.dataset_mgr.get("ram")
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amplitude = self.dataset_mgr.get("amplitude")
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turns = self.dataset_mgr.get("turns")
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for i in range(len(ram)):
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self.assertEqual((ram[i] >> 16) & 0xffff,
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exp.dev.turns_to_pow(turns[i]))
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self.assertEqual(ram[i] & 0xffff,
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exp.dev.amplitude_to_asf(amplitude[i]))
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