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remove sayma_masterdac example

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This commit is contained in:
Sebastien Bourdeauducq 2019-05-10 12:13:07 +08:00
parent 72f7f8386f
commit f551491a84
5 changed files with 0 additions and 259 deletions
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152
artiq/examples/sayma_masterdac/device_db.py
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@ -1,152 +0,0 @@
core_addr = "sayma-1.lab.m-labs.hk"
device_db = {
"core": {
"type": "local",
"module": "artiq.coredevice.core",
"class": "Core",
"arguments": {"host": core_addr, "ref_period": 1/(8*150e6)}
},
"core_log": {
"type": "controller",
"host": "::1",
"port": 1068,
"command": "aqctl_corelog -p {port} --bind {bind} " + core_addr
},
"core_cache": {
"type": "local",
"module": "artiq.coredevice.cache",
"class": "CoreCache"
},
"core_dma": {
"type": "local",
"module": "artiq.coredevice.dma",
"class": "CoreDMA"
},
"led0": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 0},
},
"led1": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 1},
},
"led2": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 2},
},
"led3": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 3},
},
"ttl_sma_out": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLInOut",
"arguments": {"channel": 4}
},
"ttl_sma_in": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLInOut",
"arguments": {"channel": 5}
},
"rled0": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 0x010000},
},
"rled1": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 0x010001},
},
"rled2": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 0x010002},
},
"rled3": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLOut",
"arguments": {"channel": 0x010003},
},
"rttl_sma_out": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLInOut",
"arguments": {"channel": 0x010004}
},
"rttl_sma_in": {
"type": "local",
"module": "artiq.coredevice.ttl",
"class": "TTLInOut",
"arguments": {"channel": 0x010005}
},
"converter_spi": {
"type": "local",
"module": "artiq.coredevice.spi2",
"class": "NRTSPIMaster",
},
"ad9154_spi0": {
"type": "local",
"module": "artiq.coredevice.ad9154_spi",
"class": "AD9154",
"arguments": {"spi_device": "converter_spi", "chip_select": 2}
},
"ad9154_spi1": {
"type": "local",
"module": "artiq.coredevice.ad9154_spi",
"class": "AD9154",
"arguments": {"spi_device": "converter_spi", "chip_select": 3}
},
"rconverter_spi": {
"type": "local",
"module": "artiq.coredevice.spi2",
"class": "NRTSPIMaster",
"arguments": {"busno": 0x010000}
},
"rad9154_spi0": {
"type": "local",
"module": "artiq.coredevice.ad9154_spi",
"class": "AD9154",
"arguments": {"spi_device": "rconverter_spi", "chip_select": 2}
},
"rad9154_spi1": {
"type": "local",
"module": "artiq.coredevice.ad9154_spi",
"class": "AD9154",
"arguments": {"spi_device": "rconverter_spi", "chip_select": 3}
},
}
for i in range(8):
device_db["sawg" + str(i)] = {
"type": "local",
"module": "artiq.coredevice.sawg",
"class": "SAWG",
"arguments": {"channel_base": i*10+6, "parallelism": 4}
}
for i in range(8):
device_db["sawg" + str(8+i)] = {
"type": "local",
"module": "artiq.coredevice.sawg",
"class": "SAWG",
"arguments": {"channel_base": i*10+0x010006, "parallelism": 4}
}

23
artiq/examples/sayma_masterdac/repository/ad9154_spi.py
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@ -1,23 +0,0 @@
from artiq.coredevice.ad9154_reg import *
from artiq.experiment import *
class Test(EnvExperiment):
def build(self):
self.setattr_device("core")
self.ad9154_spi = self.get_device("ad9154_spi0")
self.rad9154_spi = self.get_device("rad9154_spi0")
@kernel
def run(self):
self.ad9154_spi.setup_bus()
self.rad9154_spi.setup_bus()
for i in range(5):
self.p("local PRODID: 0x%04x", (self.ad9154_spi.read(AD9154_PRODIDH) << 8) |
self.ad9154_spi.read(AD9154_PRODIDL))
self.p("remote PRODID: 0x%04x", (self.rad9154_spi.read(AD9154_PRODIDH) << 8) |
self.rad9154_spi.read(AD9154_PRODIDL))
def p(self, f, *a):
print(f % a)

27
artiq/examples/sayma_masterdac/repository/blink_forever.py
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@ -1,27 +0,0 @@
from artiq.experiment import *
class BlinkForever(EnvExperiment):
def build(self):
self.setattr_device("core")
self.rleds = [self.get_device("rled" + str(i)) for i in range(4)]
self.leds = [self.get_device("led" + str(i)) for i in range(4)]
@kernel
def run(self):
self.core.reset()
while True:
with parallel:
for led in self.leds:
led.pulse(250*ms)
for led in self.rleds:
led.pulse(250*ms)
t = now_mu()
for led in self.leds:
at_mu(t)
led.pulse(500*ms)
for led in self.rleds:
at_mu(t)
led.pulse(500*ms)
delay(250*ms)

25
artiq/examples/sayma_masterdac/repository/pulse_rate.py
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@ -1,25 +0,0 @@
from artiq.experiment import *
class PulseRate(EnvExperiment):
def build(self):
self.setattr_device("core")
self.setattr_device("rttl_sma_out")
@kernel
def run(self):
self.core.reset()
dt = self.core.seconds_to_mu(300*ns)
while True:
for i in range(10000):
try:
self.rttl_sma_out.pulse_mu(dt)
delay_mu(dt)
except RTIOUnderflow:
dt += 1
self.core.break_realtime()
break
else:
print(self.core.mu_to_seconds(dt))
return

32
artiq/examples/sayma_masterdac/repository/sines_drtio.py
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@ -1,32 +0,0 @@
from artiq.experiment import *
class SAWGTestDRTIO(EnvExperiment):
def build(self):
self.setattr_device("core")
self.setattr_device("ttl_sma_out")
self.sawgs = [self.get_device("sawg"+str(i)) for i in range(16)]
@kernel
def run(self):
core_log("waiting for DRTIO ready...")
for i in range(3):
while not self.core.get_rtio_destination_status(i):
pass
core_log("OK")
self.core.reset()
for sawg in self.sawgs:
delay(1*ms)
sawg.reset()
for sawg in self.sawgs:
delay(1*ms)
sawg.amplitude1.set(.4)
# Do not use a sub-multiple of oscilloscope sample rates.
sawg.frequency0.set(9*MHz)
while True:
delay(0.5*ms)
self.ttl_sma_out.pulse(0.5*ms)