Commit Graph

7088 Commits

Author SHA1 Message Date
SingularitySurfer
ab097b8ef9 add offset to coefficients as data 2022-06-23 09:37:37 +00:00
SingularitySurfer
24b4ec46bd more documentation 2022-06-23 08:48:28 +00:00
Norman Krackow
56c59e38f0
Update artiq/coredevice/phaser.py
Co-authored-by: Robert Jördens <rj@quartiq.de>
2022-06-23 09:15:50 +02:00
SingularitySurfer
c0581178d6 impl offsets. to be tested 2022-06-22 16:20:59 +00:00
SingularitySurfer
43c94577ce impl set_iir. untested 2022-06-22 15:35:49 +00:00
SingularitySurfer
ce4055db3b force hold on bypass and use names in set_servo() in init 2022-06-21 10:11:49 +00:00
SingularitySurfer
b67a70392d rename to coeff base and shorter write16 2022-06-21 09:59:40 +00:00
SingularitySurfer
57176fedb2 add servo docu 2022-06-21 09:29:42 +00:00
SingularitySurfer
8bea821f93 just &1 to stay in field 2022-06-21 08:43:55 +00:00
SingularitySurfer
0388161754 disable servo in init 2022-06-21 07:49:29 +00:00
SingularitySurfer
751af3144e fix old line that I forgot 2022-06-21 07:43:28 +00:00
SingularitySurfer
5df766e6da fix ors 2022-06-21 07:36:59 +00:00
David Nadlinger
e1f9feae8b applets.simple: Actually forward dataset_prefixes when using IPC
Turns out I had inadvertently only tested 2d6fc154d using the
socket interface.
2022-06-19 18:08:25 +01:00
David Nadlinger
dd928fc014 master: Fixup 32db6ff978 (argument_ui support)
This was lost in the ndscan diff upstreaming process
due to other Oxford-local changes in artiq.master.worker.
2022-06-19 11:33:40 +01:00
David Nadlinger
32db6ff978
Allow experiments to specify a custom argument editor UI (#1916)
On the master/EnvExperiment side, the only addition is an optional
property `argument_ui` that is made accessible to the dashboard, e.g.

    class Example(EnvExperiment):
        argument_ui = "ndscan"
        def build(self):
           …

Clients – primarily artiq_dashboard, but in principle e.g. a
command-line UI could do the same – can then compare the value to a
list of well-known names and prefer any matching custom UI handlers.

On the dashboard side, this commit adds the mechanism to register
a custom argument editor for a given argument_ui string, i.e. the
widget that displays the parameter values within the wider
experiment UI shell with the submit button, pipeline parameters, and
so on. The registry remains empty by default and would be filled by
out-of-tree plugins such as ndscan.

The UI state readback is implemented somewhat defensively to avoid
needless disruptions to users when upgrading.
2022-06-18 15:55:13 +08:00
David Nadlinger
dbc87f08ff dashboard: Add submit/close hooks for custom argument editors
These are used by ndscan, as re-serialising the entire ndscan
parameter metadata tree, which can grow to be quite extensive,
on every single Qt change event is a bit excessive (and would
probably cause a bit of lag while typing for big experiments
on low-end machines).
2022-06-18 15:51:39 +08:00
David Nadlinger
c4068e6896 dashboard: Plumb through datasets client to ExperimentManager
This is analogous to the explist/schedule subscribers, and allows
custom argument editors (such as ndscan) to provide hints/defaults/…
from datasets once available.
2022-06-18 15:50:05 +08:00
David Nadlinger
85895ab89b dashboard: Add cmdline option to load plugins on startup
Together with m-labs/artiq#1916, this allows the user to integrate
multiple argument UIs implemented in external libraries.
2022-06-18 15:48:32 +08:00
kk1050
46fb8916bb
update SEEN_ASYNC_ERRORS in destination_survey 2022-06-18 15:46:49 +08:00
David Nadlinger
2d6fc154db applets: Allow wildcard subscription to all datasets matching prefix via IPC
This allows ndscan v0.3+ to use the IPC interface for efficiency;
previously, the non-upstreamed RID dataset namespace feature allowed
the applets to somewhat efficient subscribe directly to the master
process via the socket interface.
2022-06-18 15:45:57 +08:00
David Nadlinger
4c42f65909 applets: Add ${server}, ${port_control}, ${port_notify} command substitutions
This facilitates applets that connect back to the master
(e.g. to update datasets on user request, as used by ndscan).
2022-06-18 15:19:35 +08:00
David Nadlinger
f4d639242d units: Add nW (nanowatts)
We found this quite useful/common for laser beams.
2022-06-18 15:11:05 +08:00
SingularitySurfer
d09153411f adress some review comments 2022-06-17 13:03:21 +00:00
Norman Krackow
dc49372d57
Update artiq/coredevice/phaser.py
Co-authored-by: Robert Jördens <rj@quartiq.de>
2022-06-17 14:40:07 +02:00
Norman Krackow
2044dc3ae5
Update artiq/coredevice/phaser.py
Co-authored-by: Robert Jördens <rj@quartiq.de>
2022-06-17 14:39:37 +02:00
SingularitySurfer
ae3f1c1c71 adapt servo functions. Todo: docu 2022-06-17 11:47:45 +00:00
SingularitySurfer
1bddadc6e2 cleanup and comments 2022-06-15 17:32:11 +00:00
SingularitySurfer
b0f9fd9c4c implement main driver functions 2022-06-15 12:40:21 +00:00
69c4026d2b Fix returning tuples of lists of arrays from RPCs
When serialising a list of objects `_send_rpc_value` makes a copy of the
upcoming tags to pass repeatedly to the recursive call. Then uses
`_skip_rpc_value` to skip over the tags that should have been processed.
This didn't handle numpy arrays so, after processing a list of arrays it
got out of sync and failed.

Signed-off-by: Michael Birtwell <michael.birtwell@oxionics.com>
2022-06-15 00:08:49 +08:00
e47834d82e Bugfix: Add missing item inside state to solve KeyError
KeyError raised when trying to load default_state()
due to missing Key "seed" in "RangeScan" and "CenterScan" in
state. Add {"seed": None} to resolve the bug.
2022-06-14 11:41:55 +08:00
4ede14b14d
dashboard: add DDS quick set-frequency feature 2022-06-09 12:01:06 +08:00
kk1050
4ddd2739ee
add log_tuples function (#1896)
Co-authored-by: kk105 <kkl@m-kabs.hk>
2022-06-06 18:41:46 +08:00
f79f7db3a2 dyld: handle rebind on symbols relocated by CALL_PLT 2022-06-01 12:44:33 +08:00
872f8f039f dyld: support additional RV32 reloc types
The support of LO12 type requires the runtime linker to find the corresponding HI20 symbol. resolve_rela needs the entire relocation section for that.
2022-06-01 12:44:33 +08:00
50495097e5 dyld: rename pltrel to jmprel
nac3ld will not generate PLT & its relocation section. There might not be a pltrel in that case.
On the other hand, rebinding will not be limited to the symbols in the PLT when linked with nac3ld.
Thus the renaming.
2022-06-01 12:44:33 +08:00
ca614a3eea use asyncio get/new_event_loop as recommended 2022-05-31 23:06:54 +08:00
6d46c886d7 ld.lld: translate TARGET2 reloc to relative 2022-05-31 18:26:06 +08:00
667f36a2e7 gui: fix Python 3.10 PyQt float/int issues. Closes #1887 2022-05-29 08:43:25 +08:00
7cff63e539 frontend: use sipyco SignalHandler (#1063) 2022-05-27 15:17:33 +08:00
cf8e583847 comm_mgmt: expect error on config_read 2022-05-19 16:48:59 +08:00
d24a36a02a comm_mgmt: fix read_expect 2022-05-19 16:48:59 +08:00
4bdb4c8e11 config: error instead of empty value if key not found 2022-05-19 16:48:59 +08:00
9896d78e07 afws_client: update 2022-05-18 19:04:13 +08:00
kk1050
70503bee6f
dashboard: add dataset rename feature (#1893)
Co-authored-by: kk105 <kkl@m-kabs.hk>
2022-05-18 17:07:43 +08:00
16393efa7c fix issue #1890: make dashboard use moninj port from device_db
Signed-off-by: Laurent Stephenson <laurent.stephenson@nist.gov>
2022-05-13 06:23:59 +08:00
David Nadlinger
8a7af3f75c compiler: Fix "nowrite" miscompilation for sret functions
This affected e.g. rtio_input_timestamped_data().
2022-05-07 21:43:55 +01:00
35f30ddf05
Expose TTLClockGen for Kasli JSONs (#1886) 2022-05-06 13:33:42 +08:00
50dbda4f43 Use new ip_addr_storage module instead of net_settings
Necessary to avoid needing the alloc only trait impls in net_settings
when compiling the bootloader.
2022-04-24 10:10:43 +08:00
95378cf9c9 Centralise all uses of the IPv4 index in net_settings.rs 2022-04-24 10:10:43 +08:00
671453938b Require explicitly closing TcpStreams
Instead of automatically closing and draining the TcpStream in the Drop
implementation instead expect the user to call TcpStream::close.
Add close called to all users of TcpStream.
Document the requirement to call close on TcpListener::accept, this seems
to be the only way to get a new TcpStream at the moment.
2022-04-24 10:10:43 +08:00
1fe59d27dc Use an Ipv4AddrConfig enum instead of the USE_DHCP constant 2022-04-24 10:10:43 +08:00
73082d116f Ensure that pending data is sent when closing sockets
This is only necessary if close hasn't been called on the socket
but that's not always done. e.g. by the core analyzer server.
2022-04-24 10:10:43 +08:00
596b9a265c Prefer DHCP to the built-in static IPs
Signed-off-by: Michael Birtwell <michael.birtwell@oxionics.com>
2022-04-24 10:10:42 +08:00
6ffb1f83ee DHCP support for core device firmware
DHCP is enabled by setting the `ip` config entry to "use_dhcp". Reusing this
config field rather than creating a new one means that there is no ambiguity
over which config field takes precedence.

Adds a thread to configure the interface based on DHCP events
Adds a `Dhcpv4Socket` as a wrapper around smoltcp's version
Formalises the storage of the IP addresses so that we can update one in
another module.

There's also a workaround for the first DHCP discover packet frequently
going missing.

Signed-off-by: Michael Birtwell <michael.birtwell@oxionics.com>
2022-04-24 10:10:14 +08:00
c60de48a30 Upgrade smoltcp 0.6.0 -> 0.8.0
Main changes:
Deal with interfaces now being generic over mediums, update interface name
and initialisation.
Interfaces now own their sockets. So we store a reference to the Interface
instead of the SocketSet in Scheduler and IO.
Sockets are no longer reference counted. We never called the function to
increase the socket's reference count, so now we just remove it where it
was previously released. This will result in the socket being dropped at
a different time, but I think that should be fine.

Tested firmware upload to the bootloader and spamming artiq_coremgmt log
calls to download the log from the firmware.

Signed-off-by: Michael Birtwell <michael.birtwell@oxionics.com>
2022-04-24 10:09:27 +08:00
Suthep Pomjaksilp
06ad76b6ab
applets: add progress bar applet
Signed-off-by: Suthep Pomjaksilp <pomjaksi@physik.uni-kl.de>
2022-04-22 09:27:28 +08:00
David Nadlinger
b2b84b1fd6 test: Fixup 6b5c390d4 typo 2022-04-22 00:29:03 +01:00
David Nadlinger
6b5c390d48 compiler: Fix #1871 (array() breaks math functions)
GitHub: Fixes #1871.
2022-04-22 00:12:20 +01:00
cab9d90d01 Use sipyco.keepalive
Remove the implementation of setting keepalive settings on sockets and use
the implementation from sipyco instead.

Signed-off-by: Michael Birtwell <michael.birtwell@oxionics.com>
2022-04-12 08:53:35 +08:00
Leon Riesebos
386391e3f9 browser: support datasets that use h5 group notation
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2022-04-07 18:18:13 +08:00
Leon Riesebos
b5dc9fd640 browser: cleanup datasets panel for empty h5 files
this fix makes sure the datasets panel is cleared if an h5 file is empty or the datasets and archive groups are empty
2022-04-07 18:18:05 +08:00
c82c358f3a runtime: provide/fix more libc mem functions 2022-03-28 13:33:57 +08:00
723f41c78b runtime: fix EXCEPTION_ID_LOOKUP 2022-03-26 20:10:24 +08:00
866a83796a firmware: add UnwrapNoneError exception 2022-03-26 15:28:13 +08:00
Timothy Ballance
f91e106586 llvm_ir: fixed broken code in previous patch 2022-03-22 18:50:58 +08:00
Timothy Ballance
a289d69883 llvm_ir: fixed stack leak on ffi call 2022-03-22 09:00:40 +08:00
f89275b02a master: fix compiler access to source code with submit-by-content 2022-03-20 18:08:04 +08:00
65d2dd0173 fix compilation warning 2022-03-20 16:15:01 +08:00
80d412a8bf support submitting experiments by content 2022-03-20 12:58:55 +08:00
922d2b1619 drop support for big-endian moninj 2022-03-19 22:58:31 +08:00
ec1efd7af9 dashboard: connect to moninj via proxy 2022-03-19 22:50:36 +08:00
735133a2b4 artiq_dashboard: remove references to core device in moninj 2022-03-19 22:36:07 +08:00
207717c740 artiq_dashboard: fix handling of moninj comment 2022-03-19 22:33:31 +08:00
6d92e539b1 artiq_ddb_template: add aqctl_moninj_proxy 2022-03-19 22:33:03 +08:00
df1513f0e9 add aqctl_moninj_proxy to device dbs 2022-03-19 19:25:21 +08:00
d3073022ac aqctl_moninj_proxy: fix all major bugs 2022-03-19 19:06:12 +08:00
bbb2c75194 add aqctl_moninj_proxy 2022-03-18 17:02:50 +08:00
aff569b2c3 firmware: support 64-bit moninj probes 2022-03-17 19:56:07 +08:00
a159ef642d drtio: demote default routing table message to info 2022-03-16 21:22:35 +08:00
1a26eb8cf2 coredevice: only print version mismatch warning when relevant 2022-03-16 21:21:43 +08:00
e5e4d55f84 mgmt: fix config write error message 2022-03-16 08:28:31 +08:00
ebfeb1869f firmware: use &CSlice for lists 2022-03-10 16:30:22 +08:00
eb6817c8f1 compiler/transforms/llvm_ir_generator: changed list representation
The representation of TList(T) is changed from `{T*, u32}` to
`{T*, u32}*`. The old representation forbids changing the length of a
list when the list is passed as a parameter into functions, as the
length is passed by value. The representation now matches with nac3.
2022-03-10 16:30:22 +08:00
8415151866 update copyright year 2022-03-10 11:56:16 +08:00
ciciwu
9a96387dfe
phaser: fix docstring formatting (#1866) 2022-03-08 19:03:30 +08:00
b02abc2bf4 remove legacy versioning files 2022-03-06 18:30:08 +08:00
ac55da81d8 core: support precompilation of kernels 2022-03-06 18:25:18 +08:00
232f28c0e8 kern_hw: fix return type 2022-03-04 15:16:14 +08:00
51fa1b5e5e drtio: fix i2c switch 2022-03-04 15:16:14 +08:00
17ecd35530 test_i2c: fix for missing readback 2022-03-01 17:40:20 +08:00
a85b4d5f5e
I2C API for PCA9547 support (#1860) 2022-03-01 15:07:53 +08:00
338bb189b4 dashboard: fix typo (#1858) 2022-02-26 08:58:03 +08:00
Leon Riesebos
c4292770f8
Kasli JSON description for SPI over DIO cards (#1800) 2022-02-26 07:36:00 +08:00
2b918ac6f7 coredevice: merge pcf8574a into i2c 2022-02-25 19:01:14 +08:00
1b80746f48 Remove outer_final
We don't need to know whether there's a outer finally block
that's already implicit in the current break and continue
target.

Signed-off-by: Michael Birtwell <michael.birtwell@oxionics.com>
2022-02-24 19:58:33 +08:00
2d6215158f Fix try/finally:while:try compilation
When we have a trys inside a loop then we want to make sure any
finallys are executed by break and continue inside this try. But
this shouldn't pull finallys defined outside the loop in to the
loop. This change resets the `outer_final` attribute when
visiting for and while loops so that this doesn't happen.

Signed-off-by: Michael Birtwell <michael.birtwell@oxionics.com>
2022-02-24 19:58:33 +08:00
0da7b83176 runtime: add nac3 exception symbols 2022-02-23 11:04:53 +08:00
Steve Fan
ad656d1e53
dashboard: add device database reload action in context menu (#1853) 2022-02-22 16:18:27 +08:00
Mike Birtwell
a106ed0295
artiq_flash: don't try to make rtm_binary_dir if binary_dir unset (#1851)
Signed-off-by: Michael Birtwell <michael.birtwell@oxionics.com>
2022-02-18 18:54:17 +08:00
c8b9eed9c9 fastino: add comments about sideeffects on v0.1 2022-02-16 14:42:22 +00:00
08b65470cd fastino: robustify init()
* init() now also clear and resets more state including the interpolators.
  If not done, this PLL unlocks/locks may lead to random interpolator state
  on boot to which the CICs react badly.
* Use and expose `t_frame`
* Clarify implementation state of `read()`
2022-02-16 14:34:22 +00:00
65eab31f23 simplify board package format and artiq_flash 2022-02-14 15:54:17 +08:00
b893d97d7b afws_client: add login successful message 2022-02-08 21:52:48 +08:00
b6f5ba8b5b afws_client: improve error message when output already exists 2022-02-08 21:26:12 +08:00
cc69482dad afws: nix requires full Git commit hash 2022-02-08 21:05:39 +08:00
833acb6925 add AFWS client 2022-02-07 14:28:00 +08:00
d5eec652ee tester: specify att with dB 2022-02-07 14:22:52 +08:00
a74196aa27 mirny: allow set attenuation with dB 2022-02-07 14:22:52 +08:00
Steve Fan
798a412c6f
comm_moninj: set keepalive for socket (#1843) 2022-02-04 13:51:19 +08:00
David Nadlinger
e45cb217be firmware: Explicitly use wrapping integer math in PRNGs
Patch by Hannah McLaughlin; apparently, the overflow actually
doesn't get checked/reported without `opt-level = 2` and
`lto = "thin"`.
2022-02-03 23:57:17 +00:00
ef25640937 compiler: fix noreturn attribute on __artiq_resume 2022-02-01 19:01:40 +08:00
Steve Fan
34008b7a21
Backport of "fixes alignment and size problem" from artiq-zynq (#1841) 2022-01-28 20:49:55 +08:00
93328ad8ee compiler: only allow constant exception messages
Otherwise, the exception message might be allocated on a stack, and will
become a dangling pointer when the exception is raised.
This will break some code that constructs exceptions with a function by
passing the message as a parameter because we cannot know if the parameter
is a constant. A way to mitigate this would be to defer this check to
LLVM IR codegen stage, and do inlining first for those exception
allocation functions, but I am not sure if we will guarantee inlining
for certain functions, and whether this is really needed.
2022-01-28 09:01:39 +08:00
Steve Fan
234a82aaa9
dashboard: prioritize min as part of default value resolution (#1839) 2022-01-27 17:45:09 +08:00
ee511758ce fix typo 2022-01-26 07:51:35 +08:00
9d43762695 test: fixed lit tests
Note that because we changed exception representation from using string
names as exception identifier into using integer IDs, we need to
initialize the embedding map in order to allocate the integer IDs. Also,
we can no longer print the exception names and messages from the kernel,
we will need the host to map exception IDs to names, and may need the
host to map string IDs to actual strings (messages can be static strings
in the firmware, or strings stored in the host only).

We now check for exception IDs for lit tests, which are fixed because we
preallocated all builtin exceptions.
2022-01-26 07:16:54 +08:00
4132c450a5 firmware: runtime changes for exception
Ported from:
M-Labs/artiq-zynq#162

This includes new API for exception handling, some refactoring to avoid
code duplication for exception structures, and modified protocols to
send nested exceptions and avoid string allocation.
2022-01-26 07:16:54 +08:00
536b3e0c26 test: added test case for nested exceptions and try 2022-01-26 07:16:54 +08:00
ba34700798 coredevice: report nested exceptions 2022-01-26 07:16:54 +08:00
6ec003c1c9 compiler: fixed dead code eliminator
Instead of removing basic blocks with no predecessor, we will now mark
and remove all blocks that are unreachable from the entry block. This
can handle loops that are dead code. This is needed as we will now
generate more complicated code for exception handling which the old dead
code eliminator failed to handle.
2022-01-26 07:16:54 +08:00
da4ff44377 compiler: fixed try codegen and allocate exceptions
Exceptions are now allocated in the runtime when we raise the exception,
and destroyed when we exit the catch block. Nested exception and try
block is now supported, and should behave the same as in CPython.
Exceptions raised in except blocks will now unwind through finally
blocks, matching the behavior in CPython. Reraise will now preserve
backtrace.

Phi block LLVM IR generation is modified to handle landingpads, which
one ARTIQ IR will map to multiple LLVM IR.
2022-01-26 07:16:54 +08:00
4644e105b1 compiler: modified exception representation
Exception name is replaced by exception ID, which requires no
allocation. Other strings in the exception can now be 'host-only'
strings, which is represented by a CSlice with len = usize::MAX and
ptr = key, to avoid the need for allocation when raising exceptions
through RPC.
2022-01-26 07:16:54 +08:00
hartytp
715bff3ebf
Revert "Merge pull request #1544 from airwoodix/dataset-compression" (#1838)
* Revert "Merge pull request #1544 from airwoodix/dataset-compression"

This reverts commit 311a818a49, reversing
changes made to 7ffe4dc2e3.

* fix accidental revert of f42bea06a8
2022-01-25 10:02:15 +08:00
Steve Fan
3f812c4c2c
comm_kernel: fix RPC exception handling (#1801) 2022-01-12 15:23:37 +08:00
Steve Fan
de5892a00a
comm_kernel: check if elements are within bounds for RPC list (#1824) 2022-01-11 17:16:45 +08:00
Peter Drmota
4eee49f889 gateware.test.suservo: Fix tests for python >=3.7
Closes #1748
2022-01-11 17:16:09 +08:00
9eee0e5a7b gateware/suservo: fix profile no. in test
Follow-up/Test update for 9d49302.
2022-01-11 14:20:47 +08:00
d7dd75e833 comm_kernel: fix off-by-one error for numeric value range check 2022-01-11 10:13:42 +08:00
095fb9e333
add Almazny support (#1780) 2022-01-11 09:55:39 +08:00
4e3e0d129c firmware: fix compilation warning 2022-01-11 09:31:26 +08:00
12ee326fb4 firmware: fixed personality function 2022-01-11 09:30:19 +08:00
61349f9685 sinara_tester: fix outdated API 2022-01-10 17:23:28 +08:00
cea0a15e1e suservo: use default urukul profile 2022-01-10 16:21:39 +08:00
8b45f917d1 urukul: use default profile 2022-01-10 16:21:39 +08:00
6542b65db3 compiler: fixed exception codegen issues 2022-01-10 15:54:29 +08:00
9f90088fa6 compiler: generate appropriate landingpad IR
When used together with modified personality function, we got ~20%
performance improvement in exception unwinding with zynq.
2022-01-10 15:54:29 +08:00
5e1847e7c1 compiler: rename variables to retainedNodes
Part of the changes that was made to LLVM 6 by the time that LLVM 7 was released.
LLVM commit: 2c864551df
LLVM differential review: https://reviews.llvm.org/D45024
2022-01-10 11:28:37 +08:00
6f3c49528d compiler: revert cabe5ac
The lack of debug emitter causes #1821.
2022-01-10 11:26:03 +08:00
eaa1505c94 update documentation (#1820) 2022-01-08 11:55:52 +08:00
Leon Riesebos
f42bea06a8 worker_db: removed warning for writing a dataset that is also in the archive
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2022-01-08 11:48:18 +08:00
9d493028e5 gateware/suservo: write to profile 7
Fixes #1817.
2022-01-07 16:41:19 +08:00
bbac477092 tools: fix importlib issue 2021-12-21 13:20:11 +08:00
c0a7be0a90 llvm_ir: move stacksave before lltag alloca in build_rpc
Signed-off-by: Steve Fan <sf@m-labs.hk>
2021-12-19 00:07:07 +00:00
9e5e234af3 stop using explicit ProactorEventLoop on Windows
It is now the default in Python.
2021-12-14 20:06:38 +08:00
352317df11 test_dataset_db: remove (too much breakage on Windows) 2021-12-14 19:27:15 +08:00
a518963a47 test_dataset_db: disable tests broken on windows 2021-12-14 19:19:22 +08:00
37f14d94d0 test_dataset_db: fix for windows 2021-12-14 19:07:17 +08:00
Peter Drmota
7c664142a5
Simplified use of the AD9910 RAM feature (#1584)
* coredevice: Change Urukul default single-tone profile to 7

This allows using the internal profile control in RAM modulation mode (which always starts to play back at profile 0) without competing for the content of the profile 0 register used in single tone mode.

Signed-off-by: Peter Drmota <peter.drmota@physics.ox.ac.uk>

* ad9910/set_mu: comment on caveats when setting register

* ad9910: avoid unnecessary write/param

Credit: Solution proposed by @pmldrmota in https://github.com/m-labs/artiq/pull/1584#issuecomment-987774353

* revert 1064fdff (`set_mu()` comments)

158a7be7 had addressed this issue.

Co-authored-by: occheung <dc@m-labs.hk>
2021-12-13 23:44:03 +08:00
33a9ca2684 tools/file_import: use SourceFileLoader
This allows loading modules from files with extensions not in
importlib.machinery.SOURCE_SUFFIXES

Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-12-09 11:47:04 +08:00
1def0d98c5
Merge branch 'master' into dataset-compression 2021-12-06 12:40:30 +08:00
Leon Riesebos
7ffe4dc2e3 coredevice: set default pow for ad9912 set_mu() 2021-12-06 12:34:55 +08:00
Leon Riesebos
9e3ea4e8ef coredevice: fixed type annotations for AD9910 2021-12-06 12:34:55 +08:00
Steve Fan
4a6bea479a
Host report for async error upon kernel termination (#1791)
Closes #1644
2021-12-04 13:33:24 +08:00
7953f3d705 kc705: add drtio 100mhz clk switch 2021-12-03 17:19:11 +08:00
f281112779 satman: add 100mhz si5324 settings
siphaser: add calculated vco for 100mhz comment
2021-12-03 17:19:11 +08:00
eec3ea6589 siphaser: add support for 100mhz rtio 2021-12-03 17:19:11 +08:00
Etienne Wodey
9f830b86c0
kasli: add SED lanes count option to HW description JSON file (#1745)
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-12-03 17:05:35 +08:00
b8e7add785 language: remove deprecated set_dataset(..., save=...) 2021-12-01 22:41:34 +08:00
David Nadlinger
c6039479e4 compiler: Add lit test for call site attributes [nfc] 2021-11-27 04:46:07 +00:00
David Nadlinger
63b5727a0c compiler: Also emit byval argument attributes at call sites
See previous commit.

GitHub: Fixes #1599.
2021-11-27 04:45:50 +00:00
David Nadlinger
9b01db3d11 compiler: Emit sret call site argument attributes
LLVM 6 seemed not to mind the mismatch, but more recent
versions produce miscompilations without this.

Needs llvmlite support (GitHub: numba/llvmlite#702).
2021-11-27 04:44:41 +00:00
6a433b2fce artiq_sinara_tester: test Urukul attenuator digital control 2021-11-24 18:57:16 +08:00
9423428bb0 drtio: fix crc32 offset address 2021-11-24 12:00:56 +08:00
b49f813b17 artiq_flash: ignore checking non-RTM artifacts if unused 2021-11-18 16:59:32 +08:00
Peter Drmota
20e079a381
AD9910 driver feature extension and SUServo IIR readability (#1500)
* coredevice.ad9910: Add set_cfr2 function and extend arguments of set_cfr1 and set_sync

* SUServo: Wrap CPLD and DDS devices in a list

* SUServo: Refactor [nfc]

Co-authored-by: drmota <peter.drmota@physics.ox.ac.uk>
Co-authored-by: David Nadlinger <code@klickverbot.at>
2021-11-15 12:09:16 +08:00
db3e5e83e6 bump misoc 2021-11-08 16:59:08 +08:00
09945ecc4d gateware: fix drtio/dma tests 2021-11-08 16:59:08 +08:00
02119282b8 build_soc: build VexRiscv_G if not kasli v1.x 2021-11-08 16:59:08 +08:00
750b0ce46d ddb_temp: select appropriate compiler target 2021-11-08 16:59:08 +08:00
531670d6c5 dyld: check ABI 2021-11-08 16:59:08 +08:00
0f660735bf ll_gen: adjust csr address by detecting target class 2021-11-08 16:59:08 +08:00
0755757601 compiler/tb: use FPU 2021-11-08 16:59:08 +08:00
0d708cd61a compiler/target: split RISCV target into float/non-float 2021-11-08 16:59:08 +08:00
03b803e764 firmware: adjust csr separation 2021-11-08 16:59:08 +08:00
b3e315e24a rust: find json file using CARGO_TRIPLE 2021-11-08 16:59:08 +08:00
0898e101e2 board_misoc: reuse riscv dir for comm & kernel 2021-11-08 16:59:08 +08:00
cb247f235f gateware: pass adr_w/data_w to submodules 2021-11-08 16:59:08 +08:00
90f944481c kernel_cpu: add fpu if not kasli v1.x 2021-11-08 16:59:08 +08:00
d84ad0095b comm_cpu: select 64b bus if not kasli v1.x 2021-11-08 16:59:08 +08:00
dd68b4ab82 mailbox: parametrize address width 2021-11-08 16:59:08 +08:00
c6e0e26440 drtio: accept 32b/64b bus 2021-11-08 16:59:08 +08:00
8da924ec0f dma: set conversion granularity using bus width 2021-11-08 16:59:08 +08:00
591507a7c0
Merge pull request #1774 from m-labs/fastino-cic
Fastino cic
2021-10-28 17:44:20 +02:00
5a5b0cc7c0 fastino: expand docs 2021-10-28 15:19:48 +00:00
69cddc6b86
rtio_clocking: add warnings for unsupported rtio_clock settings (#1773) 2021-10-28 16:34:22 +08:00
9b1d7e297d
runtime: clock input specification improvements
closes #1735
2021-10-28 16:21:51 +08:00
1ff474893d Revert "fastino: make driver filter order configurable"
This reverts commit 10c37b87ec.
2021-10-28 06:29:56 +00:00
10c37b87ec fastino: make driver filter order configurable 2021-10-27 20:24:58 +00:00
c940f104f1 artiq_flash: fix gateware header not in little-endian for RISC-V 2021-10-25 11:20:26 +08:00
0aa8a739aa sayma_rtm: fix RTM firmware not in little-endian for RISC-V 2021-10-25 11:20:26 +08:00
d5fa3d131a cargo.lock: update libc version for libfringe 2021-10-16 17:42:24 +08:00
6d3164a912 riscv: print mtval on panic 2021-10-16 17:42:24 +08:00
46326716fd runtime: bump libfringe, impl ecall abi
See libfringe PR: M-Labs/libfringe#1
2021-10-16 17:42:24 +08:00
0a59c889de satman/kern: init locked PMP on startup 2021-10-16 17:42:24 +08:00
27a7a96626 runtime: setup pmp + transfer to user 2021-10-16 17:42:24 +08:00
a0bf11b465 riscv: impl pmp 2021-10-16 17:42:24 +08:00
790a20edf6 linker: generate stack guard + symbol 2021-10-16 17:42:24 +08:00
fanmingyu212
178a86bcda master: add an argument to set an experiment subdirectory
Signed-off-by: Mingyu Fan <mingyufan@ucsb.edu>
2021-10-15 16:54:31 +08:00
35d21c98d3 Revert "runtime: expose rint from libm"
Consistency with NAR3/Zynq where rint is not available.

This reverts commit f5100702f6.
2021-10-11 08:12:04 +08:00
f5100702f6 runtime: expose rint from libm 2021-10-10 20:40:17 +08:00
3c1cbf47d2 phaser: add more slack during init. Closes #1757 2021-10-10 16:18:55 +08:00
3f6bf33298 fastino: add interpolator support 2021-10-08 15:47:07 +00:00
59065c4663 alloc_list: support alloc w/ large align
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
2021-10-07 12:38:03 +08:00
1894f0f626
gateware: share RTIOClockMultiplier and fix_serdes_timing_path (#1760) 2021-10-07 08:19:38 +08:00
a8333053c9 sinara_tester: add device_db and test selection CLI options
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-27 17:44:50 +08:00
3ed10221d8 compiler: remove big-endian support. Closes #1590 2021-09-13 13:40:24 +08:00
e8a7a8f41e compiler: work around idiotic windoze behavior that causes conda ld.lld not to be found 2021-09-13 10:40:54 +08:00
ffb1e3ec2d wavesynth: np.int is deprecated 2021-09-13 07:02:35 +08:00
2d79d824f9 firmware: remove minor or1k leftovers 2021-09-12 20:03:37 +08:00
a573dcf3f9 board_misoc/build: use rv32 as target arg
The original rv64 argument was only to match the misoc counterpart.
2021-09-10 14:11:23 +08:00
448974fe11 runtime/main: cleanup 2021-09-10 13:59:53 +08:00
b091d8cb66 kernel: flush cache before mod_init
This could be necessary as redirecting instructions from D$ directly to I$ as it seems.
Related: https://github.com/SpinalHDL/VexRiscv/issues/137
2021-09-10 13:25:12 +08:00
5394d04669 test_spi: add delay 2021-09-10 13:25:12 +08:00
b8ed5a0d91 alloc: fix alignment for riscv32 arch 2021-09-10 13:25:12 +08:00
2213e7ffac ksupp/rtio/exception: fix timestamp 2021-09-10 13:25:12 +08:00
09ffd9de1e dma: fix timestamp fetch 2021-09-10 13:25:12 +08:00
051a14abf2 rtio/dma: fix endianness 2021-09-10 13:25:12 +08:00
c6ba0f3cf4 ksupport: fix dma cslice (ffi) 2021-09-10 13:25:12 +08:00
c812a837ab runtime: enlarge stack size 2021-09-10 13:25:12 +08:00
a596db404d satman: fix cargo xbuild sysroot 2021-09-10 13:25:12 +08:00
4fab267593 cargo: std dependency hack 2021-09-10 13:25:12 +08:00
dcbd9f905c cargo: use cargo xbuild 2021-09-10 13:25:12 +08:00
9f6b3f6014 firmware: clarify target triple
The lack of compressed instruction support can be inferred from the target triple, literally.
2021-09-10 13:25:12 +08:00
4619a33db4 test: remove broken array return tests
Removed test cases that do not respect lifetime/scope constraint.
See discussion in artiq-zynq repo: M-Labs/artiq-zynq#119
Referred to the patch from @dnadlinger. 5faa30a837
2021-09-10 13:25:12 +08:00
5985f7efb5 syscall: lower nowrite to inaccessiblememonly
In the origin implementation, the `nowrite` flag literally means not writing memory at all.
Due to the usage of flags on certain functions, it results in the same issues found in artiq-zynq after optimization passes. (M-Labs/artiq-zynq#119)
A fix wrote by @dnadlinger can resolve this issue. (c1e46cc7c8)
2021-09-10 13:25:12 +08:00
6db7280b09 flake: board package WIP 2021-09-10 13:25:12 +08:00
d8ac429059 dyld: streamline lib.rs
Only riscv32 is supported anyway, no need to have excessive architecture check.
2021-09-10 13:25:12 +08:00
798774192d slave_fpga/bootloader: read in little endian 2021-09-10 13:25:12 +08:00
eecd825d23 firmware: suppress warning 2021-09-10 13:25:12 +08:00
1da0554a49 pcr: purge 2021-09-10 13:25:12 +08:00
5d0a8cf9ac llvm_ir_gen: fix indent 2021-09-10 13:25:12 +08:00
70507e1b72 Cargo.lock: update 2021-09-10 13:25:12 +08:00
c113cd6bf5 libfringe: bump 2021-09-10 13:25:12 +08:00
61b0170a12 firmware: purge or1k 2021-09-10 13:25:12 +08:00
af263ffe1f ksupport: fix rpc, cache signature (FFI)
The reason of the borrow stuff is explained in M-Labs/artiq-zynq#76 (artiq-zyna repo).
As for `cache_get()`, compiler will perform stack allocation to pre-allocate the returned structure, and pass to cache_get alongside the `key`.
However, ksupport fails to recognize the passed memory, so it will always assume the passed memory as the key.
2021-09-10 13:25:12 +08:00
a833974b50 analyzer: fix endianness 2021-09-10 13:25:12 +08:00
d623acc29d llvm_ir_gen: fix now with now_pinning & little-endian target 2021-09-10 13:25:12 +08:00
8fa47b8119 rpc: enforce alignment 2021-09-10 13:25:12 +08:00
de0f2d4a28 firmware: adopt endianness protocol in artiq-zynq
Related:
artiq-zynq: M-Labs/artiq-zynq#126
artiq: #1588
2021-09-10 13:25:12 +08:00
9afe63c08a ksupport: fix proto_artiq dependency 2021-09-10 13:25:12 +08:00
29a2f106d1 ksupport: replace asm with llvm_asm 2021-09-10 13:25:12 +08:00
b30ed75e69 kernel.ld: load elf header and prog headers
ld.lld has a habit of not putting the headers under any load sections.
However, the headers are needed by libunwind to handle exception raised by the kernel.
Creating PT_LOAD section with FILEHDR and PHDRS solves this issue. Other PHDRS are also specified as linkers (not limited to ld.lld) will not create additional unspecified headers even when necessary.
2021-09-10 13:25:12 +08:00
279593f984 ksupport.ld: merge sbss with bss 2021-09-10 13:25:12 +08:00
1ba8c8dfee runtime: remove irq again 2021-09-10 13:25:12 +08:00
3d629006df makefiles: revert byte-swaps 2021-09-10 13:25:12 +08:00
7542105f0f board_misoc: remove pcr
VexRiscv seems to not support additional hardware performance counter, at least I have not seen any documentation on how to use it.
2021-09-10 13:25:12 +08:00
01ca114c66 runtime: remove irq dependency 2021-09-10 13:25:12 +08:00
36171f2c61 runtime: remove inaccurate sp on panic 2021-09-10 13:25:12 +08:00
01e357e5d3 ksupport.ld: reduce load section alignment 2021-09-10 13:25:12 +08:00
f77b607b56 compiler: generate symbols 2021-09-10 13:25:12 +08:00
1293e0750e ld, makefiles: use ld.lld 2021-09-10 13:25:12 +08:00
fc42d053d9 kernel: use vexriscv 2021-09-10 13:25:12 +08:00
1b516b16e2 targets: default to vexriscv cpu 2021-09-10 13:25:12 +08:00
e8fe8409b2 libartiq_support: compatibility with recent stable rustc 2021-09-10 13:25:12 +08:00
cabe5ace8e compiler: remove DebugInfoEmitter for now
Causes problems with LLVM 9 and not needed at first.
2021-09-10 13:25:12 +08:00
6629a49e86 compiler: use LLVM binutils/linker for Arm as well
Previously we kept GNU Binutils because they are less of a pain to support
on Windoze - the source of so many problems - but with RISC-V we need to
update LLVM anyway.
2021-09-10 13:25:12 +08:00
43d120359d compiler: switch to upstream llvmlite and RISC-V target 2021-09-10 13:25:12 +08:00
5656e52581 remove profiler 2021-09-10 13:25:12 +08:00
1b8b4baf6a ksupport: fix panic, libc, unwind 2021-09-10 13:25:12 +08:00
905330b0f1 ksupport: handle riscv exceptions 2021-09-10 13:25:12 +08:00
50a62b3d42 liballoc: change align to 16 bytes 2021-09-10 13:25:12 +08:00
7f0bc9f7f0 runtime/makefile: specify emulation, flip endianness 2021-09-10 13:25:12 +08:00
c42adfe6fd runtime.ld: merge .sbss & .bss 2021-09-10 13:25:12 +08:00
f56152e72f rust: fix dependencies 2021-09-10 13:25:12 +08:00
c800b6c8d3 runtime: update rust alloc, managed 2021-09-10 13:25:09 +08:00
e99061b013 runtime: add riscv 2021-09-10 13:23:22 +08:00
ecedec577c runtime: impl riscv exception handling 2021-09-10 13:23:15 +08:00
252594a606 runtime: impl riscv panic handler 2021-09-10 13:20:31 +08:00
31bf17563c personality: update from rust/panic_unwind 2021-09-10 13:20:31 +08:00
bfddd8a30f libdyld: add riscv support 2021-09-10 13:20:31 +08:00
ad3037d0f6 libc: add minimal C types 2021-09-10 13:20:31 +08:00
daaf6c3401 libunwind: add rust interface 2021-09-10 13:20:31 +08:00
6d9cebfd42 satman: handle .sbss generation 2021-09-10 13:20:31 +08:00
96438c9da7 satman: make fbi big-endian 2021-09-10 13:20:31 +08:00
6535b2f089 satman: fix feature 2021-09-10 13:20:31 +08:00
45adaa1d98 satman: add riscv exception handling 2021-09-10 13:20:31 +08:00
869a282410 satman: use riscv 2021-09-10 13:20:31 +08:00
ebb9f298b5 proto_artiq: update alloc type path 2021-09-10 13:20:31 +08:00
97a0132f15 libio: update alloc type path 2021-09-10 13:20:31 +08:00
37ea863004 libio: pin failure version 2021-09-10 13:20:31 +08:00
3ff74e0693 bootloader: handle .sbss generation in .ld
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
448fe0e8cf bootloader: fix panic
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
8294d7fea5 bootloader: swap endianness
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
13032272fd bootloader: add rv32 exception handler
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
46102ee737 board_misoc: build vectors.S with rv64 target in misoc
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
b87ea79d51 rv32: rm irq & vexriscv-rust
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
9aee42f0f2 rv32/boot: remove hotswap
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
82b4052cd6 libboard_misoc: vexriscv integration
Signed-off-by: occheung <dc@m-labs.hk>
2021-09-10 13:20:31 +08:00
Leon Riesebos
2cf144a60c ddb_template: edge counter keys correspond with according ttl keys
previously ttl_counter_0 and ttl_0 could be on completely different physical ttl output channels
with this change, ttl_0_counter (note the changed key format) is always on the same channel as ttl_0

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-09-06 09:06:04 +08:00
4d7bd3ee32 phaser: fail init() if frame timestamp measurement times out
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-03 12:01:26 +02:00
075cb26dd7 phaser: rename get_next_frame_timestamp() to get_next_frame_mu()
and implement review comments (PR #1749)

Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-03 09:58:01 +02:00
7aebf02f84 phaser: docs: add reference to get_next_frame_timestamps(), fix typo
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-01 17:44:46 +02:00
61b44d40dd phaser: add labels to debug init prints
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-01 17:43:30 +02:00
65f8a97b56 phaser: add helpers to align updates to the RTIO timeline
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
2021-09-01 17:42:54 +02:00
SingularitySurfer
65f63e6927 fix suservo start 2021-08-19 07:38:48 +00:00
a53162d01d tester: tweak suservo
* p gain 1 to get reasonable power
* refine testing instructions and comments
2021-08-19 09:17:14 +02:00
SingularitySurfer
4d21a72407 Implement SUServo tester. 2021-08-18 15:10:27 +00:00
Mikołaj Sowiński
898122f3e5
Added support for HVAMP_8CH (#1741) 2021-08-16 13:39:00 +08:00
420891ba54 syntax 2021-08-12 13:01:35 +08:00
9f94bc61ae missing part of 477b1516d 2021-08-12 12:55:37 +08:00
c69a1316ad compiler: stop using sys.version_info for parser 2021-08-12 12:52:24 +08:00
477b1516d3 remove profiler 2021-08-12 12:51:55 +08:00
67847f98f4 artiq_run: fix multiarch 2021-08-12 12:48:10 +08:00
7879d3630b made kc705/gtx interface more similar to kasli/gtp 2021-08-10 18:53:52 +08:00
242dfae38e kc705: fix DRTIO targets 2021-08-06 15:41:47 +08:00
5111132ef0
ICAP: prevent sayma from using it (#1740) 2021-08-06 15:08:30 +08:00
dc546630e4 kc705: DRTIO variants WIP 2021-08-06 14:41:41 +08:00
fd824f7ad0 ddb_template: print LED channel nos on Kasli v2 2021-08-05 17:29:38 +02:00
c9608c0a89 zotino: default div_read unified with ad53xx at 16, fix ad53xx doc 2021-08-05 17:42:11 +08:00
6b88ea563d
talk to ICAP primitive to restart gateware (#1733) 2021-08-05 17:00:31 +08:00
97e994700b compiler: turn __repr__ into __str__ when sphinx is used. Closes #741 2021-08-05 11:32:20 +08:00
c3d765f745 ad9910: fix type annotations 2021-08-05 11:30:54 +08:00
53a98acfe4 artiq_flash: cleanup openocd handling, do not follow symlinks
Not following symlinks allows files to be added to OpenOCD via nixpkgs buildEnv.
2021-07-26 17:01:24 +08:00
30e5e06a33
moninj: fix read of incomplete data (#1729) 2021-07-22 17:56:38 +08:00
ebb67eaeee
applets: add length warning message on plot for plot_xy_hist and fix bug (#1725) 2021-07-19 15:45:48 +08:00
943a95e07a
applets: add data length warning message for plot_xy (#1722) 2021-07-19 15:14:15 +08:00
e996b5f635
applets: fix warning timing 2021-07-19 12:26:01 +08:00
4fb8ea5b73 artiq_flash: determine which firmware to flash by looking at filesystem
Closes #1719
2021-07-14 16:43:00 +08:00
5cd721c514
applets: add plot_hist dataset length mismatch warning (#1718) 2021-07-14 15:57:55 +08:00
Star Chen
6ce9c26402
GUI: add option to create new datasets (#1716) 2021-07-13 12:53:35 +08:00
2204fd2b22 adf5356: add delay to sync()
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
2021-07-08 10:03:20 +08:00
b10d1bdd37 compiler: proper union find
The find implementation was not very optimized, and the unify function
did not consider tree height and may build some tall trees.
2021-07-07 09:22:16 +08:00
4ede58e44b compiler: reduce calls to TypedTreeHasher
We need to check if our inference reached a fixed point. This is checked
using hash of the types in the AST, which is very slow. This patch
avoids computing the hash if we can make sure that the AST is definitely
changed, which is when we parse a new function.

For some simple programs with many functions, this can significantly
reduce the compile time by up to ~30%.
2021-07-07 09:22:16 +08:00
822e8565f7 compiler: supports kernel decorators with path 2021-07-02 17:01:31 +08:00
6fb31a7abb compiler: allow empty list in quote 2021-07-02 15:16:19 +08:00
0806b67dbf compiler: speedup list processing 2021-07-02 14:22:25 +08:00
f531af510c compiler: fixed embedding annotation evaluation 2021-06-25 11:32:23 +08:00
c29a149d16 compiler: allows string annotation
According to PEP484, type hint can be a string literal for forward
references. With PEP563, type hint would be preserved in annotations in
string form.
2021-06-25 11:01:48 +08:00
Etienne Wodey
68268e3db8 docs: fix some formatting issues
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-06-23 20:29:43 +08:00
Etienne Wodey
cca654bd47 test_device_db: fix on Windows (tempfile access limitations)
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-06-21 16:47:22 +08:00
Etienne Wodey
8bedf278f0 set_dataset: pass HDF5 options as a dict, not as loose kwargs
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-06-17 16:43:05 +02:00
Etienne Wodey
12ef907f34 master/databases: fix AttributeError in DatasetDB.set()
Add corresponding unit test.

Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-06-17 16:30:38 +02:00
Etienne Wodey
d8b1e59538 datasets: allow passing options to HDF5 backend (e.g. compression)
This breaks the internal dataset representation used by applets
and when saving to disk (``dataset_db.pyon``).

See ``test/test_dataset_db.py`` and ``test/test_datasets.py``
for examples.

Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-06-17 12:04:16 +02:00
Etienne Wodey
b8ab5f2607 master/databases: use tools.file_import to load the device_db
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-06-17 07:58:17 +08:00
Etienne Wodey
5c23e6edb6 test: add regression tests for master.databases.DeviceDB
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-06-17 07:58:17 +08:00
7046aa9c23 compiler: stop using deprecated numpy.float 2021-06-15 10:48:34 +08:00
ea0c7b6173 Merge remote-tracking branch 'harrydrtio/k7-drtio' 2021-06-15 10:04:45 +08:00
Star Chen
9dee8bb9c9
Kasli: Added front panel user LED (#1623) (#1694) 2021-06-07 16:05:50 +08:00
bcb030cc9c
aqctl_corelog: fix endianness issue (closes #1682) (#1689)
Fixed according to
https://forum.m-labs.hk/d/190-fetchingreading-the-core-log-in-a-central-location/10

Tested with both KC705 and ZC706.
2021-06-03 14:06:17 +08:00
ea1dd2da43 artiq_ddb_template: kasli-soc support 2021-05-30 20:33:44 +08:00
Leon Riesebos
07bd1e27c1 artiq_flash: wrap paramiko commands in bash login shell
the login shell will load the nix environment on non-nixos systems

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-05-27 21:44:10 +08:00
4c743cf8af revert busy polling 2021-05-23 14:07:11 +08:00
1e9a131386 coredevice.comm_kernel: performance improvement
reduced latency by busy polling, and improved byte list performance.
2021-05-23 13:30:00 +08:00
43b2a3791c jsonschema: only allow enable_sata_drtio=true for Kasli if v1.0/1.1 2021-05-17 12:46:19 +08:00
935e18c1be artiq_flash: improve openocd not found error message 2021-05-13 14:45:23 +08:00
129cf8c1dd Phaser: Make set_nco_phase set the phase of the NCO
Previous to this commit `set_nco_phase()` set the phase of the DUC instead
of the NCO. Setting the phase of the NCO may be desirable to utilise the
auto-sync functionality of the double-buffered DAC-NCO settings.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-11 23:16:14 +01:00
043c9c20d7 phaser: Improve documentation of DAC settings
1. Clarify which features require additional configuration via the `dac`
   constructor argument.
2. Document when DAC settings apply immediatly/are staged.
3. Document how staged DAC settings may be applied
4. Calrify operation of `dac_sync`

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:58:30 +01:00
f97baa8aec phaser: workaround malformed output with mixer_ena=1 & nco_ena=0
When Phaser is powered on and `init()` is first called, enabling the
DAC-mixer while leaving the NCO disabled causes malformed output.
This commit implements a workaround by making sure the NCO is enabled,
before being set to the disired state.

This commit also avoids the following procedure, resulting in
malformed output:
1. Operate Phaser with the DAC Mixer and NCO enabled
2. Set the NCO to a non-zero frequency
3. Disable the NCO in the device_db
4. Re-initialise Phaser

After this procedure, with CMIX disabled, incorrect output is produced.
To clear the fault one must re-enable the NCO and write the NCO freqeuncy
to zero before disabling the NCO.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
4fa2028671 phaser: fix coarse mixer register offset
The CMIX bits are bits 12-15 in register 0x0d. This has been checked
against the datasheet and verified on hardware. Until now, the bit for
CMIX1 was written to CMIX0. The CMIX0 bit was written to a reserved bit.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
515cfa7dfb Phaser: expose coarse mixer and document need to enable the DAC-mixer.
in some use cases a larger tunable range than available via the DUC may
be needed. Some use cases may wish to combine the coarse mixer with the
DUC to extend the tunable range.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
4f812cc4ed Phaser: zero oscillator amplitude after init() (close #1651)
Currently, `init()` leaves a single oscillator at full scale. The phase
accumulator of this oscillator is held continuously cleared. Provided no
upconverting mechanism is active (DUC, CMIX, NCO), this produces a full-scale
DC voltage. The DC voltage is blocked by hardware capacitors. This behaviour
is not mentioned by the `init` documentation.

If one attempts to use any other oscillator without reducing the amplitude
of the oscillator enabled by `init`, there is by significant clipping.

In the case that the NCO or CMIX are configured via the device_db
(suggested in the docs), leaving the osillator at full scale results in
full RF output power after calling `init()`. This may plausibly damage loads
driven by phaser.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
407fba232d Phaser upconverter: set phase-frequency detector to 62.5 MHz (close #1648)
The suitable PFD clock depends on the use case and will likely need
to be configured by some users. All things being equal, a higher PFD
clock is desirable as is results in lower local oscillator phase-noise.

Phaser was designed around a maximum PFD clock of 62.5 MHz. In integer mode,
with no local oscillator frequency divisor set, a 62.5 MHz PFD clock results
in a 125 MHz local oscillator step size. Given the +-200 MHz range of the DUC
(more if using the DAC mixer), this step size will be acceptable to many.
This seems like the most appropreate default configuration as it should offer
the best phase-noise performance.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
75445fe5f0 Phaser: expose and automate clearing of DAC sif_sync (close #1630 and #1650)
`sif_sync` must be triggered to apply NCO frequency changes. To achieve per
channel frequency tunability exeeding the range of the DUC, the NCO frequeny must
adjusted. User code will need to trigger `sif_sync` to achieve this.

`sif_sync` can only be triggered if the bit was cleared. To avoid this pitfall,
the clearing of `sif_sync` is automated.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
1c96797de5 Phaser upconverter: Follow datasheet procedure for VCO calibration (close #1643)
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
7404152e4c Phaser upconverter: rename ndiv -> nint to match datasheet (close #1638)
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:47 +01:00
eb477ee06b phaser: print gw_rev in debug mode 2021-05-08 14:48:46 +01:00
c7e992e26d Phaser: flake8
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-05-08 14:48:46 +01:00
eb38b664e3 phaser: typo 2021-05-07 10:00:10 +08:00
Peter Drmota
47bf5d36af coredevice.comm_kernel: Fix unpacking of lists of numpy.int64
test.coredevice.test_embedding: Add tests for list of numpy.int64
2021-04-21 15:46:58 +01:00
Leon Riesebos
af4fadcd54 added DefaultMissing to __all__
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-04-21 11:42:21 +08:00
Leon Riesebos
a0cea3a011 added __iter__ and __len__ to ScanObject base class
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-04-21 11:42:21 +08:00
Leon Riesebos
2671c271d4 ad99xx unified type annotations for cfg_sw() methods and fixed test cases
closes #1642

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-04-21 11:29:55 +08:00
Leon Riesebos
d745d50245 ad99xx added additional kernel invariants
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-04-21 11:18:31 +08:00
Leon Riesebos
4a6201c083 ad99xx make kernel invariants instance variable
prevents mutations on class variable that applies to all instances at once
closes #1654

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-04-21 11:18:31 +08:00
ffe1c9f9b1
Merge pull request #1628 from pathfinder49/fastino_mu_fix
fastino: ensure `xxx_to_mu()` methods return int32 on the host
2021-04-15 15:02:12 +02:00
bda5aa7c7e fastino: ensure xxx_to_mu() methods return int32 on the host
Currently running `voltage_to_mu()` or `voltage_group_to_mu()` on the host will
convert all machine unit values to int64. This leads to issues when machine units
are returned from RPCs.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2021-04-15 11:41:22 +01:00
David Nadlinger
b7f3eaebf9 gui: Fix occasional wrong fuzzy select menu position on KDE/Linux 2021-04-04 00:04:11 +01:00
fc59791583 jsonschema: mirny: fix clk_sel default value 2021-03-30 16:06:56 +08:00
8002fcf8bb jsonschema: style 2021-03-29 17:49:43 +08:00
5f32cb7196 jsonschema: mirny: accept string enums for validating clk_sel 2021-03-29 17:49:43 +08:00
75efb8985c ddb_template: mirny_cpld: accept clk_sel as a string 2021-03-29 17:49:43 +08:00
David Nadlinger
bdaaf3c1d7 dashboard: Disable Group CCB policy menu before first entry is selected
It was possible to crash the dashboard by opening the context menu
before an applet entry had been selected for the first time (e.g.
immediately after startup) and selecting one of the Group CCB
actions, as the enable update slot would not have been run.
2021-03-21 02:04:24 +00:00
David Nadlinger
6fd088e339 test/lit: Fix invalid type inference test
This broke after b8cd163978, but
is invalid code to start with; this would have previously
crashed the code generator had the code actually been compiled.

(Allowing implicit conversion to bool would be a separate debate.)
2021-03-21 01:46:52 +00:00
David Nadlinger
be4669d7a5 compiler: Fix crash with try/finally and stack-return function calls
The previous code could have never worked as-is, as the result slot
went unused, and it tried to append the load instruction to the
block just terminated with the invoke.

GitHub: Fixes #1506, #1531.
2021-03-21 01:31:26 +00:00
David Nadlinger
1f40f3ce15 compiler: Map host numpy.bool_ values to TBool
Since we don't implement any integer-like operations for TBool
(addition, bitwise not, etc.), TBool is currently neither
strictly equivalent to builtin bool nor numpy.bool_, but through
very obvious compiler errors (operation not supported) rather than
silently different runtime behaviour.

Just mapping both to TBool thus is a huge improvement over the
current behaviour (where numpy.False_ is a true-like object). In
the future, we could still implement more operations for TBool,
presumably following numpy.bool_ rather than the builtin type,
just like builtin integers get translated to the numpy-like
TInt{32,64}.

GitHub: Fixes #1275.
2021-03-20 00:54:41 +00:00
David Nadlinger
b8cd163978 compiler: Fix type inference for "ternary" if expressions
Previously, any type would be accepted for the test expression,
leading to internal errors in the code generator if the passed
value wasn't in fact a bool.
2021-03-20 00:27:25 +00:00
David Nadlinger
888696f588 coredevice: Fix RPC typing for bool lists/arrays
GitHub: Fixes #1635.
2021-03-20 00:03:10 +00:00
Leon Riesebos
d04bcd8754 add get_*() functions to ad9910, ad9912, and urukul. closes #1616
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-03-15 13:06:24 +08:00
Leon Riesebos
c22f731a61 added typing and reformatted driver for ad9910, ad9912, and urukul
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-03-15 13:06:24 +08:00
David Nadlinger
5ba22c11c3 compiler: Change type inference rules for empty array() calls
array([...]), the constructor for NumPy arrays, currently has the
status of some weird kind of macro in ARTIQ Python, as it needs
to determine the number of dimensions in the resulting array
type, which is a fixed type parameter on which inference cannot
be performed.

This leads to an ambiguity for empty lists, which could contain
elements of arbitrary type, including other lists (which would
add to the number of dimensions).

Previously, I had chosen to make array([]) to be of completely
indeterminate type for this reason. However, this is different
to how the call behaves in host NumPy, where this is a well-formed
call creating an empty 1D array (or 2D for array([[], []]), etc.).

This commit adds special matching for (recursive lists of) empty
ListT AST nodes to treat them as scalar dimensions, with the
element type still unknown.

This also happens to fix type inference for embedding empty 1D
NumPy arrays from host object attributes, although multi-dimensional
arrays will still require work (see GitHub #1633).

GitHub: Fixes #1626.
2021-03-14 22:48:43 +00:00
David Nadlinger
c707ccf7d7 compiler: Properly implement NumPy array slicing
Strided slicing of one-dimensional arrays (i.e. with non-trivial
steps) might have previously been working, but would have had
different semantics, as all slices were copies rather than a view
into the original data.

Fixing this in the future will require adding support for an index
stride field/tuple to our array representation (and all the
associated indexing logic).

GitHub: Fixes #1627.
2021-03-14 20:02:59 +00:00
David Nadlinger
557671b7db compiler: Fix type inference in slice expressions
This was a long-standing issue affecting both lists and
the new NumPy array implementation, just caused by the
generic inference passes not being run on the slice
subexpressions (and thus e.g. ints not being monomorphized).

GitHub: Fixes #1632.
2021-03-14 18:46:28 +00:00
David Nadlinger
75c255425d compiler: Linguistically untangle comment [nfc] 2021-03-14 18:40:21 +00:00
Leon Riesebos
b8f4c6b9bb added test case for get_experiment() with nested class
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-02-28 14:26:44 +08:00
Leon Riesebos
1deaa758ce get_experiment() is able to get nested experiment classes using dots in class names.
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-02-28 14:26:44 +08:00
Leon Riesebos
3c68223337 replaced deprecated inspect.getargspec() with inspect.getfullargspec()
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-02-28 14:25:05 +08:00
Leon Riesebos
cd7f9531d7 added abstract describe method to ScanObject
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2021-02-28 14:25:05 +08:00
92fd705990 increase memory allocated to comms CPU
See discussion in #1612.
2021-02-21 19:06:12 +08:00
8deb269b9a update major version 2021-02-17 16:18:05 +08:00
14d464b4cf update copyright year 2021-02-17 15:52:08 +08:00
Etienne Wodey
3cd96a951a master: refactor experiments enumeration, use tools.get_experiment
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-02-13 10:06:12 +08:00
Etienne Wodey
2ca9b64ba1 test: add unit tests for tools.file_import and tools.get_experiment
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-02-13 10:06:12 +08:00
d33a206f04 eem: fix Urukul QSPI after 9ef5717de8 (2) 2021-02-12 13:17:48 +08:00
3844cde97b jsonschema: validate hw_dev depending on target 2021-02-12 11:09:01 +08:00
22ce5b0299 eem: fix Urukul QSPI after 9ef5717de8 2021-02-12 10:59:53 +08:00
Etienne Wodey
af411de639 tools/file_import: simplify, remove deprecated load_module() call
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-02-10 16:03:31 +08:00
e54dd08821 metlino,sayma: adapt to new EEM API
This also enables 4X SERDES TTLs.
2021-02-10 15:32:10 +08:00
547254e89e eem_7series: pass through kwargs 2021-02-10 15:31:49 +08:00
49299c00a9 eem: enable DCI for LVDS TTL 2021-02-10 15:31:25 +08:00
9ef5717de8 eem: support different I/O standards in EEM slots 2021-02-10 15:31:05 +08:00
Drew
48a1c305c1 master: fix DeprecationWarning on logger.warn
Resolves error message shown.

The following error message is shown when worker_impl.py:199 is run: 

```
WARNING:worker(RID,EXPERIMENT):py.warnings:/nix/store/77sw4p03cb7rdayx86agi4yqxh5wq46b-python3.7-artiq-5.7141.1b68906/lib/python3.7/site-packages/artiq/master/worker_impl.py:199: DeprecationWarning: The 'warn' function is deprecated, use 'warning' instead
  logging.warn(message)
```
2021-02-10 15:27:22 +08:00
461199b903 kasli_generic: warn if min_artiq_version is not met 2021-02-10 15:26:15 +08:00
4b2ed67dd7 coredevice_generic.schema.json: add "min_artiq_version" 2021-02-10 15:26:15 +08:00
cf9cf0ab6f ttl_serdes_7series: add dci (HP bank) support 2021-02-07 22:32:18 +08:00
997a48fb31 ttl_serdes_ultrascale: fix, add dummy dci argument 2021-02-07 22:31:46 +08:00
bbe0c9162a ttl_serdes_ultrascale: cleanup 2021-02-07 22:00:33 +08:00
3572e2a9c7 ttl_serdes_7series: fix 2021-02-07 21:41:13 +08:00
88c212b84f ttl_serdes_7series: cleanup 2021-02-07 21:33:21 +08:00
db25f4e8f7 ttl_serdes_7series: use simpler I/O buffers
In theory equivalent with these parameters.
2021-02-07 20:10:37 +08:00
6bd9691ba8 gateware: remove TTL dead code 2021-02-07 19:58:02 +08:00
bfacd1e5b3 eem: fix Grabber cc_0-2 signal definitions 2021-02-07 18:01:05 +08:00
f7a33a1f99 gateware: make 7-series EEM handling functions shareable 2021-02-07 14:34:26 +08:00
1213f78ee9 jsonschema: support kasli_soc 2021-02-07 13:39:01 +08:00
2f5ea67b69
Merge pull request #1596 from airwoodix/fix-adf5356-init
coredevice/adf5356: fix initial device detection
2021-02-02 18:20:08 +01:00
Etienne Wodey
d691b05d78 coredevice/mirny: better error handling for clk_sel
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-02-02 16:23:47 +01:00
Etienne Wodey
78e1b9f8e5 sinara_tester/mirny: remove hw_rev checking fixup code
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-01-29 18:47:40 +01:00
Etienne Wodey
6f8e788620 coredevice/mirny: support human readable clk_sel
In init(), read hw_rev to derive clk_sel code from user string.

Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-01-29 18:46:47 +01:00
Etienne Wodey
a8bc98a77b coredevice/adf5356: fix initial device detection
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2021-01-28 18:29:40 +01:00
David Nadlinger
f9872bb7b8 coredevice: Handle prematurely closed sockets in comm_kernel receive loop
recv() returns 0 instead of data if the socket has already
been closed. This is translated into a zero-length list on
the Python layer. Previously, the code would enter an
infinite loop if the socket was closed while attempting
to receive data.
2021-01-26 18:10:49 +08:00
David Nadlinger
f1fd42ea98 coredevice: Re-enable TCP keepalive
This partially reverts commit b5e1bd3fa2,
which had removed keepalive. This, however, led to experiments
hanging forever if the core device had dropped the connection
(e.g. to a kernel CPU panic, or the device being rebooted).

The chosen keepalive settings are fairly conservative (with the
10 s timeout) to avoid any possible interaction with smoltcp's
3 s ARP try interval (see GitHub issue #1150), even though this
should be a non-issue now due to the larger ARP cache.
2021-01-26 18:10:49 +08:00
8148fdb8a7
use device endian for core device protocols (#1591) 2021-01-22 16:33:21 +08:00
a0fd5261ea kc705: cleanup 2021-01-22 11:11:13 +08:00
7c4eed7a11 kc705: simplify DRTIO master & satellite
* KC705 master: user can no longer choose whether or not the SMA acts as the 2nd DRTIO channel; SFP and SMA now act as the 1st and 2nd channel respectively by default.
* KC705 satellite: user should now use `--sma` to enable using the SMA as the satellite channel; SFP acts as the satellite channel by default.
2021-01-22 11:11:13 +08:00
David Nadlinger
1e443a3aea coredevice: Reuse Target.little_endian for protocol endianness [nfc] 2021-01-21 09:11:54 +01:00
ec72eeda46 coredevice: use device endian for kernel and RPC 2021-01-21 09:07:48 +01:00
3832b261b1 firmware: optimize integer array/list rpc 2021-01-21 09:05:17 +01:00
88b14082b6 drtio/transceiver/gtx: delete obsolete modules 2021-01-20 15:05:32 +08:00
9daf77bd58 kc705: add multichannel support on satellite
* Two DRTIO channels (i.e. satellite and repeater) are enabled by default.
* User can choose either the SFP or SMA as the satellite channel (by passing `--drtio-sat sfp` or --drtio-sat sma` to the argparser), and the unchosen would become the repeater channel.
2021-01-20 15:05:32 +08:00
52afd4ef6b kc705: add GTX multilane support, add multichannel support on master
* One DRTIO master channel is enabled by default.
* User can set the SMA as the 2nd master channel (by passing --drtio-sma to the argparser).
* Multi-channel (i.e. with repeaters) on KC705 satellite is supported but has not been implemented yet.
2021-01-20 15:05:32 +08:00
f6d39fd6ba kc705: revive DRTIO master with updated syntax
* KC705 master variant now uses Si5324 as synthesiser.
* Multi-channel has not been implemented yet.
2021-01-20 15:05:31 +08:00
f25e86e934 kc705: revive DRTIO satellite with updated syntax, update GTX
* Multi-channel has not been implemented yet.
2021-01-20 11:25:38 +08:00
David Nadlinger
c229e76d07 compiler: Add accidentally omitted note to invalid RPC type diagnostic
Might be a minor quality-of-life employment, but there
isn't a test case for this anyway.
2021-01-20 01:49:16 +01:00
261870bdee phaser: fix oscillator rtio address for even base addresses
close #1580
2021-01-19 16:56:50 +01:00
David Nadlinger
f11aef74b4 gui: Add context menu entry to close all applets
This is occasionally very useful if a large number of
applets were left open (e.g. spawned via CCB).
2021-01-17 11:56:03 +01:00
c675488a99 reorganize JSON schema files 2021-01-16 10:43:14 +08:00
c6807f4594 kasli_generic: validate description against schema, use defaults from schema 2021-01-16 10:35:23 +08:00
45b5cfce05 gateware: add a kasli_generic.schema.json 2021-01-16 10:35:23 +08:00
David Nadlinger
9b39b1e328 test: Add coredevice tests for matrix multiplication
Also includes a regression test specifically for
mixing multiple types in one kernel.
2021-01-12 03:02:07 +01:00
David Nadlinger
f0284b2549 compiler: Fix collision of environments in matmult implementations
GitHub: Fixes #1578.
2021-01-12 03:02:07 +01:00
David Nadlinger
362f8ecb69 compiler: Add test for disallowing type-unstable array-assign binops 2021-01-12 03:02:07 +01:00
David Nadlinger
96692791cf compiler: Implement assigning binops for arrays
GitHub: Fixes #1579.
2021-01-12 03:02:07 +01:00
5b5db1433b Revert "compiler: enabled vectorize option"
This reverts commit 636898c302.
2021-01-11 19:43:12 +08:00
636898c302 compiler: enabled vectorize option 2021-01-11 16:31:24 +08:00
6a5f5088e2 frontend: sinara_tester: add mirny test
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
2021-01-05 17:01:01 +08:00
cff7bcc122 Merge branch 'master' (43be383c86) into k7-drtio 2020-12-31 13:30:46 +08:00
dc7addf394 Revert "drtio: remove KC705/GTX support"
This reverts commit ebdbaaad32.
2020-12-31 13:29:50 +08:00
43be383c86 kasli v2.0: drive TX_DISABLE low on all SFPs (fixes #1570)
This was the same problem as #1508 but on SFP1..3
2020-12-23 00:10:12 +08:00
43ecb3fea6 sayma: add comments about CPLL line rate on KU GTH 2020-12-19 17:05:20 +08:00
8cd794e9f4 jesd204_tools: use new syntax from jesd204b core
* requires jesd204b changes as in https://github.com/HarryMakes/jesd204b/tree/gth
2020-12-19 17:05:20 +08:00
Aadit Rahul Kamat
19f75f1cfd artiq_browser: update h5py api call
Signed-off-by: Aadit Rahul Kamat <aadit.k12@gmail.com>
2020-12-17 14:23:16 +08:00
a017dafee6 ddb_template: mirny_cpld: add default value
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
2020-12-15 11:00:59 +08:00
73271600a1 jdcg: STPL tests now perform after DAC initialization 2020-12-14 18:03:31 +08:00
occheung
3f631c417d artiq_ddb_template: mirny_cpld: add refclk, clk_sel args
Signed-off-by: occheung <occheung@connect.ust.hk>
2020-12-14 13:38:20 +08:00
occheung
33d39b261a artiq_ddb_template: mirny_cpld: rename adf5355 to adf5356
Signed-off-by: occheung <occheung@connect.ust.hk>
2020-12-14 13:38:20 +08:00
4b10273a2d gui: quamash -> qasync 2020-12-12 21:59:25 +08:00
1ce505c547 coredevice: remove obsolete watchdog code (#1458) 2020-12-08 13:25:39 +08:00
072053c3b2 compiler: remove obsolete watchdog code (#1458) 2020-12-08 13:25:08 +08:00
ccdc741e73 sayma_amc: fix --sfp argument 2020-12-07 18:02:36 +08:00
33285253fb
Merge pull request #1558 from quartiq/phased_ddb_fix
Phased ddb fix
2020-12-04 16:38:40 +01:00
Leon Riesebos
3b2c225fc4 allow dashboard to close if no connection can be made to moninj
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2020-12-04 23:00:23 +08:00
Leon Riesebos
94271504dd Added RuntimeError to prelude to make the name available in kernels
closes #1477

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2020-12-04 22:59:08 +08:00
SingularitySurfer
9b4b550f76 5 is correct. 2020-12-04 14:49:30 +00:00
SingularitySurfer
cba631610c fixed phaser number of rtio channels 2020-12-04 14:40:59 +00:00
6ceb3f3095
Merge pull request #1551 from quartiq/tester_tweaks
modified urukul instructions in sinara tester script
2020-11-26 16:22:44 +01:00
eda4850f64 Revert "fixes with statement with multiple items"
This reverts commit 88d346fa26.
2020-11-22 11:57:22 +08:00
8e46c3c1fd Revert "compiler: fix incorrect with behavior"
This reverts commit fe6115bcbb.
2020-11-22 11:57:21 +08:00
SingularitySurfer
0605267424 modified urukul instructions 2020-11-19 12:20:34 +00:00
3e38833020 ad9910: fix turns_to_pow return-type on host
When run on the host, the `turns_to_pow` retrun-type is numpy.int64.
Sensibly, the compiler does not attempt to convert `numpy.int64` to `int32`.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2020-11-13 18:54:47 +01:00
David Nadlinger
9ff47bacab compiler: Provide libm special functions (erf, Bessel functions, …)
Tests hard-depend on SciPy to make sure this is exercised
during CI.
2020-11-11 19:15:30 +01:00
David Nadlinger
a5dcd86fb8 test/lit: Rename array to avoid conflict with standard library
The old name created problems if a test dependency (e.g. NumPy/SciPy)
ends up importing the system `array` module internally somewhere.
2020-11-11 17:42:53 +01:00
David Nadlinger
d95e619567 compiler: Implement binary NumPy math functions (arctan2, …)
The bulk of the diff is just factoring out the implementation
for binary arithmetic implementations, to be reused for binary
function calls.
2020-11-11 01:35:28 +01:00
David Nadlinger
bc6fbecbda compiler, firmware: Do not expose abort() to kernels
This was only exposed for the assert implementation, and
does not exist on Zynq.
2020-11-10 20:40:18 +01:00
David Nadlinger
292043a0a7 compiler: Raise AssertionErrors instead of abort()ing on all targets 2020-11-10 20:40:18 +01:00
Leon Riesebos
d8a5a8f568 fixed value scaling issue for the center scan gui widget
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2020-11-10 18:42:18 +01:00
Etienne Wodey
dbcac62fd0 coredevice: adf5356: fix/adjust docs
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
e8730a7e14 coredevice: adf5356: add test for failed PLL lock
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
3844123c13 coredevice: adf5356: add enable/disable and power setting for outA
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
61dc2b8b64 coredevice: adf5356: add some tests
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
b200465cce coredevice: adf5355: rename to adf5356
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
d433f6e86d coredevice: adf5355: more general PLL parameters calculation
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
b856df7c35 coredevice: adf5355: cleanup, style 2020-11-10 10:49:22 +08:00
Etienne Wodey
211500089f coredevice: mirny/adf5355: add basic high-level interface
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
David Nadlinger
4f311e7448 compiler: Raise exception on failed assert()s rather than panic
This allows assert() to be used on Zynq, where abort() is not
currently implemented for kernels. Furthermore, this is arguably
the more natural implementation of assertions on all kernel targets
(i.e. where embedding into host Python is used), as it matches host
Python behavior, and the exception information actually makes it to
the user rather than leading to a ConnectionClosed error.

Since this does not implement printing of the subexpressions, I
left the old print+abort implementation as default for the time
being.

The lit/integration/instance.py diff isn't just a spurious change;
the exception-based assert implementation exposes a limitation in
the existing closure lifetime tracking algorithm (which is not
supposed to be what is tested there).

GitHub: Fixes #1539.
2020-11-10 00:51:24 +01:00
David Nadlinger
f0ec987d23 test/coredevice: Avoid NumPy deprecation warning
Jagged arrays are no longer silently inferred as dtype=object,
as per NEP-34.

The compiler ndarray (re)implementation is unchanged, so the
test still fails.
2020-11-09 23:53:50 +01:00
ea95d91428 wrpll: separate collector reset 2020-11-09 17:57:13 +08:00
David Nadlinger
a97b4633cb compiler: Add math_fns module docstring [nfc] 2020-10-31 19:06:00 +01:00
Etienne Wodey
ecef5661ce coredevice/phaser: fix typos in docstring
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-10-29 20:27:08 +01:00
David Nadlinger
d672d2fc35 test/coredevice: Fixup NumPy references
This fixes a copy/paste refactoring mistake from d5f90f6c9.
2020-10-20 02:49:05 +02:00
David Nadlinger
d5f90f6c9f compiler: Fix quoting of multi-dimensional arrays
GitHub: Fixes m-labs/artiq#1523.
2020-10-20 01:40:14 +02:00
David Nadlinger
d161fd5d84 compiler: Properly expand dimensions for array([]) with ndarray elements
This matches host NumPy behaviour (and, in either case, was
previously broken, as it still continued past the array element
type).
2020-10-20 01:40:14 +02:00
David Nadlinger
94489f9183 compiler: Fix inference order issue in multi-dim. subscript
This will be caught by the test for an imminent array quoting fix.
2020-10-20 01:40:14 +02:00
a9dd0a268c
Merge pull request #1533 from m-labs/phaser
Phaser
2020-10-19 09:30:12 +02:00
30d1acee9f fastlink: fix fastino style link 2020-10-18 20:43:21 +00:00
d98357051c add ref data 2020-10-18 20:43:21 +00:00
139385a571 fastlink: add fastino test 2020-10-18 17:11:09 +00:00
d185f1ac67 wrpll: fix mulshift (2) 2020-10-17 00:32:02 +08:00
3f076bf79b wrpll: fix mulshift 2020-10-16 22:05:37 +08:00
90017da484 firmware: remove obsolete watchdog code (#1458) 2020-10-15 18:38:00 +08:00
59703ad31d test: stop checking for artiq_netboot 2020-10-15 16:18:56 +08:00
7a5996ba79 artiq_netboot: moved to git.m-labs.hk/M-Labs/artiq-netboot 2020-10-15 16:14:22 +08:00
57ee57e7ea runtime: fix metlino si5324 init (2) 2020-10-14 18:41:56 +08:00
ac35548d0f runtime: fix metlino si5324 init 2020-10-14 12:57:25 +08:00
35c61ce24d si5324: unify N31 settings when used as synthesizer
Closes #1528
2020-10-12 14:45:52 +08:00
hartytp
a058be2ede wrpll: fix test_helper_collector 2020-10-08 19:43:12 +08:00
d0d0a02fd0 test: added lit test for new error messages 2020-10-08 19:38:26 +08:00
e9988f9d3b compiler: error message for custom operations
Emit error messages for custom comparison and inclusion test,
instead of compiler crashing.
2020-10-08 19:38:26 +08:00
db62cf2abe wrpll: convert tests to self-checking unittests 2020-10-08 18:38:01 +08:00
07d43b6e5f wrpll: babysit Vivado DSP retiming
Design now passes timing.
2020-10-08 17:51:27 +08:00
7dfb4af682 kasli2: work around vivado clock constraint problem 2020-10-08 16:31:39 +08:00
96a5df0dc6 kasli2: add false path constraint for wrpll helper clock 2020-10-08 16:19:44 +08:00
6248970ef8 wrpll: clean up matlab comparison test 2020-10-08 15:40:15 +08:00
hartytp
cd8c2ce713 wrpll: add test to compare collector+filter against Matlab simulation 2020-10-08 15:36:56 +08:00
hartytp
d780faf4ac wrpll.si549: initialize the clock divider to a sensible value 2020-10-08 15:32:27 +08:00
hartytp
e6ff2ddc32 wrpll: add more diagnostics in firmware and adapt to recent gateware changes 2020-10-08 15:32:27 +08:00
hartytp
7d7be6e711 wrpll.core: move collector into helper CD so we can get tags out while the filters are reset 2020-10-08 15:32:27 +08:00
3fa5d0b963 wrpll: clean up sign extension 2020-10-08 15:32:27 +08:00
hartytp
87911810d6 wrpll.core: add CSRs to monitor the collector outputs 2020-10-08 15:32:27 +08:00
hartytp
f2f942a8b4 wrpll.ddmtd: remove CSRs from DDMTD
We will gather then from the collector output so we can get all tags on the same cycle
2020-10-08 15:32:27 +08:00
hartytp
85bb641917 wrpll.ddmtd: fix first edge deglitcher
The blind counter should be held in reset whenever the input is high,
not just when there is a rising edge (otherwise the counter runs down
during the main pulse and can then re-trigger on jitter from the falling edge)
2020-10-08 15:32:27 +08:00
hartytp
f3cd0fc675 wrpll.filters: the helper clipping threshold is currently way too low. Move clipping after the bitshift to increase a bit.
TODO: think about this and pick a sensible threshold (and also think about integrator anti windup)
2020-10-08 15:32:27 +08:00
hartytp
e5e648bde1 wrpll: add bit shift for collector helper output 2020-10-08 15:32:27 +08:00
hartytp
c9ae406ac6 wrpll: change the DDMTD helper frequency to match CERN, improve docs 2020-10-08 15:32:27 +08:00
hartytp
f6f6045f1a wrpll.thls: fix make 2020-10-08 15:32:27 +08:00
hartytp
b44b870452 wrpll.filters: update to match Weida's MatLab simulations 2020-10-08 15:32:27 +08:00
hartytp
e9ab434fa7 wrpll.core: update for modified collector 2020-10-08 15:32:27 +08:00
17c952b8fb wrpll: style 2020-10-08 15:32:27 +08:00
hartytp
ebb7ccbfd1 wrpll: document DDMTD collector and fix unwrapping 2020-10-08 15:32:27 +08:00
66401aee9c dashboard: cleanup import 2020-10-07 19:24:54 +08:00
fe6115bcbb compiler: fix incorrect with behavior 2020-10-07 18:59:35 +08:00
02f46e8b79 Fixes none to bool coercion
Fixes #1413 and #1414.
2020-10-07 15:34:24 +08:00
88d346fa26 fixes with statement with multiple items
Closes #1478
2020-10-07 15:33:34 +08:00
9214e0f3e2 firmware: fix Si5324 CKIN selection on Kasli 2.0
https://github.com/sinara-hw/Kasli/issues/82#issuecomment-702129805
2020-10-02 20:35:32 +08:00
eecd97ce4c phaser: debug and comments 2020-09-27 17:15:16 +00:00
c453c24fb0 phaser: tweak slacks 2020-09-26 21:16:08 +00:00
6c8bddcf8d phaser: tune sync_dly 2020-09-26 21:13:00 +00:00
569e5e56cd phaser: autotune and fix fifo_offset 2020-09-26 20:37:16 +00:00
2fba3cfc78 phaser: debug init, systematic bring-up 2020-09-25 20:54:59 +00:00
fec2f8b763 phaser: increase slack for iotest 2020-09-24 10:59:22 +00:00
a65239957f ad53xx: distinguish errors 2020-09-24 10:52:03 +02:00
6e6480ec21 phaser: tweak slacks and errors, identify trf 2020-09-24 08:38:30 +00:00
03d5f985f8 phaser: another artiq-python signed integer quirk 2020-09-23 15:40:54 +00:00
ef65ee18bd dac34h84: unflip spectrum, clear nco 2020-09-23 08:35:56 +00:00
50b4eb4840 Merge branch 'master' into phaser
* master: (26 commits)
  fastino: documentation and eem pass-through
  kasli2: forward sma_clkin to si5324
  test: relax test_dma_playback_time on Zynq
  rpc: fixed _write_bool
  fastino: document/cleanup
  build_soc: remove assertion that was used for test runs
  metlino_sayma_ttl: Fix RTIO frequency & demo code (#1516)
  Revert "test: temporarily disable test_async_throughput"
  build_soc: rename identifier_str to gateware_identifier_str
  test: relax loopback gate timing
  test: temporarily disable test_async_throughput
  test: relax test_pulse_rate on Zynq
  test: skip NonexistentI2CBus if I2C is not supported
  build_soc: override identifier_str only for gateware
  examples: add Metlino master, Sayma satellite with TTLOuts via FMC
  sayma_amc: add support for 4x DIO output channels via FMC
  fmcdio_vhdci_eem: fix pin naming
  build_soc: add identifier_str override option
  RPC: optimization by caching
  test: improved test_performance
  ...
2020-09-22 16:02:25 +00:00
c55f2222dc fastino: documentation and eem pass-through
* Repeat information about matching log2_width a few times
  in the hope that people read it. #1518
* Pass through log2_width in kasli_generic json. close #1481
* Check DAC value range. #1518
2020-09-22 17:58:53 +02:00
ad096f294c phaser: add hitl test exercising the complete API 2020-09-22 15:35:19 +00:00
85d16e3e5f phaser: tweaks 2020-09-22 15:27:38 +00:00
5c76f5c319 tester: add phaser 2020-09-22 14:36:49 +00:00
fd5e221898 phaser: dac and trf register maps, init code 2020-09-22 14:08:39 +00:00
3e036e365a phaser: nco, settings and init tweaks 2020-09-22 09:52:49 +00:00
fdb2867757 phaser: fewer iotest patterns 2020-09-21 17:06:26 +02:00
d730851397 phaser: elaborate init sequence, more tests 2020-09-21 15:05:29 +00:00
f0959fb871 phaser: iotest early, check_alarms 2020-09-17 14:13:58 +00:00
b15e388b5f ad53xx: distinguish errors 2020-09-17 14:13:10 +00:00
29c940f4e3 kasli2: forward sma_clkin to si5324 2020-09-17 16:53:43 +08:00
868a9a1f0c phaser: new multidds 2020-09-16 14:06:38 +00:00
c18f515bf9 phaser: rework rtio channels, sync_dly, init() 2020-09-16 12:23:07 +00:00
f3b0398720 phaser: n=2, m=16, sync_dly 2020-09-16 09:19:15 +00:00
9b58b712a6 phaser: doc tweaks 2020-09-15 12:35:26 +00:00
ff57813a9c phaser: init [wip] 2020-09-15 08:46:47 +00:00
07418258ae phaser: init [wip] 2020-09-15 08:46:10 +00:00
3a79ef740b phaser: work around integer size 2020-09-15 08:46:10 +00:00
b449e7202b phaser: rework docs 2020-09-15 08:46:10 +00:00
b619f657b9 phaser: doc tweaks 2020-09-12 19:59:49 +02:00
c3728678d6 phaser: document, elaborate comments, some fixes 2020-09-12 17:35:14 +00:00
e505dfed5b phaser: refactor coredevice driver 2020-09-12 14:17:40 +00:00
fdd2d6f2fb phaser: SI methods 2020-09-12 11:02:37 +00:00
bff611a888 test: relax test_dma_playback_time on Zynq 2020-09-11 11:21:45 +08:00
4e24700205 phaser: spelling 2020-09-09 16:52:52 +00:00
8aaeaa604e phaser: share_lut 2020-09-07 16:06:35 +00:00
e69bb0aeb3 phaser: add comment about get_dac_data 2020-09-07 16:06:16 +00:00
6195b1d3a0 rpc: fixed _write_bool
Closes #1519
2020-09-04 13:49:22 +08:00
56aa22caeb fastino: document/cleanup
* added documentation on `update`/`hold` mechanism
* mask machine unit values
* cleanup coredevice driver

close #1518
2020-09-03 17:44:26 +02:00
1b475bdac4 build_soc: remove assertion that was used for test runs 2020-09-03 20:24:18 +08:00
458a411320
metlino_sayma_ttl: Fix RTIO frequency & demo code (#1516) 2020-09-03 15:08:31 +08:00
47e88dfcbe Revert "test: temporarily disable test_async_throughput"
This reverts commit f0289d49ab.
2020-09-03 14:19:55 +08:00
002a71dd8d build_soc: rename identifier_str to gateware_identifier_str 2020-09-02 00:00:57 +08:00
4398a2d5fa test: relax loopback gate timing 2020-09-01 17:50:09 +08:00
f0289d49ab test: temporarily disable test_async_throughput
M-Labs/artiq-zynq#104
2020-09-01 17:49:40 +08:00
8d5dc0ad2a test: relax test_pulse_rate on Zynq 2020-09-01 17:08:26 +08:00
f294d039b3 test: skip NonexistentI2CBus if I2C is not supported 2020-09-01 16:47:04 +08:00
91df3d7290 build_soc: override identifier_str only for gateware 2020-09-01 10:46:39 +08:00
3d84135810 examples: add Metlino master, Sayma satellite with TTLOuts via FMC 2020-08-31 16:21:45 +08:00
dfbf3311cb sayma_amc: add support for 4x DIO output channels via FMC 2020-08-31 16:21:45 +08:00
1ad9deaf91 fmcdio_vhdci_eem: fix pin naming 2020-08-31 16:21:45 +08:00
45ae6202c0 build_soc: add identifier_str override option
Signed-off-by: Stephan Maka <stephan@spaceboyz.net>
2020-08-31 11:48:58 +08:00
272dc5d36a phaser: documentation 2020-08-28 16:36:44 +00:00
b2572003ac RPC: optimization by caching
This reduced the calls needed for socket send/recv.
2020-08-28 14:58:34 +08:00
69f0699ebd test: improved test_performance
1. Added tests for small payload.
2. Added statistics.
2020-08-28 14:58:34 +08:00
7cf974a6a7 comm_kernel: fix typo 2020-08-28 12:25:23 +08:00
68bfa04abb phaser: trf readback strobe spi changes 2020-08-27 15:31:42 +00:00
96fc248d7c phaser: synchronize multidds to frame 2020-08-27 14:28:19 +00:00
c10ac2c92a phaser: add trf, duc, interfaces, redo body assembly, use more natrual iq ordering (i lsb) 2020-08-27 14:26:09 +00:00
e5e2392240 phaser: wire up multidds 2020-08-26 17:12:41 +00:00
d1be1212ab phaser: coredevice shim, dds [wip] 2020-08-26 15:10:50 +00:00
aac2194759 Ported rpc changes to or1k 2020-08-26 14:17:06 +08:00
7181ff66a6 compiler: improved rpc performance for list and array
1. Removed duplicated tags before each elements.
2. Use numpy functions to speedup parsing.
2020-08-26 14:17:06 +08:00
cfddc13294 test: fixed test_performance
Added more tests and use normal rpc instead of async rpc.

Async RPC does not represent the real throughput which is limited by the
hardware and the network. Normal RPC which requires a response from the
remote is closer to real usecases.
2020-08-26 14:17:06 +08:00
20fcfd95e9 phaser: coredevice shim, readback fix 2020-08-24 15:46:31 +00:00
bcefb06e19 phaser: ddb template, split crc 2020-08-24 14:51:50 +00:00
11c9def589 phaser: readback delay, test fastlink 2020-08-24 14:49:36 +00:00
Paweł Kulik
eb350c3459 Drive SFP0 TX_DISABLE low during startup (as was in Kasli v1.1). Fixes Ethernet on SFP modules with pullup on this line.
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2020-08-24 21:39:53 +08:00
63e4b95325 fastlink: rework crc injection 2020-08-23 19:41:13 +00:00
a27a03ab3c fastlink: fix crc vs data width 2020-08-23 19:02:50 +00:00
7e584d0da1 fastino: use fastlink 2020-08-22 11:56:23 +00:00
3e99f1ce5a phaser: refactor link 2020-08-22 11:56:23 +00:00
a34a647ec4 phaser: refactor fastlink 2020-08-22 11:56:23 +00:00
aa0154d8e2 phaser: initial 2020-08-22 11:56:23 +00:00
5f6aa02b61 gui: unbreak background 2020-08-14 13:14:45 +08:00
David Nadlinger
69718fca90 gui: Improve fuzzy-select heuristics
Even though the code already used non-greedy wildcards before,
it would not find the shortest match, as earlier match starts
would still take precedence.

This could possibly be sped up a bit in CPython by doing
everything inside re using lookahead-assertion trickery, but the
current code is already imperceptibly fast for hundreds of
choices.
2020-08-14 02:13:45 +01:00
a46573e97a Revert "test: set uart log level to INFO for DMA tests"
This reverts commit b05cbcbc24.
2020-08-13 12:44:33 +08:00
b05cbcbc24 test: set uart log level to INFO for DMA tests 2020-08-13 12:24:57 +08:00
48008eaf5f test: omit unavailable math functions on OR1K 2020-08-12 15:01:13 +08:00
d8cd5023f6 runtime: expose more libm functions 2020-08-12 13:36:06 +08:00
David Nadlinger
c6f0c4dca4 test/coredevice: Ignore jagged 2D array embedding test for now 2020-08-10 00:23:38 +01:00
David Nadlinger
daf57969b2 compiler: Do not expand strings into TInt(8)s in array() 2020-08-09 23:46:45 +01:00
David Nadlinger
778f2cf905 compiler: Fix numpy.full, implement for >1D 2020-08-09 23:46:45 +01:00
David Nadlinger
53d64d08a8 compiler: Fix multi-dim slice error message test, tweak wording 2020-08-09 23:14:56 +01:00
David Nadlinger
d35f659d25 compiler: Add additional math fns available from Rust libm 2020-08-09 20:09:43 +01:00
David Nadlinger
a39bd69ca4 compiler: Implement numpy.rint() using llvm.round() 2020-08-09 19:44:58 +01:00
David Nadlinger
ae47d4c0ec test/coredevice: Add host/device consistency checks for NumPy math 2020-08-09 19:15:43 +01:00
David Nadlinger
8e262acd1e compiler: Slight array op implementation cleanup [nfc]
array_unaryop_funcs was never used; since the mangled names
are unique, a single dictionary would be nicer for overrides
anyway.s
2020-08-09 18:58:01 +01:00
David Nadlinger
33d931a5b7 compiler: Implement multi-dimensional indexing of arrays
This generates rather more code than necessary, but has
the advantage of automatically handling incomplete
multi-dimensional subscripts which still leave arrays
behind.
2020-08-09 17:08:43 +01:00
David Nadlinger
b00ba5ece1 compiler: Support explicit array(…, dtype=…) syntax 2020-08-09 17:08:43 +01:00
David Nadlinger
ad34df3de1 compiler: Support numpy.float
This would previously crash the compiler.
2020-08-09 17:08:43 +01:00
David Nadlinger
8783ba2072 compiler/firmware: RPCs for ndarrays 2020-08-09 17:08:43 +01:00
David Nadlinger
5472e830f6 compiler: Assume array()s are always rectangular 2020-08-09 03:54:42 +01:00
David Nadlinger
8eddb9194a test/lit: Add smoke test for math function broadcasting 2020-08-09 03:54:42 +01:00
David Nadlinger
1c645d8857 compiler: Unbreak quoting of 1D ndarrays
Lists and arrays no longer have the same representation all
the way through codegen, as used to be the case.

This could/should be made more efficient later, eliding the
temporary copies.
2020-08-09 03:54:42 +01:00
David Nadlinger
df8f1c5c5a compiler: Annotate math functions nounwind/nowrite 2020-08-09 03:54:42 +01:00
David Nadlinger
cc00ae9580 compiler: Implement broadcasting of math functions 2020-08-09 03:54:42 +01:00
David Nadlinger
be7d78253f compiler: Implement 1D-/2D- array transpose
Left generic transpose (shape order inversion) for now, as that
would be less ugly if we implement forwarding to Python function
bodies for array function implementations.

Needs a runtime test case.
2020-08-09 03:54:42 +01:00
David Nadlinger
faea886c44 compiler: Implement array vs. scalar broadcasting 2020-08-09 03:54:42 +01:00
David Nadlinger
56a872ccc0 compiler: Insert array binop shape check in caller for location information 2020-08-09 03:54:42 +01:00
David Nadlinger
ef260adca8 compiler: Implement matrix multiplication
LLVM will take care of optimising the loops. This was still
unnecessarily painful; implementing generics and implementing
this in ARTIQ Python looks very attractive right now.
2020-08-09 03:54:42 +01:00
David Nadlinger
0da4a61d99 compiler: Fix method name typo [nfc] 2020-08-09 03:54:42 +01:00
David Nadlinger
78afa2ea8e compiler: Support MatMult in inferencer
Still needs actual codegen support.
2020-08-09 03:54:42 +01:00
David Nadlinger
4d48470320 compiler: Support common numpy.* math functions
Relies on the runtime to provide the necessary
(libm-compatible) functions.

The test is nifty, but a bit brittle; if this breaks in the
future because of optimizer changes, do not hesitate to convert
this into a more pedestrian test case.
2020-08-09 03:54:41 +01:00
David Nadlinger
d37503f21d compiler: T{C -> External}Function, clarify docs [nfc] 2020-08-09 03:54:41 +01:00
David Nadlinger
da255bee1b compiler: Implement element type coercion for arrays
So far, this is not exposed to the user beyond implicit conversions.

Note that all the implicit conversions, such as triggered by adding
arrays of mismatching types, or dividing integer arrays, are currently
emitted in a maximally inefficient way, where a temporary copy is first
made for the type conversion. The conversions would more sensibly be
implemented during the per-element operations to save on the extra
copies, but the current behaviour fell out of the rest of the IR
generator structure without extra changes.
2020-08-09 03:54:41 +01:00
David Nadlinger
4426e4144f compiler: Implement unary plus/minus for arrays
Implementation is needlessly generic to anticipate
coercion/transcendental functions.
2020-08-09 03:54:41 +01:00
David Nadlinger
0d8fbd4f19 test/lit: Add a test for matrix binary operations
No reason to believe other operations won't work the same.
(More exhaustive tests to follow using embedding for comparison
against NumPy.)
2020-08-09 03:54:41 +01:00
David Nadlinger
7bdd6785b7 test/lit: Basic ndarray smoke tests for all binops 2020-08-09 03:54:41 +01:00
David Nadlinger
4d002c7934 compiler: Explain use of rpc_tag() in array ops, formatting [nfc] 2020-08-09 03:54:41 +01:00
David Nadlinger
a7e855b319 compiler.types: Change invalid default value [nfc]
This wasn't actually ever used, but was a dict instead of a set.
2020-08-09 03:54:41 +01:00
David Nadlinger
48fb80017f compiler: Implement basic element-wise array operations 2020-08-09 03:54:41 +01:00
David Nadlinger
9af6e5747d compiler: Factor rpc_tag() out of llvm_ir_generator 2020-08-09 03:54:41 +01:00
David Nadlinger
e77c7d1c39 compiler: Add inferencer support for array operations 2020-08-09 03:54:41 +01:00
David Nadlinger
ef57cad1a3 compiler: Test ndarray element assignment 2020-08-09 03:54:41 +01:00
David Nadlinger
a9a975e5d4 language: Allow instantating TArray using bare ints 2020-08-09 03:54:41 +01:00
David Nadlinger
504b8f0148 language: Export TArray 2020-08-09 03:54:41 +01:00