forked from M-Labs/artiq
ld.lld: translate TARGET2 reloc to relative
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@ -74,6 +74,8 @@ class Target:
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LLVM target data layout, e.g. ``"E-m:e-p:32:32-i64:32-f64:32-v64:32-v128:32-a:0:32-n32"``
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:var features: (list of string)
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LLVM target CPU features, e.g. ``["mul", "div", "ffl1"]``
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:var additional_linker_options: (list of string)
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Linker options for the target in addition to the target-independent ones, e.g. ``["--target2=rel"]``
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:var print_function: (string)
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Name of a formatted print functions (with the signature of ``printf``)
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provided by the target, e.g. ``"printf"``.
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@ -83,6 +85,7 @@ class Target:
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triple = "unknown"
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data_layout = ""
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features = []
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additional_linker_options = []
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print_function = "printf"
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now_pinning = True
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@ -181,6 +184,7 @@ class Target:
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def link(self, objects):
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"""Link the relocatable objects into a shared library for this target."""
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with RunTool([self.tool_ld, "-shared", "--eh-frame-hdr"] +
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self.additional_linker_options +
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["-T" + os.path.join(os.path.dirname(__file__), "kernel.ld")] +
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["{{obj{}}}".format(index) for index in range(len(objects))] +
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["-x"] +
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@ -265,6 +269,7 @@ class RV32IMATarget(Target):
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triple = "riscv32-unknown-linux"
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data_layout = "e-m:e-p:32:32-i64:64-n32-S128"
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features = ["m", "a"]
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additional_linker_options = []
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print_function = "core_log"
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now_pinning = True
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@ -277,6 +282,7 @@ class RV32GTarget(Target):
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triple = "riscv32-unknown-linux"
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data_layout = "e-m:e-p:32:32-i64:64-n32-S128"
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features = ["m", "a", "f", "d"]
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additional_linker_options = []
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print_function = "core_log"
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now_pinning = True
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@ -289,6 +295,7 @@ class CortexA9Target(Target):
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triple = "armv7-unknown-linux-gnueabihf"
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data_layout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
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features = ["dsp", "fp16", "neon", "vfp3"]
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additional_linker_options = ["--target2=rel"]
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print_function = "core_log"
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now_pinning = False
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