forked from M-Labs/artiq
ksupport: handle riscv exceptions
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@ -19,4 +19,4 @@ io = { path = "../libio", features = ["byteorder"] }
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dyld = { path = "../libdyld" }
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board_misoc = { path = "../libboard_misoc" }
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board_artiq = { path = "../libboard_artiq" }
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proto_artiq = { path = "../libproto_artiq" }
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riscv = { version = "0.6.0", features = ["inline-asm"] }
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@ -12,8 +12,9 @@ extern crate dyld;
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extern crate board_misoc;
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extern crate board_artiq;
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extern crate proto_artiq;
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extern crate riscv;
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use core::{mem, ptr, slice, str};
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use core::{mem, ptr, slice, str, convert::TryFrom};
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use cslice::{CSlice, AsCSlice};
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use io::Cursor;
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use dyld::Library;
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@ -22,6 +23,7 @@ use proto_artiq::{kernel_proto, rpc_proto};
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use kernel_proto::*;
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#[cfg(has_rtio_dma)]
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use board_misoc::csr;
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use riscv::register::{mcause, mepc};
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fn send(request: &Message) {
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unsafe { mailbox::send(request as *const _ as usize) }
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@ -519,8 +521,10 @@ pub unsafe fn main() {
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#[no_mangle]
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#[unwind(allowed)]
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pub extern fn exception(vect: u32, _regs: *const u32, pc: u32, ea: u32) {
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panic!("exception {:?} at PC 0x{:x}, EA 0x{:x}", vect, pc, ea)
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pub extern fn exception(_regs: *const u32) {
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let pc = mepc::read();
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let cause = mcause::read().cause();
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panic!("{:?} at PC {:#08x}", cause, u32::try_from(pc).unwrap())
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}
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#[no_mangle]
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