forked from M-Labs/artiq
compiler: modified exception representation
Exception name is replaced by exception ID, which requires no allocation. Other strings in the exception can now be 'host-only' strings, which is represented by a CSlice with len = usize::MAX and ptr = key, to avoid the need for allocation when raising exceptions through RPC.
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715bff3ebf
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4644e105b1
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@ -123,18 +123,23 @@ class TException(types.TMono):
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# * File, line and column where it was raised (str, int, int).
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# * Message, which can contain substitutions {0}, {1} and {2} (str).
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# * Three 64-bit integers, parameterizing the message (numpy.int64).
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# These attributes are prefixed with `#` so that users cannot access them,
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# and we don't have to do string allocation in the runtime.
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# #__name__ is now a string key in the host. TStr may not be an actual
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# CSlice in the runtime, they might be a CSlice with length = i32::MAX and
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# ptr = string key in the host.
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# Keep this in sync with the function ARTIQIRGenerator.alloc_exn.
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attributes = OrderedDict([
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("__name__", TStr()),
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("__file__", TStr()),
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("__line__", TInt32()),
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("__col__", TInt32()),
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("__func__", TStr()),
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("__message__", TStr()),
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("__param0__", TInt64()),
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("__param1__", TInt64()),
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("__param2__", TInt64()),
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("#__name__", TInt32()),
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("#__file__", TStr()),
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("#__line__", TInt32()),
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("#__col__", TInt32()),
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("#__func__", TStr()),
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("#__message__", TStr()),
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("#__param0__", TInt64()),
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("#__param1__", TInt64()),
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("#__param2__", TInt64()),
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])
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def __init__(self, name="Exception", id=0):
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@ -47,6 +47,24 @@ class EmbeddingMap:
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self.module_map = {}
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self.type_map = {}
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self.function_map = {}
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self.str_forward_map = {}
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self.str_reverse_map = {}
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def preallocate_runtime_exception_names(self, names):
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for i, name in enumerate(names):
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exn_id = self.store_str("0:artiq.coredevice.exceptions." + name)
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assert exn_id == i
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def store_str(self, s):
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if s in self.str_forward_map:
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return self.str_forward_map[s]
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str_id = len(self.str_forward_map)
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self.str_forward_map[s] = str_id
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self.str_reverse_map[str_id] = s
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return str_id
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def retrieve_str(self, str_id):
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return self.str_reverse_map[str_id]
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# Modules
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def store_module(self, module, module_type):
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@ -736,6 +754,12 @@ class Stitcher:
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self.functions = {}
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self.embedding_map = EmbeddingMap()
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self.embedding_map.preallocate_runtime_exception_names(["runtimeerror",
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"RTIOUnderflow",
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"RTIOOverflow",
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"RTIODestinationUnreachable",
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"DMAError",
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"I2CError"])
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self.value_map = defaultdict(lambda: [])
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self.definitely_changed = False
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@ -57,7 +57,8 @@ class Module:
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constness_validator = validators.ConstnessValidator(engine=self.engine)
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artiq_ir_generator = transforms.ARTIQIRGenerator(engine=self.engine,
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module_name=src.name,
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ref_period=ref_period)
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ref_period=ref_period,
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embedding_map=self.embedding_map)
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dead_code_eliminator = transforms.DeadCodeEliminator(engine=self.engine)
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local_access_validator = validators.LocalAccessValidator(engine=self.engine)
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local_demoter = transforms.LocalDemoter()
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@ -88,8 +88,9 @@ class ARTIQIRGenerator(algorithm.Visitor):
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_size_type = builtins.TInt32()
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def __init__(self, module_name, engine, ref_period):
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def __init__(self, module_name, engine, ref_period, embedding_map):
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self.engine = engine
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self.embedding_map = embedding_map
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self.functions = []
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self.name = [module_name] if module_name != "" else []
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self.ref_period = ir.Constant(ref_period, builtins.TFloat())
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@ -638,10 +639,10 @@ class ARTIQIRGenerator(algorithm.Visitor):
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loc_column = ir.Constant(loc.column(), builtins.TInt32())
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loc_function = ir.Constant(".".join(self.name), builtins.TStr())
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self.append(ir.SetAttr(exn, "__file__", loc_file))
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self.append(ir.SetAttr(exn, "__line__", loc_line))
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self.append(ir.SetAttr(exn, "__col__", loc_column))
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self.append(ir.SetAttr(exn, "__func__", loc_function))
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self.append(ir.SetAttr(exn, "#__file__", loc_file))
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self.append(ir.SetAttr(exn, "#__line__", loc_line))
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self.append(ir.SetAttr(exn, "#__col__", loc_column))
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self.append(ir.SetAttr(exn, "#__func__", loc_function))
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if self.unwind_target is not None:
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self.append(ir.Raise(exn, self.unwind_target))
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@ -2105,8 +2106,9 @@ class ARTIQIRGenerator(algorithm.Visitor):
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def alloc_exn(self, typ, message=None, param0=None, param1=None, param2=None):
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typ = typ.find()
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name = "{}:{}".format(typ.id, typ.name)
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name_id = self.embedding_map.store_str(name)
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attributes = [
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ir.Constant(name, builtins.TStr()), # typeinfo
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ir.Constant(name_id, builtins.TInt32()), # typeinfo
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ir.Constant("<not thrown>", builtins.TStr()), # file
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ir.Constant(0, builtins.TInt32()), # line
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ir.Constant(0, builtins.TInt32()), # column
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@ -2578,10 +2580,10 @@ class ARTIQIRGenerator(algorithm.Visitor):
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old_unwind, self.unwind_target = self.unwind_target, None
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exn = self.alloc_exn(builtins.TException("AssertionError"), message=msg)
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self.append(ir.SetAttr(exn, "__file__", file))
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self.append(ir.SetAttr(exn, "__line__", line))
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self.append(ir.SetAttr(exn, "__col__", col))
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self.append(ir.SetAttr(exn, "__func__", function))
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self.append(ir.SetAttr(exn, "#__file__", file))
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self.append(ir.SetAttr(exn, "#__line__", line))
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self.append(ir.SetAttr(exn, "#__col__", col))
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self.append(ir.SetAttr(exn, "#__func__", function))
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self.append(ir.Raise(exn))
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finally:
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self.current_function = old_func
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@ -2717,11 +2719,11 @@ class ARTIQIRGenerator(algorithm.Visitor):
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format_string += ")"
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elif builtins.is_exception(value.type):
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name = self.append(ir.GetAttr(value, "__name__"))
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message = self.append(ir.GetAttr(value, "__message__"))
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param1 = self.append(ir.GetAttr(value, "__param0__"))
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param2 = self.append(ir.GetAttr(value, "__param1__"))
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param3 = self.append(ir.GetAttr(value, "__param2__"))
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name = self.append(ir.GetAttr(value, "#__name__"))
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message = self.append(ir.GetAttr(value, "#__message__"))
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param1 = self.append(ir.GetAttr(value, "#__param0__"))
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param2 = self.append(ir.GetAttr(value, "#__param1__"))
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param3 = self.append(ir.GetAttr(value, "#__param2__"))
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format_string += "%.*s(%.*s, %lld, %lld, %lld)"
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args += [name, message, param1, param2, param3]
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@ -571,29 +571,33 @@ class CommKernel:
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self._write_header(Request.RPCException)
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# Note: instead of sending strings, we send object ID
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# This is to avoid the need of allocatio on the device side
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# This is a special case: this only applies to exceptions
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if hasattr(exn, "artiq_core_exception"):
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exn = exn.artiq_core_exception
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self._write_string(exn.name)
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self._write_string(self._truncate_message(exn.message))
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self._write_int32(embedding_map.store_str(exn.name))
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self._write_int32(embedding_map.store_str(self._truncate_message(exn.message)))
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for index in range(3):
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self._write_int64(exn.param[index])
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filename, line, column, function = exn.traceback[-1]
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self._write_string(filename)
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self._write_int32(embedding_map.store_str(filename))
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self._write_int32(line)
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self._write_int32(column)
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self._write_string(function)
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self._write_int32(embedding_map.store_str(function))
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else:
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exn_type = type(exn)
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if exn_type in (ZeroDivisionError, ValueError, IndexError, RuntimeError) or \
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hasattr(exn, "artiq_builtin"):
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self._write_string("0:{}".format(exn_type.__name__))
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name = "0:{}".format(exn_type.__name__)
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else:
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exn_id = embedding_map.store_object(exn_type)
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self._write_string("{}:{}.{}".format(exn_id,
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exn_type.__module__,
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exn_type.__qualname__))
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self._write_string(self._truncate_message(str(exn)))
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name = "{}:{}.{}".format(exn_id,
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exn_type.__module__,
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exn_type.__qualname__)
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self._write_int32(embedding_map.store_str(name))
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self._write_int32(embedding_map.store_str(self._truncate_message(str(exn))))
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for index in range(3):
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self._write_int64(0)
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@ -604,10 +608,10 @@ class CommKernel:
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((filename, line, function, _), ) = tb
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else:
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assert False
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self._write_string(filename)
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self._write_int32(embedding_map.store_str(filename))
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self._write_int32(line)
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self._write_int32(-1) # column not known
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self._write_string(function)
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self._write_int32(embedding_map.store_str(function))
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self._flush()
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else:
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logger.debug("rpc service: %d %r %r = %r",
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