forked from M-Labs/artiq
phaser: fix oscillator rtio address for even base addresses
close #1580
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@ -928,7 +928,7 @@ class PhaserOscillator:
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:param clr: Clear the phase accumulator (persistent)
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"""
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data = (asf & 0x7fff) | ((clr & 1) << 15) | (pow << 16)
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rtio_output(self.base_addr | (1 << 8), data)
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rtio_output(self.base_addr + (1 << 8), data)
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@kernel
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def set_amplitude_phase(self, amplitude, phase=0., clr=0):
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