forked from M-Labs/artiq
wrpll: add more diagnostics in firmware and adapt to recent gateware changes
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@ -266,6 +266,9 @@ mod si549 {
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Ok(())
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}
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// Si549 digital frequency trim ("all-digital PLL" register)
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// ∆ f_out = adpll * 0.0001164e-6 (0.1164 ppb/lsb)
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// max trim range is +- 950 ppm
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pub fn set_adpll(dcxo: i2c::Dcxo, adpll: i32) -> Result<(), &'static str> {
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write(dcxo, 231, adpll as u8)?;
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write(dcxo, 232, (adpll >> 8) as u8)?;
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@ -282,6 +285,20 @@ mod si549 {
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}
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}
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// to do: load from gateware config
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const DDMTD_COUNTER_N: u32 = 15;
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const DDMTD_COUNTER_M: u32 = (1 << DDMTD_COUNTER_N);
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const F_SYS: f64 = csr::CONFIG_CLOCK_FREQUENCY as f64;
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const F_MAIN: f64 = 125.0e6;
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const F_HELPER: f64 = F_MAIN * DDMTD_COUNTER_M as f64 / (DDMTD_COUNTER_M + 1) as f64;
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const F_BEAT: f64 = F_MAIN - F_HELPER;
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const TIME_STEP: f32 = 1./F_BEAT as f32;
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fn ddmtd_tag_to_s(mu: f32) -> f32 {
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return (mu as f32)*TIME_STEP;
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}
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fn get_frequencies() -> (u32, u32, u32) {
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unsafe {
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csr::wrpll::frequency_counter_update_en_write(1);
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@ -304,24 +321,58 @@ fn log_frequencies() -> (u32, u32, u32) {
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(f_helper, f_main, f_cdr)
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}
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fn get_ddmtd_main_tag() -> u16 {
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fn get_tags() -> (i32, i32, u16, u16) {
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unsafe {
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csr::wrpll::ddmtd_main_arm_write(1);
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while csr::wrpll::ddmtd_main_arm_read() != 0 {}
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csr::wrpll::ddmtd_main_tag_read()
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csr::wrpll::tag_arm_write(1);
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while csr::wrpll::tag_arm_read() != 0 {}
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let main_diff = csr::wrpll::main_diff_tag_read() as i32;
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let helper_diff = csr::wrpll::helper_diff_tag_read() as i32;
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let ref_tag = csr::wrpll::ref_tag_read();
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let main_tag = csr::wrpll::main_tag_read();
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(main_diff, helper_diff, ref_tag, main_tag)
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}
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}
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fn get_ddmtd_helper_tag() -> u16 {
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unsafe {
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csr::wrpll::ddmtd_helper_arm_write(1);
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while csr::wrpll::ddmtd_helper_arm_read() != 0 {}
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csr::wrpll::ddmtd_helper_tag_read()
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fn print_tags() {
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const NUM_TAGS: usize = 30;
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let mut main_diffs = [0; NUM_TAGS]; // input to main loop filter
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let mut helper_diffs = [0; NUM_TAGS]; // input to helper loop filter
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let mut ref_tags = [0; NUM_TAGS];
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let mut main_tags = [0; NUM_TAGS];
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let mut jitter = [0 as f32; NUM_TAGS];
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for i in 0..NUM_TAGS {
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let (main_diff, helper_diff, ref_tag, main_tag) = get_tags();
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main_diffs[i] = main_diff;
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helper_diffs[i] = helper_diff;
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ref_tags[i] = ref_tag;
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main_tags[i] = main_tag;
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}
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info!("DDMTD ref tags: {:?}", ref_tags);
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info!("DDMTD main tags: {:?}", main_tags);
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info!("DDMTD main diffs: {:?}", main_diffs);
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info!("DDMTD helper diffs: {:?}", helper_diffs);
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// look at the difference between the main DCXO and reference...
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let t0 = main_diffs[0];
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main_diffs.iter_mut().for_each(|x| *x -= t0);
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// crude estimate of the max difference across our sample set (assumes no unwrapping issues...)
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let delta = main_diffs[main_diffs.len()-1] as f32 / (main_diffs.len()-1) as f32;
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info!("detla: {:?} tags", delta);
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let delta_f: f32 = delta/DDMTD_COUNTER_M as f32 * F_BEAT as f32;
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info!("MAIN <-> ref frequency difference: {:?} Hz ({:?} ppm)", delta_f, delta_f/F_HELPER as f32 * 1e6);
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jitter.iter_mut().enumerate().for_each(|(i, x)| *x = main_diffs[i] as f32 - delta*(i as f32));
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info!("jitter: {:?} tags", jitter);
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let var = jitter.iter().map(|x| x*x).fold(0 as f32, |acc, x| acc + x as f32) / NUM_TAGS as f32;
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info!("variance: {:?} tags^2", var);
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}
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pub fn init() {
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info!("initializing...");
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info!("initializing WR PLL...");
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unsafe { csr::wrpll::helper_reset_write(1); }
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@ -348,43 +399,29 @@ pub fn init() {
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}
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pub fn diagnostics() {
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info!("WRPLL diagnostics...");
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info!("Untrimmed oscillator frequencies:");
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log_frequencies();
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info!("ADPLL test:");
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// +/-10ppm
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si549::set_adpll(i2c::Dcxo::Helper, -85911).expect("ADPLL write failed");
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si549::set_adpll(i2c::Dcxo::Main, 85911).expect("ADPLL write failed");
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info!("Increase helper DCXO frequency by +10ppm (1.25kHz):");
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si549::set_adpll(i2c::Dcxo::Helper, 85911).expect("ADPLL write failed");
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// to do: add check on frequency?
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log_frequencies();
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si549::set_adpll(i2c::Dcxo::Helper, 0).expect("ADPLL write failed");
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si549::set_adpll(i2c::Dcxo::Main, 0).expect("ADPLL write failed");
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let mut tags = [0; 10];
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for i in 0..tags.len() {
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tags[i] = get_ddmtd_main_tag();
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}
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info!("DDMTD main tags: {:?}", tags);
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}
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fn trim_dcxos(f_helper: u32, f_main: u32, f_cdr: u32) -> Result<(i32, i32), &'static str> {
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info!("Trimming oscillator frequencies...");
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const DCXO_STEP: i64 = (1.0e6/0.0001164) as i64;
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const ADPLL_MAX: i64 = (950.0/0.0001164) as i64;
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const TIMER_WIDTH: u32 = 23;
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const COUNTER_DIV: u32 = 2;
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const F_SYS: f64 = csr::CONFIG_CLOCK_FREQUENCY as f64;
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#[cfg(rtio_frequency = "125.0")]
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const F_MAIN: f64 = 125.0e6;
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const F_HELPER: f64 = F_MAIN * ((1 << 15) as f64)/((1<<15) as f64 + 1.0);
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// how many counts we expect to measure
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const SYS_COUNTS: i64 = (1 << (TIMER_WIDTH - COUNTER_DIV)) as i64;
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const EXP_MAIN_COUNTS: i64 = ((SYS_COUNTS as f64) * (F_MAIN/F_SYS)) as i64;
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const EXP_HELPER_COUNTS: i64 = ((SYS_COUNTS as f64) * (F_HELPER/F_SYS)) as i64;
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info!("after {} sys counts", SYS_COUNTS);
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info!("expect {} main/CDR counts", EXP_MAIN_COUNTS);
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info!("expect {} helper counts", EXP_HELPER_COUNTS);
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// calibrate the SYS clock to the CDR clock and correct the measured counts
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// assume frequency errors are small so we can make an additive correction
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// positive error means sys clock is too fast
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@ -412,13 +449,35 @@ fn trim_dcxos(f_helper: u32, f_main: u32, f_cdr: u32) -> Result<(i32, i32), &'st
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Ok((helper_adpll as i32, main_adpll as i32))
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}
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fn statistics(data: &[u16]) -> (f32, f32) {
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let sum = data.iter().fold(0 as u32, |acc, x| acc + *x as u32);
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let mean = sum as f32 / data.len() as f32;
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let squared_sum = data.iter().fold(0 as u32, |acc, x| acc + (*x as u32).pow(2));
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let variance = (squared_sum as f32 / data.len() as f32) - mean;
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return (mean, variance)
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}
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fn select_recovered_clock_int(rc: bool) -> Result<(), &'static str> {
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info!("Untrimmed oscillator frequencies:");
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let (f_helper, f_main, f_cdr) = log_frequencies();
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if rc {
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let (helper_adpll, main_adpll) = trim_dcxos(f_helper, f_main, f_cdr)?;
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// to do: add assertion on max frequency shift here?
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si549::set_adpll(i2c::Dcxo::Helper, helper_adpll).expect("ADPLL write failed");
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si549::set_adpll(i2c::Dcxo::Main, main_adpll).expect("ADPLL write failed");
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log_frequencies();
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clock::spin_us(100_000); // TO DO: remove/reduce!
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print_tags();
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info!("increasing main DCXO by 1ppm (125Hz):");
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si549::set_adpll(i2c::Dcxo::Main, main_adpll + 8591).expect("ADPLL write failed");
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clock::spin_us(100_000);
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print_tags();
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si549::set_adpll(i2c::Dcxo::Main, main_adpll).expect("ADPLL write failed");
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unsafe {
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csr::wrpll::adpll_offset_helper_write(helper_adpll as u32);
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csr::wrpll::adpll_offset_main_write(main_adpll as u32);
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@ -431,11 +490,12 @@ fn select_recovered_clock_int(rc: bool) -> Result<(), &'static str> {
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clock::spin_us(100_000);
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let mut tags = [0; 10];
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for i in 0..tags.len() {
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tags[i] = get_ddmtd_helper_tag();
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}
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info!("DDMTD helper tags: {:?}", tags);
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print_tags();
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// let mut tags = [0; 10];
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// for i in 0..tags.len() {
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// tags[i] = get_ddmtd_helper_tag();
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// }
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// info!("DDMTD helper tags: {:?}", tags);
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unsafe {
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csr::wrpll::filter_reset_write(1);
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