forked from M-Labs/artiq
phaser: debug init, systematic bring-up
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2fba3cfc78
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@ -153,13 +153,12 @@ class Phaser:
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for ch, trf in enumerate([trf0, trf1])]
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@kernel
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def init(self):
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def init(self, debug=False):
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"""Initialize the board.
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Verifies board and chip presence, resets components, performs
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communication and configuration tests and establishes initial
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conditions.
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"""
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board_id = self.read8(PHASER_ADDR_BOARD_ID)
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if board_id != PHASER_BOARD_ID:
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@ -179,12 +178,15 @@ class Phaser:
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delay(.1*ms) # slack
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# reset
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self.set_cfg(dac_resetb=0, dac_sleep=1, att0_rstn=0, att1_rstn=0,
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dac_txena=0)
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self.set_cfg(dac_resetb=0, dac_sleep=1, dac_txena=0,
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trf0_ps=1, trf1_ps=1,
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att0_rstn=0, att1_rstn=0)
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self.set_leds(0x00)
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self.set_fan_mu(0)
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# bring everything out of reset, keep tx off
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self.set_cfg(clk_sel=self.clk_sel, dac_txena=0)
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# bring dac out of reset, keep tx off
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self.set_cfg(clk_sel=self.clk_sel, dac_txena=0,
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trf0_ps=1, trf1_ps=1,
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att0_rstn=0, att1_rstn=0)
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delay(.1*ms) # slack
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# TODO: crossing dac_clk (125 MHz) edges with sync_dly (0-7 ns)
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@ -235,7 +237,17 @@ class Phaser:
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# delay(.1*ms)
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self.clear_dac_alarms()
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delay(2*ms) # let it run a bit
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self.check_dac_alarms()
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alarms = self.get_dac_alarms()
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delay(.1*ms) # slack
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if alarms & ~0x0040: # ignore PLL alarms (see DS)
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if debug:
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print(alarms)
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self.core.break_realtime()
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else:
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raise ValueError("DAC alarm")
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# power up trfs, release att reset
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self.set_cfg(clk_sel=self.clk_sel, dac_txena=0)
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for ch in range(2):
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channel = self.channel[ch]
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@ -244,7 +256,7 @@ class Phaser:
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if channel.get_att_mu() != 0x5a:
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raise ValueError("attenuator test failed")
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delay(.1*ms)
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channel.set_att(31.5*dB)
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channel.set_att_mu(0x00) # minimum attenuation
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# test oscillators and DUC
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for i in range(len(channel.oscillator)):
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@ -289,7 +301,8 @@ class Phaser:
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raise ValueError("TRF R_SAT_ERR")
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delay(.1*ms)
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self.set_cfg(clk_sel=self.clk_sel) # txena
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# enable dac tx
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self.set_cfg(clk_sel=self.clk_sel)
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@kernel
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def write8(self, addr, data):
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@ -518,13 +531,6 @@ class Phaser:
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"""
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return self.dac_read(0x05)
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@kernel
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def check_dac_alarms(self):
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alarm = self.get_dac_alarms()
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delay(.1*ms) # slack
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if alarm & ~0x0040: # ignore PLL alarms (see DS)
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raise ValueError("DAC alarm")
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@kernel
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def clear_dac_alarms(self):
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"""Clear DAC alarm flags."""
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@ -561,9 +567,9 @@ class Phaser:
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# no need to go through the alarm register,
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# just read the error mask
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# self.clear_dac_alarms()
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alarm = self.get_dac_alarms()
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alarms = self.get_dac_alarms()
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delay(.1*ms) # slack
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if alarm & 0x0080: # alarm_from_iotest
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if alarms & 0x0080: # alarm_from_iotest
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errors = self.dac_read(0x04)
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delay(.1*ms) # slack
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else:
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