forked from M-Labs/artiq
ad99xx added additional kernel invariants
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
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4a6201c083
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@ -137,8 +137,10 @@ class AD9910:
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def __init__(self, dmgr, chip_select, cpld_device, sw_device=None,
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pll_n=40, pll_cp=7, pll_vco=5, sync_delay_seed=-1,
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io_update_delay=0, pll_en=1):
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self.kernel_invariants = {"chip_select", "cpld", "core", "bus",
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"ftw_per_hz", "sysclk_per_mu"}
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self.kernel_invariants = {"cpld", "core", "bus", "chip_select",
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"pll_en", "pll_n", "pll_vco", "pll_cp",
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"ftw_per_hz", "sysclk_per_mu", "sysclk",
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"sync_data"}
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self.cpld = dmgr.get(cpld_device)
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self.core = self.cpld.core
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self.bus = self.cpld.bus
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@ -29,8 +29,8 @@ class AD9912:
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def __init__(self, dmgr, chip_select, cpld_device, sw_device=None,
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pll_n=10):
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self.kernel_invariants = {"chip_select", "cpld", "core", "bus",
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"ftw_per_hz"}
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self.kernel_invariants = {"cpld", "core", "bus", "chip_select",
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"pll_n", "ftw_per_hz"}
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self.cpld = dmgr.get(cpld_device)
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self.core = self.cpld.core
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self.bus = self.cpld.bus
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