occheung

nac3

Rust 0 0

New ARTIQ compiler, third iteration

Updated 2026-02-10 18:07:30 +08:00

artiq

Python 0 0

Updated 2026-01-27 13:02:32 +08:00

artiq-zynq

Rust 0 0

ARTIQ Zynq-based core device support

Updated 2026-01-23 09:51:10 +08:00

assembly

Python 0 0

Repository with instructions and remarks on assembling and testing Sinara hardware. Doesn't pretend to be source of ultimate truth, and can change at any time.

Updated 2026-01-19 13:34:00 +08:00

mirny-pld

Python 0 0

CPLD gateware for the Sinara Mirny module.

Updated 2026-01-09 13:38:52 +08:00

kasli-i2c

Python 0 0

Utilities to access the Sinara I2C tree via Kasli, including Sinara EEPROM deployment, firmware flashing for Fastino, Banker

Updated 2025-12-03 13:00:14 +08:00

urukul-pld

Python 0 0

CPLD/FPGA gateware on Urukul. Forked from https://github.com/quartiq/urukul

Updated 2025-10-14 16:59:21 +08:00

ENC424J600

Rust 0 0

smoltcp driver for the ENC424J600 SPI Ethernet controller

Updated 2025-02-08 12:58:21 +08:00

sinarads

TeX 0 0

Sinara datasheets