occheung
  • Joined on 2020-05-03
CPLD/FPGA gateware on Urukul. Forked from https://github.com/quartiq/urukul
Updated 2025-05-14 18:03:28 +08:00
New ARTIQ compiler, third iteration
Updated 2025-04-17 09:38:16 +08:00
ARTIQ Zynq-based core device support
Updated 2025-04-16 17:12:18 +08:00
Repository with instructions and remarks on assembling and testing Sinara hardware. Doesn't pretend to be source of ultimate truth, and can change at any time.
Updated 2025-02-13 17:21:06 +08:00
smoltcp driver for the ENC424J600 SPI Ethernet controller
Updated 2025-02-08 12:58:21 +08:00
Updated 2025-02-08 12:58:20 +08:00
A Rust library implementing safe, lightweight context switches, without relying on kernel services
Updated 2025-02-08 12:58:20 +08:00
Sinara datasheets
Updated 2025-02-08 12:58:20 +08:00
Bare-metal Rust on Zynq-7000
Updated 2025-02-08 12:58:20 +08:00
Updated 2025-02-08 12:58:20 +08:00
A leading-edge control system for quantum information experiments
Updated 2025-02-08 12:58:20 +08:00