occheung
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  • Joined on 2020-05-03
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urukul-pld
Python 0 0
CPLD/FPGA gateware on Urukul. Forked from https://github.com/quartiq/urukul
Updated 2025-05-14 18:03:28 +08:00
nac3
Rust 0 0
New ARTIQ compiler, third iteration
Updated 2025-04-17 09:38:16 +08:00
artiq-zynq
Rust 0 0
ARTIQ Zynq-based core device support
Updated 2025-04-16 17:12:18 +08:00
assembly
Python 0 0
Repository with instructions and remarks on assembling and testing Sinara hardware. Doesn't pretend to be source of ultimate truth, and can change at any time.
Updated 2025-02-13 17:21:06 +08:00
ENC424J600
Rust 0 0
smoltcp driver for the ENC424J600 SPI Ethernet controller
Updated 2025-02-08 12:58:21 +08:00
web2019
JavaScript 0 0
Updated 2025-02-08 12:58:20 +08:00
libfringe
Rust 0 0
A Rust library implementing safe, lightweight context switches, without relying on kernel services
Updated 2025-02-08 12:58:20 +08:00
sinarads
TeX 0 0
Sinara datasheets
Updated 2025-02-08 12:58:20 +08:00
zynq-rs
Rust 0 0
Bare-metal Rust on Zynq-7000
Updated 2025-02-08 12:58:20 +08:00
serdes-transceiver
Python 0 0
Updated 2025-02-08 12:58:20 +08:00
artiq
Python 0 0
A leading-edge control system for quantum information experiments
Updated 2025-02-08 12:58:20 +08:00