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6770 Commits

Author SHA1 Message Date
occheung
750b0ce46d ddb_temp: select appropriate compiler target 2021-11-08 16:59:08 +08:00
occheung
531670d6c5 dyld: check ABI 2021-11-08 16:59:08 +08:00
occheung
0f660735bf ll_gen: adjust csr address by detecting target class 2021-11-08 16:59:08 +08:00
occheung
0755757601 compiler/tb: use FPU 2021-11-08 16:59:08 +08:00
occheung
0d708cd61a compiler/target: split RISCV target into float/non-float 2021-11-08 16:59:08 +08:00
occheung
03b803e764 firmware: adjust csr separation 2021-11-08 16:59:08 +08:00
occheung
b3e315e24a rust: find json file using CARGO_TRIPLE 2021-11-08 16:59:08 +08:00
occheung
0898e101e2 board_misoc: reuse riscv dir for comm & kernel 2021-11-08 16:59:08 +08:00
occheung
cb247f235f gateware: pass adr_w/data_w to submodules 2021-11-08 16:59:08 +08:00
occheung
90f944481c kernel_cpu: add fpu if not kasli v1.x 2021-11-08 16:59:08 +08:00
occheung
d84ad0095b comm_cpu: select 64b bus if not kasli v1.x 2021-11-08 16:59:08 +08:00
occheung
dd68b4ab82 mailbox: parametrize address width 2021-11-08 16:59:08 +08:00
occheung
c6e0e26440 drtio: accept 32b/64b bus 2021-11-08 16:59:08 +08:00
occheung
8da924ec0f dma: set conversion granularity using bus width 2021-11-08 16:59:08 +08:00
Robert Jördens
591507a7c0
Merge pull request #1774 from m-labs/fastino-cic 
Fastino cic
 2021-10-28 17:44:20 +02:00
Robert Jördens
5a5b0cc7c0 fastino: expand docs 2021-10-28 15:19:48 +00:00
Spaqin
69cddc6b86
rtio_clocking: add warnings for unsupported rtio_clock settings (#1773) 2021-10-28 16:34:22 +08:00
Spaqin
9b1d7e297d
runtime: clock input specification improvements 
closes #1735
 2021-10-28 16:21:51 +08:00
Robert Jördens
1ff474893d Revert "fastino: make driver filter order configurable" 
This reverts commit 10c37b87ec.
 2021-10-28 06:29:56 +00:00
Robert Jördens
10c37b87ec fastino: make driver filter order configurable 2021-10-27 20:24:58 +00:00
Harry Ho
c940f104f1 artiq_flash: fix gateware header not in little-endian for RISC-V 2021-10-25 11:20:26 +08:00
Harry Ho
0aa8a739aa sayma_rtm: fix RTM firmware not in little-endian for RISC-V 2021-10-25 11:20:26 +08:00
occheung
d5fa3d131a cargo.lock: update libc version for libfringe 2021-10-16 17:42:24 +08:00
occheung
6d3164a912 riscv: print mtval on panic 2021-10-16 17:42:24 +08:00
occheung
46326716fd runtime: bump libfringe, impl ecall abi 
See libfringe PR: M-Labs/libfringe#1
 2021-10-16 17:42:24 +08:00
occheung
0a59c889de satman/kern: init locked PMP on startup 2021-10-16 17:42:24 +08:00
occheung
27a7a96626 runtime: setup pmp + transfer to user 2021-10-16 17:42:24 +08:00
occheung
a0bf11b465 riscv: impl pmp 2021-10-16 17:42:24 +08:00
occheung
790a20edf6 linker: generate stack guard + symbol 2021-10-16 17:42:24 +08:00
fanmingyu212
178a86bcda master: add an argument to set an experiment subdirectory 
Signed-off-by: Mingyu Fan <mingyufan@ucsb.edu>
 2021-10-15 16:54:31 +08:00
Sebastien Bourdeauducq
35d21c98d3 Revert "runtime: expose rint from libm" 
Consistency with NAR3/Zynq where rint is not available.

This reverts commit f5100702f6.
 2021-10-11 08:12:04 +08:00
Sebastien Bourdeauducq
f5100702f6 runtime: expose rint from libm 2021-10-10 20:40:17 +08:00
Sebastien Bourdeauducq
3c1cbf47d2 phaser: add more slack during init. Closes #1757 2021-10-10 16:18:55 +08:00
Robert Jördens
3f6bf33298 fastino: add interpolator support 2021-10-08 15:47:07 +00:00
occheung
59065c4663 alloc_list: support alloc w/ large align 
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
 2021-10-07 12:38:03 +08:00
Spaqin
1894f0f626
gateware: share RTIOClockMultiplier and fix_serdes_timing_path (#1760) 2021-10-07 08:19:38 +08:00
Etienne Wodey
a8333053c9 sinara_tester: add device_db and test selection CLI options 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-27 17:44:50 +08:00
Sebastien Bourdeauducq
3ed10221d8 compiler: remove big-endian support. Closes #1590 2021-09-13 13:40:24 +08:00
Sebastien Bourdeauducq
e8a7a8f41e compiler: work around idiotic windoze behavior that causes conda ld.lld not to be found 2021-09-13 10:40:54 +08:00
Sebastien Bourdeauducq
ffb1e3ec2d wavesynth: np.int is deprecated 2021-09-13 07:02:35 +08:00
Sebastien Bourdeauducq
2d79d824f9 firmware: remove minor or1k leftovers 2021-09-12 20:03:37 +08:00
occheung
a573dcf3f9 board_misoc/build: use rv32 as target arg 
The original rv64 argument was only to match the misoc counterpart.
 2021-09-10 14:11:23 +08:00
occheung
448974fe11 runtime/main: cleanup 2021-09-10 13:59:53 +08:00
occheung
b091d8cb66 kernel: flush cache before mod_init 
This could be necessary as redirecting instructions from D$ directly to I$ as it seems.
Related: https://github.com/SpinalHDL/VexRiscv/issues/137
 2021-09-10 13:25:12 +08:00
occheung
5394d04669 test_spi: add delay 2021-09-10 13:25:12 +08:00
occheung
b8ed5a0d91 alloc: fix alignment for riscv32 arch 2021-09-10 13:25:12 +08:00
occheung
2213e7ffac ksupp/rtio/exception: fix timestamp 2021-09-10 13:25:12 +08:00
occheung
09ffd9de1e dma: fix timestamp fetch 2021-09-10 13:25:12 +08:00
occheung
051a14abf2 rtio/dma: fix endianness 2021-09-10 13:25:12 +08:00
occheung
c6ba0f3cf4 ksupport: fix dma cslice (ffi) 2021-09-10 13:25:12 +08:00
occheung
c812a837ab runtime: enlarge stack size 2021-09-10 13:25:12 +08:00
occheung
a596db404d satman: fix cargo xbuild sysroot 2021-09-10 13:25:12 +08:00
occheung
4fab267593 cargo: std dependency hack 2021-09-10 13:25:12 +08:00
occheung
dcbd9f905c cargo: use cargo xbuild 2021-09-10 13:25:12 +08:00
occheung
9f6b3f6014 firmware: clarify target triple 
The lack of compressed instruction support can be inferred from the target triple, literally.
 2021-09-10 13:25:12 +08:00
occheung
4619a33db4 test: remove broken array return tests 
Removed test cases that do not respect lifetime/scope constraint.
See discussion in artiq-zynq repo: M-Labs/artiq-zynq#119
Referred to the patch from @dnadlinger. 5faa30a837
 2021-09-10 13:25:12 +08:00
occheung
5985f7efb5 syscall: lower nowrite to inaccessiblememonly 
In the origin implementation, the `nowrite` flag literally means not writing memory at all.
Due to the usage of flags on certain functions, it results in the same issues found in artiq-zynq after optimization passes. (M-Labs/artiq-zynq#119)
A fix wrote by @dnadlinger can resolve this issue. (c1e46cc7c8)
 2021-09-10 13:25:12 +08:00
Sebastien Bourdeauducq
6db7280b09 flake: board package WIP 2021-09-10 13:25:12 +08:00
occheung
d8ac429059 dyld: streamline lib.rs 
Only riscv32 is supported anyway, no need to have excessive architecture check.
 2021-09-10 13:25:12 +08:00
occheung
798774192d slave_fpga/bootloader: read in little endian 2021-09-10 13:25:12 +08:00
occheung
eecd825d23 firmware: suppress warning 2021-09-10 13:25:12 +08:00
occheung
1da0554a49 pcr: purge 2021-09-10 13:25:12 +08:00
occheung
5d0a8cf9ac llvm_ir_gen: fix indent 2021-09-10 13:25:12 +08:00
occheung
70507e1b72 Cargo.lock: update 2021-09-10 13:25:12 +08:00
occheung
c113cd6bf5 libfringe: bump 2021-09-10 13:25:12 +08:00
occheung
61b0170a12 firmware: purge or1k 2021-09-10 13:25:12 +08:00
occheung
af263ffe1f ksupport: fix rpc, cache signature (FFI) 
The reason of the borrow stuff is explained in M-Labs/artiq-zynq#76 (artiq-zyna repo).
As for `cache_get()`, compiler will perform stack allocation to pre-allocate the returned structure, and pass to cache_get alongside the `key`.
However, ksupport fails to recognize the passed memory, so it will always assume the passed memory as the key.
 2021-09-10 13:25:12 +08:00
occheung
a833974b50 analyzer: fix endianness 2021-09-10 13:25:12 +08:00
occheung
d623acc29d llvm_ir_gen: fix now with now_pinning & little-endian target 2021-09-10 13:25:12 +08:00
occheung
8fa47b8119 rpc: enforce alignment 2021-09-10 13:25:12 +08:00
occheung
de0f2d4a28 firmware: adopt endianness protocol in artiq-zynq 
Related:
artiq-zynq: M-Labs/artiq-zynq#126
artiq: #1588
 2021-09-10 13:25:12 +08:00
occheung
9afe63c08a ksupport: fix proto_artiq dependency 2021-09-10 13:25:12 +08:00
occheung
29a2f106d1 ksupport: replace asm with llvm_asm 2021-09-10 13:25:12 +08:00
occheung
b30ed75e69 kernel.ld: load elf header and prog headers 
ld.lld has a habit of not putting the headers under any load sections.
However, the headers are needed by libunwind to handle exception raised by the kernel.
Creating PT_LOAD section with FILEHDR and PHDRS solves this issue. Other PHDRS are also specified as linkers (not limited to ld.lld) will not create additional unspecified headers even when necessary.
 2021-09-10 13:25:12 +08:00
occheung
279593f984 ksupport.ld: merge sbss with bss 2021-09-10 13:25:12 +08:00
occheung
1ba8c8dfee runtime: remove irq again 2021-09-10 13:25:12 +08:00
occheung
3d629006df makefiles: revert byte-swaps 2021-09-10 13:25:12 +08:00
occheung
7542105f0f board_misoc: remove pcr 
VexRiscv seems to not support additional hardware performance counter, at least I have not seen any documentation on how to use it.
 2021-09-10 13:25:12 +08:00
occheung
01ca114c66 runtime: remove irq dependency 2021-09-10 13:25:12 +08:00
occheung
36171f2c61 runtime: remove inaccurate sp on panic 2021-09-10 13:25:12 +08:00
occheung
01e357e5d3 ksupport.ld: reduce load section alignment 2021-09-10 13:25:12 +08:00
occheung
f77b607b56 compiler: generate symbols 2021-09-10 13:25:12 +08:00
occheung
1293e0750e ld, makefiles: use ld.lld 2021-09-10 13:25:12 +08:00
occheung
fc42d053d9 kernel: use vexriscv 2021-09-10 13:25:12 +08:00
occheung
1b516b16e2 targets: default to vexriscv cpu 2021-09-10 13:25:12 +08:00
Sebastien Bourdeauducq
e8fe8409b2 libartiq_support: compatibility with recent stable rustc 2021-09-10 13:25:12 +08:00
Sebastien Bourdeauducq
cabe5ace8e compiler: remove DebugInfoEmitter for now 
Causes problems with LLVM 9 and not needed at first.
 2021-09-10 13:25:12 +08:00
Sebastien Bourdeauducq
6629a49e86 compiler: use LLVM binutils/linker for Arm as well 
Previously we kept GNU Binutils because they are less of a pain to support
on Windoze - the source of so many problems - but with RISC-V we need to
update LLVM anyway.
 2021-09-10 13:25:12 +08:00
Sebastien Bourdeauducq
43d120359d compiler: switch to upstream llvmlite and RISC-V target 2021-09-10 13:25:12 +08:00
Sebastien Bourdeauducq
5656e52581 remove profiler 2021-09-10 13:25:12 +08:00
occheung
1b8b4baf6a ksupport: fix panic, libc, unwind 2021-09-10 13:25:12 +08:00
occheung
905330b0f1 ksupport: handle riscv exceptions 2021-09-10 13:25:12 +08:00
occheung
50a62b3d42 liballoc: change align to 16 bytes 2021-09-10 13:25:12 +08:00
occheung
7f0bc9f7f0 runtime/makefile: specify emulation, flip endianness 2021-09-10 13:25:12 +08:00
occheung
c42adfe6fd runtime.ld: merge .sbss & .bss 2021-09-10 13:25:12 +08:00
occheung
f56152e72f rust: fix dependencies 2021-09-10 13:25:12 +08:00
occheung
c800b6c8d3 runtime: update rust alloc, managed 2021-09-10 13:25:09 +08:00
occheung
e99061b013 runtime: add riscv 2021-09-10 13:23:22 +08:00
occheung
ecedec577c runtime: impl riscv exception handling 2021-09-10 13:23:15 +08:00
occheung
252594a606 runtime: impl riscv panic handler 2021-09-10 13:20:31 +08:00
occheung
31bf17563c personality: update from rust/panic_unwind 2021-09-10 13:20:31 +08:00
occheung
bfddd8a30f libdyld: add riscv support 2021-09-10 13:20:31 +08:00
occheung
ad3037d0f6 libc: add minimal C types 2021-09-10 13:20:31 +08:00
occheung
daaf6c3401 libunwind: add rust interface 2021-09-10 13:20:31 +08:00
occheung
6d9cebfd42 satman: handle .sbss generation 2021-09-10 13:20:31 +08:00
occheung
96438c9da7 satman: make fbi big-endian 2021-09-10 13:20:31 +08:00
occheung
6535b2f089 satman: fix feature 2021-09-10 13:20:31 +08:00
occheung
45adaa1d98 satman: add riscv exception handling 2021-09-10 13:20:31 +08:00
occheung
869a282410 satman: use riscv 2021-09-10 13:20:31 +08:00
occheung
ebb9f298b5 proto_artiq: update alloc type path 2021-09-10 13:20:31 +08:00
occheung
97a0132f15 libio: update alloc type path 2021-09-10 13:20:31 +08:00
occheung
37ea863004 libio: pin failure version 2021-09-10 13:20:31 +08:00
occheung
3ff74e0693 bootloader: handle .sbss generation in .ld 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
occheung
448fe0e8cf bootloader: fix panic 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
occheung
8294d7fea5 bootloader: swap endianness 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
occheung
13032272fd bootloader: add rv32 exception handler 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
occheung
46102ee737 board_misoc: build vectors.S with rv64 target in misoc 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
occheung
b87ea79d51 rv32: rm irq & vexriscv-rust 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
occheung
9aee42f0f2 rv32/boot: remove hotswap 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
occheung
82b4052cd6 libboard_misoc: vexriscv integration 
Signed-off-by: occheung <dc@m-labs.hk>
 2021-09-10 13:20:31 +08:00
Leon Riesebos
2cf144a60c ddb_template: edge counter keys correspond with according ttl keys 
previously ttl_counter_0 and ttl_0 could be on completely different physical ttl output channels
with this change, ttl_0_counter (note the changed key format) is always on the same channel as ttl_0

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-09-06 09:06:04 +08:00
Etienne Wodey
4d7bd3ee32 phaser: fail init() if frame timestamp measurement times out 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-03 12:01:26 +02:00
Etienne Wodey
075cb26dd7 phaser: rename get_next_frame_timestamp() to get_next_frame_mu() 
and implement review comments (PR #1749)

Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-03 09:58:01 +02:00
Etienne Wodey
7aebf02f84 phaser: docs: add reference to get_next_frame_timestamps(), fix typo 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-01 17:44:46 +02:00
Etienne Wodey
61b44d40dd phaser: add labels to debug init prints 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-01 17:43:30 +02:00
Etienne Wodey
65f8a97b56 phaser: add helpers to align updates to the RTIO timeline 
Signed-off-by: Etienne Wodey <etienne.wodey@aqt.eu>
 2021-09-01 17:42:54 +02:00
SingularitySurfer
65f63e6927 fix suservo start 2021-08-19 07:38:48 +00:00
Robert Jördens
a53162d01d tester: tweak suservo 
* p gain 1 to get reasonable power
* refine testing instructions and comments
 2021-08-19 09:17:14 +02:00
SingularitySurfer
4d21a72407 Implement SUServo tester. 2021-08-18 15:10:27 +00:00
Mikołaj Sowiński
898122f3e5
Added support for HVAMP_8CH (#1741) 2021-08-16 13:39:00 +08:00
Sebastien Bourdeauducq
420891ba54 syntax 2021-08-12 13:01:35 +08:00
Sebastien Bourdeauducq
9f94bc61ae missing part of 477b1516d 2021-08-12 12:55:37 +08:00
Sebastien Bourdeauducq
c69a1316ad compiler: stop using sys.version_info for parser 2021-08-12 12:52:24 +08:00
Sebastien Bourdeauducq
477b1516d3 remove profiler 2021-08-12 12:51:55 +08:00
Sebastien Bourdeauducq
67847f98f4 artiq_run: fix multiarch 2021-08-12 12:48:10 +08:00
mwojcik
7879d3630b made kc705/gtx interface more similar to kasli/gtp 2021-08-10 18:53:52 +08:00
Sebastien Bourdeauducq
242dfae38e kc705: fix DRTIO targets 2021-08-06 15:41:47 +08:00
Star Chen
5111132ef0
ICAP: prevent sayma from using it (#1740) 2021-08-06 15:08:30 +08:00
Sebastien Bourdeauducq
dc546630e4 kc705: DRTIO variants WIP 2021-08-06 14:41:41 +08:00
Robert Jördens
fd824f7ad0 ddb_template: print LED channel nos on Kasli v2 2021-08-05 17:29:38 +02:00
Harry Ho
c9608c0a89 zotino: default div_read unified with ad53xx at 16, fix ad53xx doc 2021-08-05 17:42:11 +08:00
Star Chen
6b88ea563d
talk to ICAP primitive to restart gateware (#1733) 2021-08-05 17:00:31 +08:00
Sebastien Bourdeauducq
97e994700b compiler: turn __repr__ into __str__ when sphinx is used. Closes #741 2021-08-05 11:32:20 +08:00
Sebastien Bourdeauducq
c3d765f745 ad9910: fix type annotations 2021-08-05 11:30:54 +08:00
Sebastien Bourdeauducq
53a98acfe4 artiq_flash: cleanup openocd handling, do not follow symlinks 
Not following symlinks allows files to be added to OpenOCD via nixpkgs buildEnv.
 2021-07-26 17:01:24 +08:00
Star Chen
30e5e06a33
moninj: fix read of incomplete data (#1729) 2021-07-22 17:56:38 +08:00
Star Chen
ebb67eaeee
applets: add length warning message on plot for plot_xy_hist and fix bug (#1725) 2021-07-19 15:45:48 +08:00
Star Chen
943a95e07a
applets: add data length warning message for plot_xy (#1722) 2021-07-19 15:14:15 +08:00
Star Chen
e996b5f635
applets: fix warning timing 2021-07-19 12:26:01 +08:00
Sebastien Bourdeauducq
4fb8ea5b73 artiq_flash: determine which firmware to flash by looking at filesystem 
Closes #1719
 2021-07-14 16:43:00 +08:00
Star Chen
5cd721c514
applets: add plot_hist dataset length mismatch warning (#1718) 2021-07-14 15:57:55 +08:00
Star Chen
6ce9c26402
GUI: add option to create new datasets (#1716) 2021-07-13 12:53:35 +08:00
occheung
2204fd2b22 adf5356: add delay to sync() 
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
 2021-07-08 10:03:20 +08:00
pca006132
b10d1bdd37 compiler: proper union find 
The find implementation was not very optimized, and the unify function
did not consider tree height and may build some tall trees.
 2021-07-07 09:22:16 +08:00
pca006132
4ede58e44b compiler: reduce calls to TypedTreeHasher 
We need to check if our inference reached a fixed point. This is checked
using hash of the types in the AST, which is very slow. This patch
avoids computing the hash if we can make sure that the AST is definitely
changed, which is when we parse a new function.

For some simple programs with many functions, this can significantly
reduce the compile time by up to ~30%.
 2021-07-07 09:22:16 +08:00
pca006132
822e8565f7 compiler: supports kernel decorators with path 2021-07-02 17:01:31 +08:00
pca006132
6fb31a7abb compiler: allow empty list in quote 2021-07-02 15:16:19 +08:00
pca006132
0806b67dbf compiler: speedup list processing 2021-07-02 14:22:25 +08:00
pca006132
f531af510c compiler: fixed embedding annotation evaluation 2021-06-25 11:32:23 +08:00
pca006132
c29a149d16 compiler: allows string annotation 
According to PEP484, type hint can be a string literal for forward
references. With PEP563, type hint would be preserved in annotations in
string form.
 2021-06-25 11:01:48 +08:00
Etienne Wodey
68268e3db8 docs: fix some formatting issues 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-06-23 20:29:43 +08:00
Etienne Wodey
cca654bd47 test_device_db: fix on Windows (tempfile access limitations) 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-06-21 16:47:22 +08:00
Etienne Wodey
8bedf278f0 set_dataset: pass HDF5 options as a dict, not as loose kwargs 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-06-17 16:43:05 +02:00
Etienne Wodey
12ef907f34 master/databases: fix AttributeError in DatasetDB.set() 
Add corresponding unit test.

Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-06-17 16:30:38 +02:00
Etienne Wodey
d8b1e59538 datasets: allow passing options to HDF5 backend (e.g. compression) 
This breaks the internal dataset representation used by applets
and when saving to disk (``dataset_db.pyon``).

See ``test/test_dataset_db.py`` and ``test/test_datasets.py``
for examples.

Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-06-17 12:04:16 +02:00
Etienne Wodey
b8ab5f2607 master/databases: use tools.file_import to load the device_db 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-06-17 07:58:17 +08:00
Etienne Wodey
5c23e6edb6 test: add regression tests for master.databases.DeviceDB 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-06-17 07:58:17 +08:00
Sebastien Bourdeauducq
7046aa9c23 compiler: stop using deprecated numpy.float 2021-06-15 10:48:34 +08:00
Sebastien Bourdeauducq
ea0c7b6173 Merge remote-tracking branch 'harrydrtio/k7-drtio' 2021-06-15 10:04:45 +08:00
Star Chen
9dee8bb9c9
Kasli: Added front panel user LED (#1623) (#1694) 2021-06-07 16:05:50 +08:00
pca006132
bcb030cc9c
aqctl_corelog: fix endianness issue (closes #1682) (#1689) 
Fixed according to
https://forum.m-labs.hk/d/190-fetchingreading-the-core-log-in-a-central-location/10

Tested with both KC705 and ZC706.
 2021-06-03 14:06:17 +08:00
Sebastien Bourdeauducq
ea1dd2da43 artiq_ddb_template: kasli-soc support 2021-05-30 20:33:44 +08:00
Leon Riesebos
07bd1e27c1 artiq_flash: wrap paramiko commands in bash login shell 
the login shell will load the nix environment on non-nixos systems

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-05-27 21:44:10 +08:00
pca006132
4c743cf8af revert busy polling 2021-05-23 14:07:11 +08:00
pca006132
1e9a131386 coredevice.comm_kernel: performance improvement 
reduced latency by busy polling, and improved byte list performance.
 2021-05-23 13:30:00 +08:00
Harry Ho
43b2a3791c jsonschema: only allow enable_sata_drtio=true for Kasli if v1.0/1.1 2021-05-17 12:46:19 +08:00
Sebastien Bourdeauducq
935e18c1be artiq_flash: improve openocd not found error message 2021-05-13 14:45:23 +08:00
Marius Weber
129cf8c1dd Phaser: Make set_nco_phase set the phase of the NCO 
Previous to this commit `set_nco_phase()` set the phase of the DUC instead
of the NCO. Setting the phase of the NCO may be desirable to utilise the
auto-sync functionality of the double-buffered DAC-NCO settings.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-11 23:16:14 +01:00
Marius Weber
043c9c20d7 phaser: Improve documentation of DAC settings 
1. Clarify which features require additional configuration via the `dac`
   constructor argument.
2. Document when DAC settings apply immediatly/are staged.
3. Document how staged DAC settings may be applied
4. Calrify operation of `dac_sync`

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:58:30 +01:00
Marius Weber
f97baa8aec phaser: workaround malformed output with mixer_ena=1 & nco_ena=0 
When Phaser is powered on and `init()` is first called, enabling the
DAC-mixer while leaving the NCO disabled causes malformed output.
This commit implements a workaround by making sure the NCO is enabled,
before being set to the disired state.

This commit also avoids the following procedure, resulting in
malformed output:
1. Operate Phaser with the DAC Mixer and NCO enabled
2. Set the NCO to a non-zero frequency
3. Disable the NCO in the device_db
4. Re-initialise Phaser

After this procedure, with CMIX disabled, incorrect output is produced.
To clear the fault one must re-enable the NCO and write the NCO freqeuncy
to zero before disabling the NCO.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber
4fa2028671 phaser: fix coarse mixer register offset 
The CMIX bits are bits 12-15 in register 0x0d. This has been checked
against the datasheet and verified on hardware. Until now, the bit for
CMIX1 was written to CMIX0. The CMIX0 bit was written to a reserved bit.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber
515cfa7dfb Phaser: expose coarse mixer and document need to enable the DAC-mixer. 
in some use cases a larger tunable range than available via the DUC may
be needed. Some use cases may wish to combine the coarse mixer with the
DUC to extend the tunable range.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber
4f812cc4ed Phaser: zero oscillator amplitude after init() (close #1651) 
Currently, `init()` leaves a single oscillator at full scale. The phase
accumulator of this oscillator is held continuously cleared. Provided no
upconverting mechanism is active (DUC, CMIX, NCO), this produces a full-scale
DC voltage. The DC voltage is blocked by hardware capacitors. This behaviour
is not mentioned by the `init` documentation.

If one attempts to use any other oscillator without reducing the amplitude
of the oscillator enabled by `init`, there is by significant clipping.

In the case that the NCO or CMIX are configured via the device_db
(suggested in the docs), leaving the osillator at full scale results in
full RF output power after calling `init()`. This may plausibly damage loads
driven by phaser.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber
407fba232d Phaser upconverter: set phase-frequency detector to 62.5 MHz (close #1648) 
The suitable PFD clock depends on the use case and will likely need
to be configured by some users. All things being equal, a higher PFD
clock is desirable as is results in lower local oscillator phase-noise.

Phaser was designed around a maximum PFD clock of 62.5 MHz. In integer mode,
with no local oscillator frequency divisor set, a 62.5 MHz PFD clock results
in a 125 MHz local oscillator step size. Given the +-200 MHz range of the DUC
(more if using the DAC mixer), this step size will be acceptable to many.
This seems like the most appropreate default configuration as it should offer
the best phase-noise performance.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber
75445fe5f0 Phaser: expose and automate clearing of DAC sif_sync (close #1630 and #1650) 
`sif_sync` must be triggered to apply NCO frequency changes. To achieve per
channel frequency tunability exeeding the range of the DUC, the NCO frequeny must
adjusted. User code will need to trigger `sif_sync` to achieve this.

`sif_sync` can only be triggered if the bit was cleared. To avoid this pitfall,
the clearing of `sif_sync` is automated.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber
1c96797de5 Phaser upconverter: Follow datasheet procedure for VCO calibration (close #1643) 
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber
7404152e4c Phaser upconverter: rename ndiv -> nint to match datasheet (close #1638) 
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:47 +01:00
Marius Weber
eb477ee06b phaser: print gw_rev in debug mode 2021-05-08 14:48:46 +01:00
Marius Weber
c7e992e26d Phaser: flake8 
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-05-08 14:48:46 +01:00
Sebastien Bourdeauducq
eb38b664e3 phaser: typo 2021-05-07 10:00:10 +08:00
Peter Drmota
47bf5d36af coredevice.comm_kernel: Fix unpacking of lists of numpy.int64 
test.coredevice.test_embedding: Add tests for list of numpy.int64
 2021-04-21 15:46:58 +01:00
Leon Riesebos
af4fadcd54 added DefaultMissing to __all__ 
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-04-21 11:42:21 +08:00
Leon Riesebos
a0cea3a011 added __iter__ and __len__ to ScanObject base class 
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-04-21 11:42:21 +08:00
Leon Riesebos
2671c271d4 ad99xx unified type annotations for cfg_sw() methods and fixed test cases 
closes #1642

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-04-21 11:29:55 +08:00
Leon Riesebos
d745d50245 ad99xx added additional kernel invariants 
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-04-21 11:18:31 +08:00
Leon Riesebos
4a6201c083 ad99xx make kernel invariants instance variable 
prevents mutations on class variable that applies to all instances at once
closes #1654

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-04-21 11:18:31 +08:00
Robert Jördens
ffe1c9f9b1
Merge pull request #1628 from pathfinder49/fastino_mu_fix 
fastino: ensure `xxx_to_mu()` methods return int32 on the host
 2021-04-15 15:02:12 +02:00
Marius Weber
bda5aa7c7e fastino: ensure xxx_to_mu() methods return int32 on the host 
Currently running `voltage_to_mu()` or `voltage_group_to_mu()` on the host will
convert all machine unit values to int64. This leads to issues when machine units
are returned from RPCs.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2021-04-15 11:41:22 +01:00
David Nadlinger
b7f3eaebf9 gui: Fix occasional wrong fuzzy select menu position on KDE/Linux 2021-04-04 00:04:11 +01:00
Harry Ho
fc59791583 jsonschema: mirny: fix clk_sel default value 2021-03-30 16:06:56 +08:00
Harry Ho
8002fcf8bb jsonschema: style 2021-03-29 17:49:43 +08:00
Harry Ho
5f32cb7196 jsonschema: mirny: accept string enums for validating clk_sel 2021-03-29 17:49:43 +08:00
Harry Ho
75efb8985c ddb_template: mirny_cpld: accept clk_sel as a string 2021-03-29 17:49:43 +08:00
David Nadlinger
bdaaf3c1d7 dashboard: Disable Group CCB policy menu before first entry is selected 
It was possible to crash the dashboard by opening the context menu
before an applet entry had been selected for the first time (e.g.
immediately after startup) and selecting one of the Group CCB
actions, as the enable update slot would not have been run.
 2021-03-21 02:04:24 +00:00
David Nadlinger
6fd088e339 test/lit: Fix invalid type inference test 
This broke after b8cd163978, but
is invalid code to start with; this would have previously
crashed the code generator had the code actually been compiled.

(Allowing implicit conversion to bool would be a separate debate.)
 2021-03-21 01:46:52 +00:00
David Nadlinger
be4669d7a5 compiler: Fix crash with try/finally and stack-return function calls 
The previous code could have never worked as-is, as the result slot
went unused, and it tried to append the load instruction to the
block just terminated with the invoke.

GitHub: Fixes #1506, #1531.
 2021-03-21 01:31:26 +00:00
David Nadlinger
1f40f3ce15 compiler: Map host numpy.bool_ values to TBool 
Since we don't implement any integer-like operations for TBool
(addition, bitwise not, etc.), TBool is currently neither
strictly equivalent to builtin bool nor numpy.bool_, but through
very obvious compiler errors (operation not supported) rather than
silently different runtime behaviour.

Just mapping both to TBool thus is a huge improvement over the
current behaviour (where numpy.False_ is a true-like object). In
the future, we could still implement more operations for TBool,
presumably following numpy.bool_ rather than the builtin type,
just like builtin integers get translated to the numpy-like
TInt{32,64}.

GitHub: Fixes #1275.
 2021-03-20 00:54:41 +00:00
David Nadlinger
b8cd163978 compiler: Fix type inference for "ternary" if expressions 
Previously, any type would be accepted for the test expression,
leading to internal errors in the code generator if the passed
value wasn't in fact a bool.
 2021-03-20 00:27:25 +00:00
David Nadlinger
888696f588 coredevice: Fix RPC typing for bool lists/arrays 
GitHub: Fixes #1635.
 2021-03-20 00:03:10 +00:00
Leon Riesebos
d04bcd8754 add get_*() functions to ad9910, ad9912, and urukul. closes #1616 
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-03-15 13:06:24 +08:00
Leon Riesebos
c22f731a61 added typing and reformatted driver for ad9910, ad9912, and urukul 
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-03-15 13:06:24 +08:00
David Nadlinger
5ba22c11c3 compiler: Change type inference rules for empty array() calls 
array([...]), the constructor for NumPy arrays, currently has the
status of some weird kind of macro in ARTIQ Python, as it needs
to determine the number of dimensions in the resulting array
type, which is a fixed type parameter on which inference cannot
be performed.

This leads to an ambiguity for empty lists, which could contain
elements of arbitrary type, including other lists (which would
add to the number of dimensions).

Previously, I had chosen to make array([]) to be of completely
indeterminate type for this reason. However, this is different
to how the call behaves in host NumPy, where this is a well-formed
call creating an empty 1D array (or 2D for array([[], []]), etc.).

This commit adds special matching for (recursive lists of) empty
ListT AST nodes to treat them as scalar dimensions, with the
element type still unknown.

This also happens to fix type inference for embedding empty 1D
NumPy arrays from host object attributes, although multi-dimensional
arrays will still require work (see GitHub #1633).

GitHub: Fixes #1626.
 2021-03-14 22:48:43 +00:00
David Nadlinger
c707ccf7d7 compiler: Properly implement NumPy array slicing 
Strided slicing of one-dimensional arrays (i.e. with non-trivial
steps) might have previously been working, but would have had
different semantics, as all slices were copies rather than a view
into the original data.

Fixing this in the future will require adding support for an index
stride field/tuple to our array representation (and all the
associated indexing logic).

GitHub: Fixes #1627.
 2021-03-14 20:02:59 +00:00
David Nadlinger
557671b7db compiler: Fix type inference in slice expressions 
This was a long-standing issue affecting both lists and
the new NumPy array implementation, just caused by the
generic inference passes not being run on the slice
subexpressions (and thus e.g. ints not being monomorphized).

GitHub: Fixes #1632.
 2021-03-14 18:46:28 +00:00
David Nadlinger
75c255425d compiler: Linguistically untangle comment [nfc] 2021-03-14 18:40:21 +00:00
Leon Riesebos
b8f4c6b9bb added test case for get_experiment() with nested class 
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-02-28 14:26:44 +08:00
Leon Riesebos
1deaa758ce get_experiment() is able to get nested experiment classes using dots in class names. 
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-02-28 14:26:44 +08:00
Leon Riesebos
3c68223337 replaced deprecated inspect.getargspec() with inspect.getfullargspec() 
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-02-28 14:25:05 +08:00
Leon Riesebos
cd7f9531d7 added abstract describe method to ScanObject 
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2021-02-28 14:25:05 +08:00
Sebastien Bourdeauducq
92fd705990 increase memory allocated to comms CPU 
See discussion in #1612.
 2021-02-21 19:06:12 +08:00
Sebastien Bourdeauducq
8deb269b9a update major version 2021-02-17 16:18:05 +08:00
Sebastien Bourdeauducq
14d464b4cf update copyright year 2021-02-17 15:52:08 +08:00
Etienne Wodey
3cd96a951a master: refactor experiments enumeration, use tools.get_experiment 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-02-13 10:06:12 +08:00
Etienne Wodey
2ca9b64ba1 test: add unit tests for tools.file_import and tools.get_experiment 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-02-13 10:06:12 +08:00
Sebastien Bourdeauducq
d33a206f04 eem: fix Urukul QSPI after 9ef5717de8 (2) 2021-02-12 13:17:48 +08:00
Astro
3844cde97b jsonschema: validate hw_dev depending on target 2021-02-12 11:09:01 +08:00
Sebastien Bourdeauducq
22ce5b0299 eem: fix Urukul QSPI after 9ef5717de8 2021-02-12 10:59:53 +08:00
Etienne Wodey
af411de639 tools/file_import: simplify, remove deprecated load_module() call 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-02-10 16:03:31 +08:00
Sebastien Bourdeauducq
e54dd08821 metlino,sayma: adapt to new EEM API 
This also enables 4X SERDES TTLs.
 2021-02-10 15:32:10 +08:00
Sebastien Bourdeauducq
547254e89e eem_7series: pass through kwargs 2021-02-10 15:31:49 +08:00
Sebastien Bourdeauducq
49299c00a9 eem: enable DCI for LVDS TTL 2021-02-10 15:31:25 +08:00
Sebastien Bourdeauducq
9ef5717de8 eem: support different I/O standards in EEM slots 2021-02-10 15:31:05 +08:00
Drew
48a1c305c1 master: fix DeprecationWarning on logger.warn 
Resolves error message shown.

The following error message is shown when worker_impl.py:199 is run: 

```
WARNING:worker(RID,EXPERIMENT):py.warnings:/nix/store/77sw4p03cb7rdayx86agi4yqxh5wq46b-python3.7-artiq-5.7141.1b68906/lib/python3.7/site-packages/artiq/master/worker_impl.py:199: DeprecationWarning: The 'warn' function is deprecated, use 'warning' instead
  logging.warn(message)
```
 2021-02-10 15:27:22 +08:00
Astro
461199b903 kasli_generic: warn if min_artiq_version is not met 2021-02-10 15:26:15 +08:00
Astro
4b2ed67dd7 coredevice_generic.schema.json: add "min_artiq_version" 2021-02-10 15:26:15 +08:00
Sebastien Bourdeauducq
cf9cf0ab6f ttl_serdes_7series: add dci (HP bank) support 2021-02-07 22:32:18 +08:00
Sebastien Bourdeauducq
997a48fb31 ttl_serdes_ultrascale: fix, add dummy dci argument 2021-02-07 22:31:46 +08:00
Sebastien Bourdeauducq
bbe0c9162a ttl_serdes_ultrascale: cleanup 2021-02-07 22:00:33 +08:00
Sebastien Bourdeauducq
3572e2a9c7 ttl_serdes_7series: fix 2021-02-07 21:41:13 +08:00
Sebastien Bourdeauducq
88c212b84f ttl_serdes_7series: cleanup 2021-02-07 21:33:21 +08:00
Sebastien Bourdeauducq
db25f4e8f7 ttl_serdes_7series: use simpler I/O buffers 
In theory equivalent with these parameters.
 2021-02-07 20:10:37 +08:00
Sebastien Bourdeauducq
6bd9691ba8 gateware: remove TTL dead code 2021-02-07 19:58:02 +08:00
Sebastien Bourdeauducq
bfacd1e5b3 eem: fix Grabber cc_0-2 signal definitions 2021-02-07 18:01:05 +08:00
Sebastien Bourdeauducq
f7a33a1f99 gateware: make 7-series EEM handling functions shareable 2021-02-07 14:34:26 +08:00
Sebastien Bourdeauducq
1213f78ee9 jsonschema: support kasli_soc 2021-02-07 13:39:01 +08:00
Robert Jördens
2f5ea67b69
Merge pull request #1596 from airwoodix/fix-adf5356-init 
coredevice/adf5356: fix initial device detection
 2021-02-02 18:20:08 +01:00
Etienne Wodey
d691b05d78 coredevice/mirny: better error handling for clk_sel 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-02-02 16:23:47 +01:00
Etienne Wodey
78e1b9f8e5 sinara_tester/mirny: remove hw_rev checking fixup code 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-01-29 18:47:40 +01:00
Etienne Wodey
6f8e788620 coredevice/mirny: support human readable clk_sel 
In init(), read hw_rev to derive clk_sel code from user string.

Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-01-29 18:46:47 +01:00
Etienne Wodey
a8bc98a77b coredevice/adf5356: fix initial device detection 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2021-01-28 18:29:40 +01:00
David Nadlinger
f9872bb7b8 coredevice: Handle prematurely closed sockets in comm_kernel receive loop 
recv() returns 0 instead of data if the socket has already
been closed. This is translated into a zero-length list on
the Python layer. Previously, the code would enter an
infinite loop if the socket was closed while attempting
to receive data.
 2021-01-26 18:10:49 +08:00
David Nadlinger
f1fd42ea98 coredevice: Re-enable TCP keepalive 
This partially reverts commit b5e1bd3fa2,
which had removed keepalive. This, however, led to experiments
hanging forever if the core device had dropped the connection
(e.g. to a kernel CPU panic, or the device being rebooted).

The chosen keepalive settings are fairly conservative (with the
10 s timeout) to avoid any possible interaction with smoltcp's
3 s ARP try interval (see GitHub issue #1150), even though this
should be a non-issue now due to the larger ARP cache.
 2021-01-26 18:10:49 +08:00
pca006132
8148fdb8a7
use device endian for core device protocols (#1591) 2021-01-22 16:33:21 +08:00
Harry Ho
a0fd5261ea kc705: cleanup 2021-01-22 11:11:13 +08:00
Harry Ho
7c4eed7a11 kc705: simplify DRTIO master & satellite 
* KC705 master: user can no longer choose whether or not the SMA acts as the 2nd DRTIO channel; SFP and SMA now act as the 1st and 2nd channel respectively by default.
* KC705 satellite: user should now use `--sma` to enable using the SMA as the satellite channel; SFP acts as the satellite channel by default.
 2021-01-22 11:11:13 +08:00
David Nadlinger
1e443a3aea coredevice: Reuse Target.little_endian for protocol endianness [nfc] 2021-01-21 09:11:54 +01:00
pca006132
ec72eeda46 coredevice: use device endian for kernel and RPC 2021-01-21 09:07:48 +01:00
pca006132
3832b261b1 firmware: optimize integer array/list rpc 2021-01-21 09:05:17 +01:00
Harry Ho
88b14082b6 drtio/transceiver/gtx: delete obsolete modules 2021-01-20 15:05:32 +08:00
Harry Ho
9daf77bd58 kc705: add multichannel support on satellite 
* Two DRTIO channels (i.e. satellite and repeater) are enabled by default.
* User can choose either the SFP or SMA as the satellite channel (by passing `--drtio-sat sfp` or --drtio-sat sma` to the argparser), and the unchosen would become the repeater channel.
 2021-01-20 15:05:32 +08:00
Harry Ho
52afd4ef6b kc705: add GTX multilane support, add multichannel support on master 
* One DRTIO master channel is enabled by default.
* User can set the SMA as the 2nd master channel (by passing --drtio-sma to the argparser).
* Multi-channel (i.e. with repeaters) on KC705 satellite is supported but has not been implemented yet.
 2021-01-20 15:05:32 +08:00
Harry Ho
f6d39fd6ba kc705: revive DRTIO master with updated syntax 
* KC705 master variant now uses Si5324 as synthesiser.
* Multi-channel has not been implemented yet.
 2021-01-20 15:05:31 +08:00
Harry Ho
f25e86e934 kc705: revive DRTIO satellite with updated syntax, update GTX 
* Multi-channel has not been implemented yet.
 2021-01-20 11:25:38 +08:00
David Nadlinger
c229e76d07 compiler: Add accidentally omitted note to invalid RPC type diagnostic 
Might be a minor quality-of-life employment, but there
isn't a test case for this anyway.
 2021-01-20 01:49:16 +01:00
Robert Jördens
261870bdee phaser: fix oscillator rtio address for even base addresses 
close #1580
 2021-01-19 16:56:50 +01:00
David Nadlinger
f11aef74b4 gui: Add context menu entry to close all applets 
This is occasionally very useful if a large number of
applets were left open (e.g. spawned via CCB).
 2021-01-17 11:56:03 +01:00
Sebastien Bourdeauducq
c675488a99 reorganize JSON schema files 2021-01-16 10:43:14 +08:00
Astro
c6807f4594 kasli_generic: validate description against schema, use defaults from schema 2021-01-16 10:35:23 +08:00
Astro
45b5cfce05 gateware: add a kasli_generic.schema.json 2021-01-16 10:35:23 +08:00
David Nadlinger
9b39b1e328 test: Add coredevice tests for matrix multiplication 
Also includes a regression test specifically for
mixing multiple types in one kernel.
 2021-01-12 03:02:07 +01:00
David Nadlinger
f0284b2549 compiler: Fix collision of environments in matmult implementations 
GitHub: Fixes #1578.
 2021-01-12 03:02:07 +01:00
David Nadlinger
362f8ecb69 compiler: Add test for disallowing type-unstable array-assign binops 2021-01-12 03:02:07 +01:00
David Nadlinger
96692791cf compiler: Implement assigning binops for arrays 
GitHub: Fixes #1579.
 2021-01-12 03:02:07 +01:00
pca006132
5b5db1433b Revert "compiler: enabled vectorize option" 
This reverts commit 636898c302.
 2021-01-11 19:43:12 +08:00
pca006132
636898c302 compiler: enabled vectorize option 2021-01-11 16:31:24 +08:00
occheung
6a5f5088e2 frontend: sinara_tester: add mirny test 
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
 2021-01-05 17:01:01 +08:00
Harry Ho
cff7bcc122 Merge branch 'master' (43be383c86) into k7-drtio 2020-12-31 13:30:46 +08:00
Harry Ho
dc7addf394 Revert "drtio: remove KC705/GTX support" 
This reverts commit ebdbaaad32.
 2020-12-31 13:29:50 +08:00
Chris Ballance
43be383c86 kasli v2.0: drive TX_DISABLE low on all SFPs (fixes #1570) 
This was the same problem as #1508 but on SFP1..3
 2020-12-23 00:10:12 +08:00
Harry Ho
43ecb3fea6 sayma: add comments about CPLL line rate on KU GTH 2020-12-19 17:05:20 +08:00
Harry Ho
8cd794e9f4 jesd204_tools: use new syntax from jesd204b core 
* requires jesd204b changes as in https://github.com/HarryMakes/jesd204b/tree/gth
 2020-12-19 17:05:20 +08:00
Aadit Rahul Kamat
19f75f1cfd artiq_browser: update h5py api call 
Signed-off-by: Aadit Rahul Kamat <aadit.k12@gmail.com>
 2020-12-17 14:23:16 +08:00
occheung
a017dafee6 ddb_template: mirny_cpld: add default value 
Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
 2020-12-15 11:00:59 +08:00
Harry Ho
73271600a1 jdcg: STPL tests now perform after DAC initialization 2020-12-14 18:03:31 +08:00
occheung
3f631c417d artiq_ddb_template: mirny_cpld: add refclk, clk_sel args 
Signed-off-by: occheung <occheung@connect.ust.hk>
 2020-12-14 13:38:20 +08:00
occheung
33d39b261a artiq_ddb_template: mirny_cpld: rename adf5355 to adf5356 
Signed-off-by: occheung <occheung@connect.ust.hk>
 2020-12-14 13:38:20 +08:00
Sebastien Bourdeauducq
4b10273a2d gui: quamash -> qasync 2020-12-12 21:59:25 +08:00
Sebastien Bourdeauducq
1ce505c547 coredevice: remove obsolete watchdog code (#1458) 2020-12-08 13:25:39 +08:00
Sebastien Bourdeauducq
072053c3b2 compiler: remove obsolete watchdog code (#1458) 2020-12-08 13:25:08 +08:00
Sebastien Bourdeauducq
ccdc741e73 sayma_amc: fix --sfp argument 2020-12-07 18:02:36 +08:00
Robert Jördens
33285253fb
Merge pull request #1558 from quartiq/phased_ddb_fix 
Phased ddb fix
 2020-12-04 16:38:40 +01:00
Leon Riesebos
3b2c225fc4 allow dashboard to close if no connection can be made to moninj 
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2020-12-04 23:00:23 +08:00
Leon Riesebos
94271504dd Added RuntimeError to prelude to make the name available in kernels 
closes #1477

Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2020-12-04 22:59:08 +08:00
SingularitySurfer
9b4b550f76 5 is correct. 2020-12-04 14:49:30 +00:00
SingularitySurfer
cba631610c fixed phaser number of rtio channels 2020-12-04 14:40:59 +00:00
Robert Jördens
6ceb3f3095
Merge pull request #1551 from quartiq/tester_tweaks 
modified urukul instructions in sinara tester script
 2020-11-26 16:22:44 +01:00
Sebastien Bourdeauducq
eda4850f64 Revert "fixes with statement with multiple items" 
This reverts commit 88d346fa26.
 2020-11-22 11:57:22 +08:00
Sebastien Bourdeauducq
8e46c3c1fd Revert "compiler: fix incorrect with behavior" 
This reverts commit fe6115bcbb.
 2020-11-22 11:57:21 +08:00
SingularitySurfer
0605267424 modified urukul instructions 2020-11-19 12:20:34 +00:00
Marius Weber
3e38833020 ad9910: fix turns_to_pow return-type on host 
When run on the host, the `turns_to_pow` retrun-type is numpy.int64.
Sensibly, the compiler does not attempt to convert `numpy.int64` to `int32`.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
 2020-11-13 18:54:47 +01:00
David Nadlinger
9ff47bacab compiler: Provide libm special functions (erf, Bessel functions, …) 
Tests hard-depend on SciPy to make sure this is exercised
during CI.
 2020-11-11 19:15:30 +01:00
David Nadlinger
a5dcd86fb8 test/lit: Rename array to avoid conflict with standard library 
The old name created problems if a test dependency (e.g. NumPy/SciPy)
ends up importing the system `array` module internally somewhere.
 2020-11-11 17:42:53 +01:00
David Nadlinger
d95e619567 compiler: Implement binary NumPy math functions (arctan2, …) 
The bulk of the diff is just factoring out the implementation
for binary arithmetic implementations, to be reused for binary
function calls.
 2020-11-11 01:35:28 +01:00
David Nadlinger
bc6fbecbda compiler, firmware: Do not expose abort() to kernels 
This was only exposed for the assert implementation, and
does not exist on Zynq.
 2020-11-10 20:40:18 +01:00
David Nadlinger
292043a0a7 compiler: Raise AssertionErrors instead of abort()ing on all targets 2020-11-10 20:40:18 +01:00
Leon Riesebos
d8a5a8f568 fixed value scaling issue for the center scan gui widget 
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
 2020-11-10 18:42:18 +01:00
Etienne Wodey
dbcac62fd0 coredevice: adf5356: fix/adjust docs 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-11-10 10:49:22 +08:00
Etienne Wodey
e8730a7e14 coredevice: adf5356: add test for failed PLL lock 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-11-10 10:49:22 +08:00
Etienne Wodey
3844123c13 coredevice: adf5356: add enable/disable and power setting for outA 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-11-10 10:49:22 +08:00
Etienne Wodey
61dc2b8b64 coredevice: adf5356: add some tests 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-11-10 10:49:22 +08:00
Etienne Wodey
b200465cce coredevice: adf5355: rename to adf5356 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-11-10 10:49:22 +08:00
Etienne Wodey
d433f6e86d coredevice: adf5355: more general PLL parameters calculation 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-11-10 10:49:22 +08:00
Etienne Wodey
b856df7c35 coredevice: adf5355: cleanup, style 2020-11-10 10:49:22 +08:00
Etienne Wodey
211500089f coredevice: mirny/adf5355: add basic high-level interface 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-11-10 10:49:22 +08:00
David Nadlinger
4f311e7448 compiler: Raise exception on failed assert()s rather than panic 
This allows assert() to be used on Zynq, where abort() is not
currently implemented for kernels. Furthermore, this is arguably
the more natural implementation of assertions on all kernel targets
(i.e. where embedding into host Python is used), as it matches host
Python behavior, and the exception information actually makes it to
the user rather than leading to a ConnectionClosed error.

Since this does not implement printing of the subexpressions, I
left the old print+abort implementation as default for the time
being.

The lit/integration/instance.py diff isn't just a spurious change;
the exception-based assert implementation exposes a limitation in
the existing closure lifetime tracking algorithm (which is not
supposed to be what is tested there).

GitHub: Fixes #1539.
 2020-11-10 00:51:24 +01:00
David Nadlinger
f0ec987d23 test/coredevice: Avoid NumPy deprecation warning 
Jagged arrays are no longer silently inferred as dtype=object,
as per NEP-34.

The compiler ndarray (re)implementation is unchanged, so the
test still fails.
 2020-11-09 23:53:50 +01:00
Sebastien Bourdeauducq
ea95d91428 wrpll: separate collector reset 2020-11-09 17:57:13 +08:00
David Nadlinger
a97b4633cb compiler: Add math_fns module docstring [nfc] 2020-10-31 19:06:00 +01:00
Etienne Wodey
ecef5661ce coredevice/phaser: fix typos in docstring 
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
 2020-10-29 20:27:08 +01:00
David Nadlinger
d672d2fc35 test/coredevice: Fixup NumPy references 
This fixes a copy/paste refactoring mistake from d5f90f6c9.
 2020-10-20 02:49:05 +02:00
David Nadlinger
d5f90f6c9f compiler: Fix quoting of multi-dimensional arrays 
GitHub: Fixes m-labs/artiq#1523.
 2020-10-20 01:40:14 +02:00
David Nadlinger
d161fd5d84 compiler: Properly expand dimensions for array([]) with ndarray elements 
This matches host NumPy behaviour (and, in either case, was
previously broken, as it still continued past the array element
type).
 2020-10-20 01:40:14 +02:00
David Nadlinger
94489f9183 compiler: Fix inference order issue in multi-dim. subscript 
This will be caught by the test for an imminent array quoting fix.
 2020-10-20 01:40:14 +02:00
Robert Jördens
a9dd0a268c
Merge pull request #1533 from m-labs/phaser 
Phaser
 2020-10-19 09:30:12 +02:00
Robert Jördens
30d1acee9f fastlink: fix fastino style link 2020-10-18 20:43:21 +00:00
Robert Jördens
d98357051c add ref data 2020-10-18 20:43:21 +00:00
Robert Jördens
139385a571 fastlink: add fastino test 2020-10-18 17:11:09 +00:00
Sebastien Bourdeauducq
d185f1ac67 wrpll: fix mulshift (2) 2020-10-17 00:32:02 +08:00
Sebastien Bourdeauducq
3f076bf79b wrpll: fix mulshift 2020-10-16 22:05:37 +08:00
Sebastien Bourdeauducq
90017da484 firmware: remove obsolete watchdog code (#1458) 2020-10-15 18:38:00 +08:00
Sebastien Bourdeauducq
59703ad31d test: stop checking for artiq_netboot 2020-10-15 16:18:56 +08:00
Sebastien Bourdeauducq
7a5996ba79 artiq_netboot: moved to git.m-labs.hk/M-Labs/artiq-netboot 2020-10-15 16:14:22 +08:00
Sebastien Bourdeauducq
57ee57e7ea runtime: fix metlino si5324 init (2) 2020-10-14 18:41:56 +08:00
Sebastien Bourdeauducq
ac35548d0f runtime: fix metlino si5324 init 2020-10-14 12:57:25 +08:00
Sebastien Bourdeauducq
35c61ce24d si5324: unify N31 settings when used as synthesizer 
Closes #1528
 2020-10-12 14:45:52 +08:00
hartytp
a058be2ede wrpll: fix test_helper_collector 2020-10-08 19:43:12 +08:00
pca006132
d0d0a02fd0 test: added lit test for new error messages 2020-10-08 19:38:26 +08:00
pca006132
e9988f9d3b compiler: error message for custom operations 
Emit error messages for custom comparison and inclusion test,
instead of compiler crashing.
 2020-10-08 19:38:26 +08:00
Sebastien Bourdeauducq
db62cf2abe wrpll: convert tests to self-checking unittests 2020-10-08 18:38:01 +08:00
Sebastien Bourdeauducq
07d43b6e5f wrpll: babysit Vivado DSP retiming 
Design now passes timing.
 2020-10-08 17:51:27 +08:00
Sebastien Bourdeauducq
7dfb4af682 kasli2: work around vivado clock constraint problem 2020-10-08 16:31:39 +08:00
Sebastien Bourdeauducq
96a5df0dc6 kasli2: add false path constraint for wrpll helper clock 2020-10-08 16:19:44 +08:00
Sebastien Bourdeauducq
6248970ef8 wrpll: clean up matlab comparison test 2020-10-08 15:40:15 +08:00
hartytp
cd8c2ce713 wrpll: add test to compare collector+filter against Matlab simulation 2020-10-08 15:36:56 +08:00
hartytp
d780faf4ac wrpll.si549: initialize the clock divider to a sensible value 2020-10-08 15:32:27 +08:00
hartytp
e6ff2ddc32 wrpll: add more diagnostics in firmware and adapt to recent gateware changes 2020-10-08 15:32:27 +08:00
hartytp
7d7be6e711 wrpll.core: move collector into helper CD so we can get tags out while the filters are reset 2020-10-08 15:32:27 +08:00
Sebastien Bourdeauducq
3fa5d0b963 wrpll: clean up sign extension 2020-10-08 15:32:27 +08:00
hartytp
87911810d6 wrpll.core: add CSRs to monitor the collector outputs 2020-10-08 15:32:27 +08:00
hartytp
f2f942a8b4 wrpll.ddmtd: remove CSRs from DDMTD 
We will gather then from the collector output so we can get all tags on the same cycle
 2020-10-08 15:32:27 +08:00
hartytp
85bb641917 wrpll.ddmtd: fix first edge deglitcher 
The blind counter should be held in reset whenever the input is high,
not just when there is a rising edge (otherwise the counter runs down
during the main pulse and can then re-trigger on jitter from the falling edge)
 2020-10-08 15:32:27 +08:00
hartytp
f3cd0fc675 wrpll.filters: the helper clipping threshold is currently way too low. Move clipping after the bitshift to increase a bit. 
TODO: think about this and pick a sensible threshold (and also think about integrator anti windup)
 2020-10-08 15:32:27 +08:00
hartytp
e5e648bde1 wrpll: add bit shift for collector helper output 2020-10-08 15:32:27 +08:00
hartytp
c9ae406ac6 wrpll: change the DDMTD helper frequency to match CERN, improve docs 2020-10-08 15:32:27 +08:00
hartytp
f6f6045f1a wrpll.thls: fix make 2020-10-08 15:32:27 +08:00
hartytp
b44b870452 wrpll.filters: update to match Weida's MatLab simulations 2020-10-08 15:32:27 +08:00
hartytp
e9ab434fa7 wrpll.core: update for modified collector 2020-10-08 15:32:27 +08:00
Sebastien Bourdeauducq
17c952b8fb wrpll: style 2020-10-08 15:32:27 +08:00
hartytp
ebb7ccbfd1 wrpll: document DDMTD collector and fix unwrapping 2020-10-08 15:32:27 +08:00
Sebastien Bourdeauducq
66401aee9c dashboard: cleanup import 2020-10-07 19:24:54 +08:00
pca006132
fe6115bcbb compiler: fix incorrect with behavior 2020-10-07 18:59:35 +08:00
pca006132
02f46e8b79 Fixes none to bool coercion 
Fixes #1413 and #1414.
 2020-10-07 15:34:24 +08:00
pca006132
88d346fa26 fixes with statement with multiple items 
Closes #1478
 2020-10-07 15:33:34 +08:00
Sebastien Bourdeauducq
9214e0f3e2 firmware: fix Si5324 CKIN selection on Kasli 2.0 
https://github.com/sinara-hw/Kasli/issues/82#issuecomment-702129805
 2020-10-02 20:35:32 +08:00
Robert Jördens
eecd97ce4c phaser: debug and comments 2020-09-27 17:15:16 +00:00
Robert Jördens
c453c24fb0 phaser: tweak slacks 2020-09-26 21:16:08 +00:00
Robert Jördens
6c8bddcf8d phaser: tune sync_dly 2020-09-26 21:13:00 +00:00
Robert Jördens
569e5e56cd phaser: autotune and fix fifo_offset 2020-09-26 20:37:16 +00:00
Robert Jördens
2fba3cfc78 phaser: debug init, systematic bring-up 2020-09-25 20:54:59 +00:00
Robert Jördens
fec2f8b763 phaser: increase slack for iotest 2020-09-24 10:59:22 +00:00
Robert Jördens
a65239957f ad53xx: distinguish errors 2020-09-24 10:52:03 +02:00
Robert Jördens
6e6480ec21 phaser: tweak slacks and errors, identify trf 2020-09-24 08:38:30 +00:00
Robert Jördens
03d5f985f8 phaser: another artiq-python signed integer quirk 2020-09-23 15:40:54 +00:00
Robert Jördens
ef65ee18bd dac34h84: unflip spectrum, clear nco 2020-09-23 08:35:56 +00:00
Robert Jördens
50b4eb4840 Merge branch 'master' into phaser 
* master: (26 commits)
  fastino: documentation and eem pass-through
  kasli2: forward sma_clkin to si5324
  test: relax test_dma_playback_time on Zynq
  rpc: fixed _write_bool
  fastino: document/cleanup
  build_soc: remove assertion that was used for test runs
  metlino_sayma_ttl: Fix RTIO frequency & demo code (#1516)
  Revert "test: temporarily disable test_async_throughput"
  build_soc: rename identifier_str to gateware_identifier_str
  test: relax loopback gate timing
  test: temporarily disable test_async_throughput
  test: relax test_pulse_rate on Zynq
  test: skip NonexistentI2CBus if I2C is not supported
  build_soc: override identifier_str only for gateware
  examples: add Metlino master, Sayma satellite with TTLOuts via FMC
  sayma_amc: add support for 4x DIO output channels via FMC
  fmcdio_vhdci_eem: fix pin naming
  build_soc: add identifier_str override option
  RPC: optimization by caching
  test: improved test_performance
  ...
 2020-09-22 16:02:25 +00:00
Robert Jördens
c55f2222dc fastino: documentation and eem pass-through 
* Repeat information about matching log2_width a few times
  in the hope that people read it. #1518
* Pass through log2_width in kasli_generic json. close #1481
* Check DAC value range. #1518
 2020-09-22 17:58:53 +02:00
Robert Jördens
ad096f294c phaser: add hitl test exercising the complete API 2020-09-22 15:35:19 +00:00
Robert Jördens
85d16e3e5f phaser: tweaks 2020-09-22 15:27:38 +00:00
Robert Jördens
5c76f5c319 tester: add phaser 2020-09-22 14:36:49 +00:00
Robert Jördens
fd5e221898 phaser: dac and trf register maps, init code 2020-09-22 14:08:39 +00:00
Robert Jördens
3e036e365a phaser: nco, settings and init tweaks 2020-09-22 09:52:49 +00:00
Robert Jördens
fdb2867757 phaser: fewer iotest patterns 2020-09-21 17:06:26 +02:00
Robert Jördens
d730851397 phaser: elaborate init sequence, more tests 2020-09-21 15:05:29 +00:00
Robert Jördens
f0959fb871 phaser: iotest early, check_alarms 2020-09-17 14:13:58 +00:00
Robert Jördens
b15e388b5f ad53xx: distinguish errors 2020-09-17 14:13:10 +00:00
Sebastien Bourdeauducq
29c940f4e3 kasli2: forward sma_clkin to si5324 2020-09-17 16:53:43 +08:00
Robert Jördens
868a9a1f0c phaser: new multidds 2020-09-16 14:06:38 +00:00
Robert Jördens
c18f515bf9 phaser: rework rtio channels, sync_dly, init() 2020-09-16 12:23:07 +00:00
Robert Jördens
f3b0398720 phaser: n=2, m=16, sync_dly 2020-09-16 09:19:15 +00:00
Robert Jördens
9b58b712a6 phaser: doc tweaks 2020-09-15 12:35:26 +00:00
Robert Jördens
ff57813a9c phaser: init [wip] 2020-09-15 08:46:47 +00:00
Robert Jördens
07418258ae phaser: init [wip] 2020-09-15 08:46:10 +00:00
Robert Jördens
3a79ef740b phaser: work around integer size 2020-09-15 08:46:10 +00:00
Robert Jördens
b449e7202b phaser: rework docs 2020-09-15 08:46:10 +00:00
Robert Jördens
b619f657b9 phaser: doc tweaks 2020-09-12 19:59:49 +02:00
Robert Jördens
c3728678d6 phaser: document, elaborate comments, some fixes 2020-09-12 17:35:14 +00:00
Robert Jördens
e505dfed5b phaser: refactor coredevice driver 2020-09-12 14:17:40 +00:00
Robert Jördens
fdd2d6f2fb phaser: SI methods 2020-09-12 11:02:37 +00:00
Sebastien Bourdeauducq
bff611a888 test: relax test_dma_playback_time on Zynq 2020-09-11 11:21:45 +08:00
Robert Jördens
4e24700205 phaser: spelling 2020-09-09 16:52:52 +00:00
Robert Jördens
8aaeaa604e phaser: share_lut 2020-09-07 16:06:35 +00:00
Robert Jördens
e69bb0aeb3 phaser: add comment about get_dac_data 2020-09-07 16:06:16 +00:00
pca006132
6195b1d3a0 rpc: fixed _write_bool 
Closes #1519
 2020-09-04 13:49:22 +08:00
Robert Jördens
56aa22caeb fastino: document/cleanup 
* added documentation on `update`/`hold` mechanism
* mask machine unit values
* cleanup coredevice driver

close #1518
 2020-09-03 17:44:26 +02:00
Stephan Maka
1b475bdac4 build_soc: remove assertion that was used for test runs 2020-09-03 20:24:18 +08:00
Harry Ho
458a411320
metlino_sayma_ttl: Fix RTIO frequency & demo code (#1516) 2020-09-03 15:08:31 +08:00
Sebastien Bourdeauducq
47e88dfcbe Revert "test: temporarily disable test_async_throughput" 
This reverts commit f0289d49ab.
 2020-09-03 14:19:55 +08:00
Stephan Maka
002a71dd8d build_soc: rename identifier_str to gateware_identifier_str 2020-09-02 00:00:57 +08:00
Sebastien Bourdeauducq
4398a2d5fa test: relax loopback gate timing 2020-09-01 17:50:09 +08:00
Sebastien Bourdeauducq
f0289d49ab test: temporarily disable test_async_throughput 
M-Labs/artiq-zynq#104
 2020-09-01 17:49:40 +08:00
Sebastien Bourdeauducq
8d5dc0ad2a test: relax test_pulse_rate on Zynq 2020-09-01 17:08:26 +08:00
Sebastien Bourdeauducq
f294d039b3 test: skip NonexistentI2CBus if I2C is not supported 2020-09-01 16:47:04 +08:00
Stephan Maka
91df3d7290 build_soc: override identifier_str only for gateware 2020-09-01 10:46:39 +08:00
Harry Ho
3d84135810 examples: add Metlino master, Sayma satellite with TTLOuts via FMC 2020-08-31 16:21:45 +08:00
Harry Ho
dfbf3311cb sayma_amc: add support for 4x DIO output channels via FMC 2020-08-31 16:21:45 +08:00
Harry Ho
1ad9deaf91 fmcdio_vhdci_eem: fix pin naming 2020-08-31 16:21:45 +08:00
Stephan Maka
45ae6202c0 build_soc: add identifier_str override option 
Signed-off-by: Stephan Maka <stephan@spaceboyz.net>
 2020-08-31 11:48:58 +08:00
Robert Jördens
272dc5d36a phaser: documentation 2020-08-28 16:36:44 +00:00
pca006132
b2572003ac RPC: optimization by caching 
This reduced the calls needed for socket send/recv.
 2020-08-28 14:58:34 +08:00
pca006132
69f0699ebd test: improved test_performance 
1. Added tests for small payload.
2. Added statistics.
 2020-08-28 14:58:34 +08:00
Sebastien Bourdeauducq
7cf974a6a7 comm_kernel: fix typo 2020-08-28 12:25:23 +08:00
Robert Jördens
68bfa04abb phaser: trf readback strobe spi changes 2020-08-27 15:31:42 +00:00
Robert Jördens
96fc248d7c phaser: synchronize multidds to frame 2020-08-27 14:28:19 +00:00
Robert Jördens
c10ac2c92a phaser: add trf, duc, interfaces, redo body assembly, use more natrual iq ordering (i lsb) 2020-08-27 14:26:09 +00:00
Robert Jördens
e5e2392240 phaser: wire up multidds 2020-08-26 17:12:41 +00:00
Robert Jördens
d1be1212ab phaser: coredevice shim, dds [wip] 2020-08-26 15:10:50 +00:00
pca006132
aac2194759 Ported rpc changes to or1k 2020-08-26 14:17:06 +08:00
pca006132
7181ff66a6 compiler: improved rpc performance for list and array 
1. Removed duplicated tags before each elements.
2. Use numpy functions to speedup parsing.
 2020-08-26 14:17:06 +08:00
pca006132
cfddc13294 test: fixed test_performance 
Added more tests and use normal rpc instead of async rpc.

Async RPC does not represent the real throughput which is limited by the
hardware and the network. Normal RPC which requires a response from the
remote is closer to real usecases.
 2020-08-26 14:17:06 +08:00
Robert Jördens
20fcfd95e9 phaser: coredevice shim, readback fix 2020-08-24 15:46:31 +00:00
Robert Jördens
bcefb06e19 phaser: ddb template, split crc 2020-08-24 14:51:50 +00:00
Robert Jördens
11c9def589 phaser: readback delay, test fastlink 2020-08-24 14:49:36 +00:00
Paweł Kulik
eb350c3459 Drive SFP0 TX_DISABLE low during startup (as was in Kasli v1.1). Fixes Ethernet on SFP modules with pullup on this line. 
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
 2020-08-24 21:39:53 +08:00
Robert Jördens
63e4b95325 fastlink: rework crc injection 2020-08-23 19:41:13 +00:00
Robert Jördens
a27a03ab3c fastlink: fix crc vs data width 2020-08-23 19:02:50 +00:00
Robert Jördens
7e584d0da1 fastino: use fastlink 2020-08-22 11:56:23 +00:00
Robert Jördens
3e99f1ce5a phaser: refactor link 2020-08-22 11:56:23 +00:00
Robert Jördens
a34a647ec4 phaser: refactor fastlink 2020-08-22 11:56:23 +00:00
Robert Jördens
aa0154d8e2 phaser: initial 2020-08-22 11:56:23 +00:00
Sebastien Bourdeauducq
5f6aa02b61 gui: unbreak background 2020-08-14 13:14:45 +08:00
David Nadlinger
69718fca90 gui: Improve fuzzy-select heuristics 
Even though the code already used non-greedy wildcards before,
it would not find the shortest match, as earlier match starts
would still take precedence.

This could possibly be sped up a bit in CPython by doing
everything inside re using lookahead-assertion trickery, but the
current code is already imperceptibly fast for hundreds of
choices.
 2020-08-14 02:13:45 +01:00
pca006132
a46573e97a Revert "test: set uart log level to INFO for DMA tests" 
This reverts commit b05cbcbc24.
 2020-08-13 12:44:33 +08:00
pca006132
b05cbcbc24 test: set uart log level to INFO for DMA tests 2020-08-13 12:24:57 +08:00
Sebastien Bourdeauducq
48008eaf5f test: omit unavailable math functions on OR1K 2020-08-12 15:01:13 +08:00
Sebastien Bourdeauducq
d8cd5023f6 runtime: expose more libm functions 2020-08-12 13:36:06 +08:00
David Nadlinger
c6f0c4dca4 test/coredevice: Ignore jagged 2D array embedding test for now 2020-08-10 00:23:38 +01:00
David Nadlinger
daf57969b2 compiler: Do not expand strings into TInt(8)s in array() 2020-08-09 23:46:45 +01:00
David Nadlinger
778f2cf905 compiler: Fix numpy.full, implement for >1D 2020-08-09 23:46:45 +01:00
David Nadlinger
53d64d08a8 compiler: Fix multi-dim slice error message test, tweak wording 2020-08-09 23:14:56 +01:00
David Nadlinger
d35f659d25 compiler: Add additional math fns available from Rust libm 2020-08-09 20:09:43 +01:00
David Nadlinger
a39bd69ca4 compiler: Implement numpy.rint() using llvm.round() 2020-08-09 19:44:58 +01:00
David Nadlinger
ae47d4c0ec test/coredevice: Add host/device consistency checks for NumPy math 2020-08-09 19:15:43 +01:00
David Nadlinger
8e262acd1e compiler: Slight array op implementation cleanup [nfc] 
array_unaryop_funcs was never used; since the mangled names
are unique, a single dictionary would be nicer for overrides
anyway.s
 2020-08-09 18:58:01 +01:00
David Nadlinger
33d931a5b7 compiler: Implement multi-dimensional indexing of arrays 
This generates rather more code than necessary, but has
the advantage of automatically handling incomplete
multi-dimensional subscripts which still leave arrays
behind.
 2020-08-09 17:08:43 +01:00
David Nadlinger
b00ba5ece1 compiler: Support explicit array(…, dtype=…) syntax 2020-08-09 17:08:43 +01:00
David Nadlinger
ad34df3de1 compiler: Support numpy.float 
This would previously crash the compiler.
 2020-08-09 17:08:43 +01:00
David Nadlinger
8783ba2072 compiler/firmware: RPCs for ndarrays 2020-08-09 17:08:43 +01:00
David Nadlinger
5472e830f6 compiler: Assume array()s are always rectangular 2020-08-09 03:54:42 +01:00
David Nadlinger
8eddb9194a test/lit: Add smoke test for math function broadcasting 2020-08-09 03:54:42 +01:00
David Nadlinger
1c645d8857 compiler: Unbreak quoting of 1D ndarrays 
Lists and arrays no longer have the same representation all
the way through codegen, as used to be the case.

This could/should be made more efficient later, eliding the
temporary copies.
 2020-08-09 03:54:42 +01:00
David Nadlinger
df8f1c5c5a compiler: Annotate math functions nounwind/nowrite 2020-08-09 03:54:42 +01:00
David Nadlinger
cc00ae9580 compiler: Implement broadcasting of math functions 2020-08-09 03:54:42 +01:00
David Nadlinger
be7d78253f compiler: Implement 1D-/2D- array transpose 
Left generic transpose (shape order inversion) for now, as that
would be less ugly if we implement forwarding to Python function
bodies for array function implementations.

Needs a runtime test case.
 2020-08-09 03:54:42 +01:00
David Nadlinger
faea886c44 compiler: Implement array vs. scalar broadcasting 2020-08-09 03:54:42 +01:00
David Nadlinger
56a872ccc0 compiler: Insert array binop shape check in caller for location information 2020-08-09 03:54:42 +01:00
David Nadlinger
ef260adca8 compiler: Implement matrix multiplication 
LLVM will take care of optimising the loops. This was still
unnecessarily painful; implementing generics and implementing
this in ARTIQ Python looks very attractive right now.
 2020-08-09 03:54:42 +01:00
David Nadlinger
0da4a61d99 compiler: Fix method name typo [nfc] 2020-08-09 03:54:42 +01:00
David Nadlinger
78afa2ea8e compiler: Support MatMult in inferencer 
Still needs actual codegen support.
 2020-08-09 03:54:42 +01:00
David Nadlinger
4d48470320 compiler: Support common numpy.* math functions 
Relies on the runtime to provide the necessary
(libm-compatible) functions.

The test is nifty, but a bit brittle; if this breaks in the
future because of optimizer changes, do not hesitate to convert
this into a more pedestrian test case.
 2020-08-09 03:54:41 +01:00
David Nadlinger
d37503f21d compiler: T{C -> External}Function, clarify docs [nfc] 2020-08-09 03:54:41 +01:00
David Nadlinger
da255bee1b compiler: Implement element type coercion for arrays 
So far, this is not exposed to the user beyond implicit conversions.

Note that all the implicit conversions, such as triggered by adding
arrays of mismatching types, or dividing integer arrays, are currently
emitted in a maximally inefficient way, where a temporary copy is first
made for the type conversion. The conversions would more sensibly be
implemented during the per-element operations to save on the extra
copies, but the current behaviour fell out of the rest of the IR
generator structure without extra changes.
 2020-08-09 03:54:41 +01:00
David Nadlinger
4426e4144f compiler: Implement unary plus/minus for arrays 
Implementation is needlessly generic to anticipate
coercion/transcendental functions.
 2020-08-09 03:54:41 +01:00
David Nadlinger
0d8fbd4f19 test/lit: Add a test for matrix binary operations 
No reason to believe other operations won't work the same.
(More exhaustive tests to follow using embedding for comparison
against NumPy.)
 2020-08-09 03:54:41 +01:00
David Nadlinger
7bdd6785b7 test/lit: Basic ndarray smoke tests for all binops 2020-08-09 03:54:41 +01:00
David Nadlinger
4d002c7934 compiler: Explain use of rpc_tag() in array ops, formatting [nfc] 2020-08-09 03:54:41 +01:00
David Nadlinger
a7e855b319 compiler.types: Change invalid default value [nfc] 
This wasn't actually ever used, but was a dict instead of a set.
 2020-08-09 03:54:41 +01:00
David Nadlinger
48fb80017f compiler: Implement basic element-wise array operations 2020-08-09 03:54:41 +01:00
David Nadlinger
9af6e5747d compiler: Factor rpc_tag() out of llvm_ir_generator 2020-08-09 03:54:41 +01:00
David Nadlinger
e77c7d1c39 compiler: Add inferencer support for array operations 2020-08-09 03:54:41 +01:00
David Nadlinger
ef57cad1a3 compiler: Test ndarray element assignment 2020-08-09 03:54:41 +01:00
David Nadlinger
a9a975e5d4 language: Allow instantating TArray using bare ints 2020-08-09 03:54:41 +01:00
David Nadlinger
504b8f0148 language: Export TArray 2020-08-09 03:54:41 +01:00
David Nadlinger
dea3c0c572 compiler: Don't store redundant ndarray buffer length, match list layout 
This adds `elt` to _TPointer and the ir.Offset IR instruction,
which is like GetElem but without the final load.
 2020-08-09 03:54:41 +01:00
David Nadlinger
e82357d180 compiler: Fix inferencer tests after adding TArray.num_dims 2020-08-09 03:54:41 +01:00
David Nadlinger
cb1cadb46a compiler: Fix/test 1D array construction from generic iterables 2020-08-09 03:54:41 +01:00
David Nadlinger
38c17622cc compiler: Axis-wise iteration of ndarrays 
Matches NumPy. Slicing a TList reallocates, this doesn't; offsetting
couldn't be handled in the IR without introducing new semantics
(the Alloc kludge; could/should be made its own IR type).
 2020-08-09 03:54:41 +01:00
David Nadlinger
c95a978ab6 compiler: Iteration for 1D ndarrays 2020-08-09 03:54:41 +01:00
David Nadlinger
bc17bb4d1a compiler: Parametrize TArray in number of dimensions 2020-08-09 03:54:41 +01:00
David Nadlinger
632c5bc937 compiler: Add ndarray .shape access 2020-08-09 03:54:41 +01:00
David Nadlinger
40f59561f2 compiler: Add test for length of empty arrays [nfc] 
This makes sure we are actually emitting this as an 1D array
(like NumPy does).
 2020-08-09 03:54:41 +01:00
David Nadlinger
d882f8a3f0 compiler: Implement len() for ndarrays 2020-08-09 03:54:41 +01:00
David Nadlinger
575be2aeca compiler: Basic support for creation of multidimensional arrays 
Breaks all uses of array(), as indexing is not yet implemented.
 2020-08-09 03:54:41 +01:00
David Nadlinger
56010c49fb compiler/inferencer: Detect rectangular array()s 
Still needs support through all the rest of the compiler, and
support for higher-dimensional arrays.

Alternatively, we could always assume ndarrays of ndarrays
are rectangular (i.e. ban array/list element types), and
detect mismatch at runtime. This might turn out to be
preferrable to be able to construct matrices from rows/columns.

`array()` is disallowed for no particularly good reason but
numpy API compatibility.
 2020-08-09 03:54:41 +01:00
David Nadlinger
6ea836183d test/lit: Move some list tests to appropriate module [nfc] 2020-08-09 03:54:41 +01:00
pmldrmota
1df62862cd
AD9910: Write correct number of bits to POW register (#1498) 
* coredevice.ad9910: Add return type hints to conversion functions

* coredevice.ad9910: Make set_pow write correct number of bits
The AD9910 expects 16 bits. Thus, if writing 32 bits to the POW register, the chip would likely enter a locked-up state.

* coredevice.ad9910: Correct data alignment in write_16

Co-authored-by: Robert Jördens <rj@quartiq.de>

* coredevice.ad9910: Add function to read from 16 bit registers

Co-authored-by: drmota <peter.drmota@physics.ox.ac.uk>
Co-authored-by: Robert Jördens <rj@quartiq.de>
 2020-08-07 10:10:44 +02:00
Sebastien Bourdeauducq
504f72a02c rtio: remove legacy i_overflow_reset CSR 2020-08-06 17:52:32 +08:00
Sebastien Bourdeauducq
5f36e49f91 test_rtio: make DMA test generic wrt TTL channel 2020-08-06 16:36:14 +08:00
pca006132
3bfd372c20 compiler: linker discard local symbols. 
Fixes exception backtrace problem for ARM.
 2020-08-06 16:07:28 +08:00
Sebastien Bourdeauducq
e3c5775584 test: skip CacheTest.test_borrow on Zynq 2020-08-06 10:54:30 +08:00
David Nadlinger
ae999db8f6 compiler: Revert function call lifetime tracking fix 
This reverts commits f8d1506922
and cf19c9512d.

While the commit just fixes a clear typo in the implementation,
it turns out the original algorithm isn't flexible enough to
capture functions that transitively return references to
long-lived data. For instance, while cache_get() is special-cased
in the compiler to be recognised as returning a value of Global()
lifetime, a function just forwarding to it (as seen in the
embedding tests) isn't anymore.

A separate issue is also that this makes implementing functions
that take lists and return references to global data in user code
impossible, which central parts of the Oxford codebase rely on.

Just reverting for now to unblock master; a fix is easily designed,
but needs testing.
 2020-07-30 16:40:39 +01:00