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artiq
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bootloader: swap endianness 

Signed-off-by: occheung <dc@m-labs.hk>
This commit is contained in:
occheung 2021-07-15 15:59:18 +08:00
parent 13032272fd
commit 8294d7fea5
2 changed files with 5 additions and 4 deletions
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3
artiq/firmware/bootloader/Makefile
View File

@ -14,4 +14,5 @@ bootloader.elf: $(RUSTOUT)/libbootloader.a
%.bin: %.elf
$(objcopy) -O binary
$(MSCIMG) $@
$(MSCIMG) $@ --little
objcopy -I binary -O binary --reverse-bytes=4 $@

6
artiq/firmware/bootloader/main.rs
View File

@ -10,7 +10,7 @@ extern crate riscv;
use core::{ptr, slice, convert::TryFrom};
use crc::crc32;
use byteorder::{ByteOrder, BigEndian};
use byteorder::{ByteOrder, LittleEndian};
use board_misoc::{ident, cache, sdram, config, boot, mem as board_mem};
#[cfg(has_slave_fpga_cfg)]
use board_misoc::slave_fpga;
@ -157,8 +157,8 @@ fn flash_boot() {
println!("Booting from flash...");
let header = unsafe { slice::from_raw_parts(FIRMWARE, 8) };
let length = BigEndian::read_u32(&header[0..]) as usize;
let expected_crc = BigEndian::read_u32(&header[4..]);
let length = LittleEndian::read_u32(&header[0..]) as usize;
let expected_crc = LittleEndian::read_u32(&header[4..]);
if length == 0 || length == 0xffffffff {
println!("No firmware present");