mirror of https://github.com/m-labs/artiq.git
artiq_flash: fix gateware header not in little-endian for RISC-V
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@ -418,8 +418,8 @@ def main():
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magic = 0x5352544d # "SRTM", see sayma_rtm target
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length = bin_file.tell() - 8
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bin_file.seek(0)
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bin_file.write(magic.to_bytes(4, byteorder="big"))
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bin_file.write(length.to_bytes(4, byteorder="big"))
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bin_file.write(magic.to_bytes(4, byteorder="little"))
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bin_file.write(length.to_bytes(4, byteorder="little"))
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atexit.register(lambda: os.unlink(bin_filename))
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return bin_filename
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