mirror of
https://github.com/m-labs/artiq.git
synced 2024-12-29 05:03:34 +08:00
eem: support different I/O standards in EEM slots
This commit is contained in:
parent
48a1c305c1
commit
9ef5717de8
@ -19,6 +19,10 @@ def _eem_pin(eem, i, pol):
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return "eem{}:{}_{}".format(eem, _eem_signal(i), pol)
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def default_iostandard(eem):
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return IOStandard("LVDS_25")
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class _EEM:
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@classmethod
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def add_extension(cls, target, eem, *args, **kwargs):
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@ -30,15 +34,15 @@ class _EEM:
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class DIO(_EEM):
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@staticmethod
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def io(eem, iostandard="LVDS_25"):
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def io(eem, iostandard):
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return [("dio{}".format(eem), i,
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Subsignal("p", Pins(_eem_pin(eem, i, "p"))),
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Subsignal("n", Pins(_eem_pin(eem, i, "n"))),
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IOStandard(iostandard))
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iostandard(eem))
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for i in range(8)]
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@classmethod
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def add_std(cls, target, eem, ttl03_cls, ttl47_cls, iostandard="LVDS_25",
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def add_std(cls, target, eem, ttl03_cls, ttl47_cls, iostandard=default_iostandard,
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edge_counter_cls=None):
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cls.add_extension(target, eem, iostandard=iostandard)
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@ -67,7 +71,7 @@ class DIO(_EEM):
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class Urukul(_EEM):
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@staticmethod
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def io(eem, eem_aux, iostandard="LVDS_25"):
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def io(eem, eem_aux, iostandard):
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ios = [
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("urukul{}_spi_p".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
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@ -75,7 +79,7 @@ class Urukul(_EEM):
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Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))),
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Subsignal("cs_n", Pins(
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*(_eem_pin(eem, i + 3, "p") for i in range(3)))),
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IOStandard(iostandard),
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iostandard(eem),
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),
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("urukul{}_spi_n".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
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@ -83,7 +87,7 @@ class Urukul(_EEM):
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Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))),
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Subsignal("cs_n", Pins(
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*(_eem_pin(eem, i + 3, "n") for i in range(3)))),
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IOStandard(iostandard),
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iostandard(eem),
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),
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]
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ttls = [(6, eem, "io_update"),
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@ -102,26 +106,26 @@ class Urukul(_EEM):
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("urukul{}_{}".format(eem, sig), 0,
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Subsignal("p", Pins(_eem_pin(j, i, "p"))),
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Subsignal("n", Pins(_eem_pin(j, i, "n"))),
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IOStandard(iostandard), *extra_args
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iostandard(j), *extra_args
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))
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return ios
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@staticmethod
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def io_qspi(eem0, eem1, iostandard="LVDS_25"):
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def io_qspi(eem0, eem1, iostandard):
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ios = [
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("urukul{}_spi_p".format(eem0), 0,
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Subsignal("clk", Pins(_eem_pin(eem0, 0, "p"))),
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Subsignal("mosi", Pins(_eem_pin(eem0, 1, "p"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem0, 3, "p"), _eem_pin(eem0, 4, "p"))),
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IOStandard(iostandard),
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iostandard(eem0),
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),
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("urukul{}_spi_n".format(eem0), 0,
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Subsignal("clk", Pins(_eem_pin(eem0, 0, "n"))),
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Subsignal("mosi", Pins(_eem_pin(eem0, 1, "n"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem0, 3, "n"), _eem_pin(eem0, 4, "n"))),
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IOStandard(iostandard),
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iostandard(eem0),
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),
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]
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ttls = [(6, eem0, "io_update"),
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@ -130,38 +134,35 @@ class Urukul(_EEM):
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(5, eem1, "sw1"),
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(6, eem1, "sw2"),
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(7, eem1, "sw3")]
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for i, j, sig in ttls:
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for i, j, iostandard, sig in ttls:
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ios.append(
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("urukul{}_{}".format(eem0, sig), 0,
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Subsignal("p", Pins(_eem_pin(j, i, "p"))),
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Subsignal("n", Pins(_eem_pin(j, i, "n"))),
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IOStandard(iostandard)
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iostandard(j)
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))
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ios += [
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("urukul{}_qspi_p".format(eem0), 0,
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Subsignal("cs", Pins(_eem_pin(eem0, 5, "p"))),
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Subsignal("clk", Pins(_eem_pin(eem0, 2, "p"))),
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Subsignal("mosi0", Pins(_eem_pin(eem1, 0, "p"))),
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Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "p"))),
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Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "p"))),
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Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "p"))),
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IOStandard(iostandard),
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Subsignal("cs", Pins(_eem_pin(eem0, 5, "p"), iostandard(eem0))),
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Subsignal("clk", Pins(_eem_pin(eem0, 2, "p"), iostandard(eem0))),
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Subsignal("mosi0", Pins(_eem_pin(eem1, 0, "p"), iostandard(eem1))),
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Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "p"), iostandard(eem1))),
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Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "p"), iostandard(eem1))),
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Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "p"), iostandard(eem1))),
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),
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("urukul{}_qspi_n".format(eem0), 0,
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Subsignal("cs", Pins(_eem_pin(eem0, 5, "n"))),
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Subsignal("clk", Pins(_eem_pin(eem0, 2, "n"))),
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Subsignal("mosi0", Pins(_eem_pin(eem1, 0, "n"))),
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Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "n"))),
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Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "n"))),
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Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "n"))),
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IOStandard(iostandard),
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Subsignal("cs", Pins(_eem_pin(eem0, 5, "n"), iostandard(eem0))),
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Subsignal("clk", Pins(_eem_pin(eem0, 2, "n"), iostandard(eem0))),
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Subsignal("mosi0", Pins(_eem_pin(eem1, 0, "n"), iostandard(eem1))),
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Subsignal("mosi1", Pins(_eem_pin(eem1, 1, "n"), iostandard(eem1))),
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Subsignal("mosi2", Pins(_eem_pin(eem1, 2, "n"), iostandard(eem1))),
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Subsignal("mosi3", Pins(_eem_pin(eem1, 3, "n"), iostandard(eem1))),
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),
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]
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return ios
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@classmethod
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def add_std(cls, target, eem, eem_aux, ttl_out_cls, sync_gen_cls=None,
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iostandard="LVDS_25"):
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def add_std(cls, target, eem, eem_aux, ttl_out_cls, sync_gen_cls=None, iostandard=default_iostandard):
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cls.add_extension(target, eem, eem_aux, iostandard=iostandard)
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phy = spi2.SPIMaster(target.platform.request("urukul{}_spi_p".format(eem)),
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@ -190,37 +191,37 @@ class Urukul(_EEM):
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class Sampler(_EEM):
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@staticmethod
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def io(eem, eem_aux, iostandard="LVDS_25"):
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def io(eem, eem_aux, iostandard):
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ios = [
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("sampler{}_adc_spi_p".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
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Subsignal("miso", Pins(_eem_pin(eem, 1, "p"))),
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IOStandard(iostandard),
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iostandard(eem),
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),
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("sampler{}_adc_spi_n".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
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Subsignal("miso", Pins(_eem_pin(eem, 1, "n"))),
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IOStandard(iostandard),
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iostandard(eem),
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),
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("sampler{}_pgia_spi_p".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 4, "p"))),
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Subsignal("mosi", Pins(_eem_pin(eem, 5, "p"))),
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Subsignal("miso", Pins(_eem_pin(eem, 6, "p"))),
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Subsignal("cs_n", Pins(_eem_pin(eem, 7, "p"))),
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IOStandard(iostandard),
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iostandard(eem),
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),
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("sampler{}_pgia_spi_n".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 4, "n"))),
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Subsignal("mosi", Pins(_eem_pin(eem, 5, "n"))),
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Subsignal("miso", Pins(_eem_pin(eem, 6, "n"))),
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Subsignal("cs_n", Pins(_eem_pin(eem, 7, "n"))),
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IOStandard(iostandard),
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iostandard(eem),
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),
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] + [
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("sampler{}_{}".format(eem, sig), 0,
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Subsignal("p", Pins(_eem_pin(j, i, "p"))),
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Subsignal("n", Pins(_eem_pin(j, i, "n"))),
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IOStandard(iostandard)
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iostandard(j)
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) for i, j, sig in [
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(2, eem, "sdr"),
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(3, eem, "cnv")
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@ -235,7 +236,7 @@ class Sampler(_EEM):
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Subsignal("sdoc", Pins(_eem_pin(eem_aux, 3, "p"))),
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Subsignal("sdod", Pins(_eem_pin(eem_aux, 4, "p"))),
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Misc("DIFF_TERM=TRUE"),
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IOStandard(iostandard),
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iostandard(eem_aux),
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),
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("sampler{}_adc_data_n".format(eem), 0,
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Subsignal("clkout", Pins(_eem_pin(eem_aux, 0, "n"))),
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@ -244,13 +245,13 @@ class Sampler(_EEM):
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Subsignal("sdoc", Pins(_eem_pin(eem_aux, 3, "n"))),
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Subsignal("sdod", Pins(_eem_pin(eem_aux, 4, "n"))),
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Misc("DIFF_TERM=TRUE"),
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IOStandard(iostandard),
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iostandard(eem_aux),
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),
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]
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return ios
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@classmethod
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def add_std(cls, target, eem, eem_aux, ttl_out_cls, iostandard="LVDS_25"):
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def add_std(cls, target, eem, eem_aux, ttl_out_cls, iostandard=default_iostandard):
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cls.add_extension(target, eem, eem_aux, iostandard=iostandard)
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phy = spi2.SPIMaster(
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@ -275,7 +276,7 @@ class Sampler(_EEM):
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class Novogorny(_EEM):
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@staticmethod
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def io(eem, iostandard="LVDS_25"):
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def io(eem, iostandard):
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return [
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("novogorny{}_spi_p".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
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@ -283,7 +284,7 @@ class Novogorny(_EEM):
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Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem, 3, "p"), _eem_pin(eem, 4, "p"))),
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IOStandard(iostandard),
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iostandard(eem),
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),
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("novogorny{}_spi_n".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
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@ -291,13 +292,13 @@ class Novogorny(_EEM):
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Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem, 3, "n"), _eem_pin(eem, 4, "n"))),
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IOStandard(iostandard),
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iostandard(eem),
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),
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] + [
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("novogorny{}_{}".format(eem, sig), 0,
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Subsignal("p", Pins(_eem_pin(j, i, "p"))),
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Subsignal("n", Pins(_eem_pin(j, i, "n"))),
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IOStandard(iostandard)
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iostandard(j)
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) for i, j, sig in [
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(5, eem, "cnv"),
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(6, eem, "busy"),
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@ -306,7 +307,7 @@ class Novogorny(_EEM):
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]
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@classmethod
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def add_std(cls, target, eem, ttl_out_cls, iostandard="LVDS_25"):
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def add_std(cls, target, eem, ttl_out_cls, iostandard=default_iostandard):
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cls.add_extension(target, eem, iostandard=iostandard)
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phy = spi2.SPIMaster(target.platform.request("novogorny{}_spi_p".format(eem)),
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@ -322,7 +323,7 @@ class Novogorny(_EEM):
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class Zotino(_EEM):
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@staticmethod
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def io(eem, iostandard="LVDS_25"):
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def io(eem, iostandard):
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return [
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("zotino{}_spi_p".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
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@ -330,7 +331,7 @@ class Zotino(_EEM):
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Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem, 3, "p"), _eem_pin(eem, 4, "p"))),
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IOStandard(iostandard),
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iostandard(eem),
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),
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("zotino{}_spi_n".format(eem), 0,
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Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
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@ -338,13 +339,13 @@ class Zotino(_EEM):
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Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))),
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Subsignal("cs_n", Pins(
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_eem_pin(eem, 3, "n"), _eem_pin(eem, 4, "n"))),
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IOStandard(iostandard),
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iostandard(eem),
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),
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] + [
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("zotino{}_{}".format(eem, sig), 0,
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Subsignal("p", Pins(_eem_pin(j, i, "p"))),
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Subsignal("n", Pins(_eem_pin(j, i, "n"))),
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IOStandard(iostandard)
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iostandard(j)
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) for i, j, sig in [
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(5, eem, "ldac_n"),
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(6, eem, "busy"),
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@ -353,7 +354,7 @@ class Zotino(_EEM):
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]
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@classmethod
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def add_std(cls, target, eem, ttl_out_cls, iostandard="LVDS_25"):
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def add_std(cls, target, eem, ttl_out_cls, iostandard=default_iostandard):
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cls.add_extension(target, eem, iostandard=iostandard)
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spi_phy = spi2.SPIMaster(target.platform.request("zotino{}_spi_p".format(eem)),
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@ -378,29 +379,29 @@ class Zotino(_EEM):
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class Grabber(_EEM):
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@staticmethod
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def io(eem, eem_aux, iostandard="LVDS_25"):
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def io(eem, eem_aux, iostandard):
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ios = [
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("grabber{}_video".format(eem), 0,
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Subsignal("clk_p", Pins(_eem_pin(eem, 0, "p"))),
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Subsignal("clk_n", Pins(_eem_pin(eem, 0, "n"))),
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Subsignal("sdi_p", Pins(*[_eem_pin(eem, i, "p") for i in range(1, 5)])),
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Subsignal("sdi_n", Pins(*[_eem_pin(eem, i, "n") for i in range(1, 5)])),
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IOStandard(iostandard), Misc("DIFF_TERM=TRUE")
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iostandard(eem), Misc("DIFF_TERM=TRUE")
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),
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("grabber{}_cc0".format(eem), 0,
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Subsignal("p", Pins(_eem_pin(eem, 5, "p"))),
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Subsignal("n", Pins(_eem_pin(eem, 5, "n"))),
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IOStandard(iostandard)
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iostandard(eem)
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),
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("grabber{}_cc1".format(eem), 0,
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Subsignal("p", Pins(_eem_pin(eem, 6, "p"))),
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Subsignal("n", Pins(_eem_pin(eem, 6, "n"))),
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IOStandard(iostandard)
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iostandard(eem)
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),
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("grabber{}_cc2".format(eem), 0,
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Subsignal("p", Pins(_eem_pin(eem, 7, "p"))),
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Subsignal("n", Pins(_eem_pin(eem, 7, "n"))),
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IOStandard(iostandard)
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iostandard(eem)
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),
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]
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if eem_aux is not None:
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@ -410,28 +411,29 @@ class Grabber(_EEM):
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Subsignal("clk_n", Pins(_eem_pin(eem_aux, 0, "n"))),
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Subsignal("sdi_p", Pins(*[_eem_pin(eem_aux, i, "p") for i in range(1, 5)])),
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Subsignal("sdi_n", Pins(*[_eem_pin(eem_aux, i, "n") for i in range(1, 5)])),
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IOStandard(iostandard), Misc("DIFF_TERM=TRUE")
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iostandard(eem_aux), Misc("DIFF_TERM=TRUE")
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),
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("grabber{}_serrx".format(eem), 0,
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Subsignal("p", Pins(_eem_pin(eem_aux, 5, "p"))),
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Subsignal("n", Pins(_eem_pin(eem_aux, 5, "n"))),
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IOStandard(iostandard), Misc("DIFF_TERM=TRUE")
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iostandard(eem_aux), Misc("DIFF_TERM=TRUE")
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),
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("grabber{}_sertx".format(eem), 0,
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Subsignal("p", Pins(_eem_pin(eem_aux, 6, "p"))),
|
||||
Subsignal("n", Pins(_eem_pin(eem_aux, 6, "n"))),
|
||||
IOStandard(iostandard)
|
||||
iostandard(eem_aux)
|
||||
),
|
||||
("grabber{}_cc3".format(eem), 0,
|
||||
Subsignal("p", Pins(_eem_pin(eem_aux, 7, "p"))),
|
||||
Subsignal("n", Pins(_eem_pin(eem_aux, 7, "n"))),
|
||||
IOStandard(iostandard)
|
||||
iostandard(eem_aux)
|
||||
),
|
||||
]
|
||||
return ios
|
||||
|
||||
@classmethod
|
||||
def add_std(cls, target, eem, eem_aux=None, eem_aux2=None, ttl_out_cls=None, iostandard="LVDS_25"):
|
||||
def add_std(cls, target, eem, eem_aux=None, eem_aux2=None, ttl_out_cls=None,
|
||||
iostandard=default_iostandard):
|
||||
cls.add_extension(target, eem, eem_aux, iostandard=iostandard)
|
||||
|
||||
pads = target.platform.request("grabber{}_video".format(eem))
|
||||
@ -469,7 +471,7 @@ class Grabber(_EEM):
|
||||
|
||||
class SUServo(_EEM):
|
||||
@staticmethod
|
||||
def io(*eems, iostandard="LVDS_25"):
|
||||
def io(*eems, iostandard):
|
||||
assert len(eems) in (4, 6)
|
||||
io = (Sampler.io(*eems[0:2], iostandard=iostandard)
|
||||
+ Urukul.io_qspi(*eems[2:4], iostandard=iostandard))
|
||||
@ -480,7 +482,7 @@ class SUServo(_EEM):
|
||||
@classmethod
|
||||
def add_std(cls, target, eems_sampler, eems_urukul,
|
||||
t_rtt=4, clk=1, shift=11, profile=5,
|
||||
iostandard="LVDS_25"):
|
||||
iostandard=default_iostandard):
|
||||
"""Add a 8-channel Sampler-Urukul Servo
|
||||
|
||||
:param t_rtt: upper estimate for clock round-trip propagation time from
|
||||
@ -562,21 +564,21 @@ class SUServo(_EEM):
|
||||
|
||||
class Mirny(_EEM):
|
||||
@staticmethod
|
||||
def io(eem, iostandard="LVDS_25"):
|
||||
def io(eem, iostandard):
|
||||
ios = [
|
||||
("mirny{}_spi_p".format(eem), 0,
|
||||
Subsignal("clk", Pins(_eem_pin(eem, 0, "p"))),
|
||||
Subsignal("mosi", Pins(_eem_pin(eem, 1, "p"))),
|
||||
Subsignal("miso", Pins(_eem_pin(eem, 2, "p"))),
|
||||
Subsignal("cs_n", Pins(_eem_pin(eem, 3, "p"))),
|
||||
IOStandard(iostandard),
|
||||
iostandard(eem),
|
||||
),
|
||||
("mirny{}_spi_n".format(eem), 0,
|
||||
Subsignal("clk", Pins(_eem_pin(eem, 0, "n"))),
|
||||
Subsignal("mosi", Pins(_eem_pin(eem, 1, "n"))),
|
||||
Subsignal("miso", Pins(_eem_pin(eem, 2, "n"))),
|
||||
Subsignal("cs_n", Pins(_eem_pin(eem, 3, "n"))),
|
||||
IOStandard(iostandard),
|
||||
iostandard(eem),
|
||||
),
|
||||
]
|
||||
for i in range(4):
|
||||
@ -584,12 +586,12 @@ class Mirny(_EEM):
|
||||
("mirny{}_io{}".format(eem, i), 0,
|
||||
Subsignal("p", Pins(_eem_pin(eem, 4 + i, "p"))),
|
||||
Subsignal("n", Pins(_eem_pin(eem, 4 + i, "n"))),
|
||||
IOStandard(iostandard)
|
||||
iostandard(eem)
|
||||
))
|
||||
return ios
|
||||
|
||||
@classmethod
|
||||
def add_std(cls, target, eem, ttl_out_cls, iostandard="LVDS_25"):
|
||||
def add_std(cls, target, eem, ttl_out_cls, iostandard=default_iostandard):
|
||||
cls.add_extension(target, eem, iostandard=iostandard)
|
||||
|
||||
phy = spi2.SPIMaster(
|
||||
@ -607,7 +609,7 @@ class Mirny(_EEM):
|
||||
|
||||
class Fastino(_EEM):
|
||||
@staticmethod
|
||||
def io(eem, iostandard="LVDS_25"):
|
||||
def io(eem, iostandard):
|
||||
return [
|
||||
("fastino{}_ser_{}".format(eem, pol), 0,
|
||||
Subsignal("clk", Pins(_eem_pin(eem, 0, pol))),
|
||||
@ -615,11 +617,11 @@ class Fastino(_EEM):
|
||||
for i in range(1, 7)))),
|
||||
Subsignal("miso", Pins(_eem_pin(eem, 7, pol)),
|
||||
Misc("DIFF_TERM=TRUE")),
|
||||
IOStandard(iostandard),
|
||||
iostandard(eem),
|
||||
) for pol in "pn"]
|
||||
|
||||
@classmethod
|
||||
def add_std(cls, target, eem, log2_width, iostandard="LVDS_25"):
|
||||
def add_std(cls, target, eem, log2_width, iostandard=default_iostandard):
|
||||
cls.add_extension(target, eem, iostandard=iostandard)
|
||||
|
||||
phy = fastino.Fastino(target.platform.request("fastino{}_ser_p".format(eem)),
|
||||
@ -631,7 +633,7 @@ class Fastino(_EEM):
|
||||
|
||||
class Phaser(_EEM):
|
||||
@staticmethod
|
||||
def io(eem, iostandard="LVDS_25"):
|
||||
def io(eem, iostandard):
|
||||
return [
|
||||
("phaser{}_ser_{}".format(eem, pol), 0,
|
||||
Subsignal("clk", Pins(_eem_pin(eem, 0, pol))),
|
||||
@ -639,11 +641,11 @@ class Phaser(_EEM):
|
||||
for i in range(1, 7)))),
|
||||
Subsignal("miso", Pins(_eem_pin(eem, 7, pol)),
|
||||
Misc("DIFF_TERM=TRUE")),
|
||||
IOStandard(iostandard),
|
||||
iostandard(eem),
|
||||
) for pol in "pn"]
|
||||
|
||||
@classmethod
|
||||
def add_std(cls, target, eem, iostandard="LVDS_25"):
|
||||
def add_std(cls, target, eem, iostandard=default_iostandard):
|
||||
cls.add_extension(target, eem, iostandard=iostandard)
|
||||
|
||||
phy = phaser.Phaser(
|
||||
|
||||
Loading…
Reference in New Issue
Block a user