mirror of
https://github.com/m-labs/artiq.git
synced 2024-12-05 01:36:39 +08:00
Robert Jördens
50b4eb4840
* master: (26 commits) fastino: documentation and eem pass-through kasli2: forward sma_clkin to si5324 test: relax test_dma_playback_time on Zynq rpc: fixed _write_bool fastino: document/cleanup build_soc: remove assertion that was used for test runs metlino_sayma_ttl: Fix RTIO frequency & demo code (#1516) Revert "test: temporarily disable test_async_throughput" build_soc: rename identifier_str to gateware_identifier_str test: relax loopback gate timing test: temporarily disable test_async_throughput test: relax test_pulse_rate on Zynq test: skip NonexistentI2CBus if I2C is not supported build_soc: override identifier_str only for gateware examples: add Metlino master, Sayma satellite with TTLOuts via FMC sayma_amc: add support for 4x DIO output channels via FMC fmcdio_vhdci_eem: fix pin naming build_soc: add identifier_str override option RPC: optimization by caching test: improved test_performance ... |
||
|---|---|---|
| .. | ||
| applets | ||
| browser | ||
| compiler | ||
| coredevice | ||
| dashboard | ||
| examples | ||
| firmware | ||
| frontend | ||
| gateware | ||
| gui | ||
| language | ||
| master | ||
| sim | ||
| test | ||
| wavesynth | ||
| __init__.py | ||
| _version.py | ||
| appdirs.py | ||
| build_soc.py | ||
| experiment.py | ||
| remoting.py | ||
| tools.py | ||