phaser: fix oscillator rtio address for even base addresses

close #1580
2021-01-19 16:56:45 +01:00 · 2021-01-19 16:56:45 +01:00 · 261870bdee
parent 641f8bcdd6
commit 261870bdee
1 changed files with 1 additions and 1 deletions
--- a/artiq/coredevice/phaser.py
+++ b/artiq/coredevice/phaser.py
@ -928,7 +928,7 @@ class PhaserOscillator:
        :param clr: Clear the phase accumulator (persistent)
        """
        data = (asf & 0x7fff) | ((clr & 1) << 15) | (pow << 16)
-        rtio_output(self.base_addr | (1 << 8), data)
+        rtio_output(self.base_addr + (1 << 8), data)

    @kernel
    def set_amplitude_phase(self, amplitude, phase=0., clr=0):