kc705: simplify DRTIO master & satellite

* KC705 master: user can no longer choose whether or not the SMA acts as the 2nd DRTIO channel; SFP and SMA now act as the 1st and 2nd channel respectively by default.
* KC705 satellite: user should now use `--sma` to enable using the SMA as the satellite channel; SFP acts as the satellite channel by default.

artiq/gateware/targets/kc705_drtio_master.py

@@ -30,7 +30,7 @@ class Master(MiniSoC, AMPSoC):
     }
     mem_map.update(MiniSoC.mem_map)
 
-    def __init__(self, gateware_identifier_str=None, drtio_sma=False, **kwargs):
+    def __init__(self, gateware_identifier_str=None, **kwargs):
         MiniSoC.__init__(self,
                          cpu_type="or1k",
                          sdram_controller_type="minicon",
@@ -52,11 +52,12 @@ class Master(MiniSoC, AMPSoC):
         platform = self.platform
 
         self.comb += platform.request("sfp_tx_disable_n").eq(1)
-        tx_pads = [platform.request("sfp_tx")]
-        rx_pads = [platform.request("sfp_rx")]
-        if drtio_sma:
-            tx_pads.append(platform.request("user_sma_mgt_tx"))
-            rx_pads.append(platform.request("user_sma_mgt_rx"))
+        tx_pads = [
+            platform.request("sfp_tx"), platform.request("user_sma_mgt_tx")
+        ]
+        rx_pads = [
+            platform.request("sfp_rx"), platform.request("user_sma_mgt_rx")
+        ]
 
         # 1000BASE_BX10 Ethernet compatible, 125MHz RTIO clock
         self.submodules.drtio_transceiver = gtx_7series.GTX(
@@ -169,14 +170,9 @@ def main():
     builder_args(parser)
     soc_kc705_args(parser)
     parser.set_defaults(output_dir="artiq_kc705/master")
-    parser.add_argument("--drtio-sma", default=False, action="store_true",
-        help="use the SMA connectors (RX: J17, J18, TX: J19, J20) as 2nd DRTIO channel")
     args = parser.parse_args()
 
-    argdict = dict()
-    argdict["drtio_sma"] = args.drtio_sma
-
-    soc = Master(**soc_kc705_argdict(args), **argdict)
+    soc = Master(**soc_kc705_argdict(args))
     build_artiq_soc(soc, builder_argdict(args))
 
 

artiq/gateware/targets/kc705_drtio_satellite.py

@@ -31,15 +31,13 @@ class Satellite(BaseSoC):
     }
     mem_map.update(BaseSoC.mem_map)
 
-    def __init__(self, gateware_identifier_str=None, drtio_sat="sfp", **kwargs):
+    def __init__(self, gateware_identifier_str=None, sma_as_sat=False, **kwargs):
         BaseSoC.__init__(self,
                  cpu_type="or1k",
                  sdram_controller_type="minicon",
                  l2_size=128*1024,
                  integrated_sram_size=8192,
                  **kwargs)
-        assert drtio_sat in ["sfp", "sma"]
-
         add_identifier(self, gateware_identifier_str=gateware_identifier_str)
 
         if isinstance(self.platform.toolchain, XilinxVivadoToolchain):
@@ -58,7 +56,7 @@ class Satellite(BaseSoC):
         rx_pads = [
             platform.request("sfp_rx"), platform.request("user_sma_mgt_rx")
         ]
-        if drtio_sat == "sma":
+        if sma_as_sat:
             tx_pads = tx_pads[::-1]
             rx_pads = rx_pads[::-1]
 
@@ -184,13 +182,13 @@ def main():
     builder_args(parser)
     soc_kc705_args(parser)
     parser.set_defaults(output_dir="artiq_kc705/satellite")
-    parser.add_argument("--drtio-sat", default="sfp",
-        help="use the SFP or the SMA connectors (RX: J17, J18, TX: J19, J20) "
-             "as DRTIO satellite channel (choices: sfp, sma; default: sfp)")
+    parser.add_argument("--sma", default=False, action="store_true",
+        help="use the SMA connectors (RX: J17, J18, TX: J19, J20) "
+             "as DRTIO satellite channel instead of the SFP")
     args = parser.parse_args()
 
     argdict = dict()
-    argdict["drtio_sat"] = args.drtio_sat
+    argdict["sma_as_sat"] = args.sma
 
     soc = Satellite(**soc_kc705_argdict(args), **argdict)
     build_artiq_soc(soc, builder_argdict(args))