M-Labs/artiq
2
0
Fork 2
mirror of https://github.com/m-labs/artiq.git synced 2024-12-29 05:03:34 +08:00
Code Issues Projects Releases Wiki Activity

ad9910: fix type annotations

Browse Source
This commit is contained in:
Sebastien Bourdeauducq 2021-08-05 11:30:54 +08:00
parent 1e869aedd3
commit c3d765f745
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
artiq/coredevice/ad9910.py
View File

@ -324,7 +324,7 @@ class AD9910:
self.bus.write(data_low)
@kernel
def write_ram(self, data: TList(int32)):
def write_ram(self, data: TList(TInt32)):
"""Write data to RAM.
The profile to write to and the step, start, and end address
@ -345,7 +345,7 @@ class AD9910:
self.bus.write(data[len(data) - 1])
@kernel
def read_ram(self, data: TList(int32)):
def read_ram(self, data: TList(TInt32)):
"""Read data from RAM.
The profile to read from and the step, start, and end address