Phaser: expose and automate clearing of DAC `sif_sync` (close #1630 and #1650)

`sif_sync` must be triggered to apply NCO frequency changes. To achieve per
channel frequency tunability exeeding the range of the DUC, the NCO frequeny must
adjusted. User code will need to trigger `sif_sync` to achieve this.

`sif_sync` can only be triggered if the bit was cleared. To avoid this pitfall,
the clearing of `sif_sync` is automated.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
pull/1657/head
Marius Weber 2021-04-02 16:19:22 +01:00
parent 1c96797de5
commit 75445fe5f0
2 changed files with 14 additions and 1 deletions

View File

@ -110,7 +110,7 @@ class DAC34H84:
syncsel_mixercd = 0b1001 # sif_sync and register write
syncsel_nco = 0b1000 # sif_sync
syncsel_fifo_input = 0b10 # external lvds istr
sif_sync = 1
sif_sync = 0
syncsel_fifoin = 0b0010 # istr
syncsel_fifoout = 0b0100 # ostr

View File

@ -229,6 +229,8 @@ class Phaser:
for data in self.dac_mmap:
self.dac_write(data >> 16, data)
delay(40*us)
self.dac_sync()
delay(40*us)
# pll_ndivsync_ena disable
config18 = self.dac_read(0x18)
@ -556,6 +558,15 @@ class Phaser:
"""
return self.dac_read(0x06, div=257) >> 8
@kernel
def dac_sync(self):
"""Trigger DAC synchronisation for both output channels.
If the DAC-NCO is enabled, this applies NCO frequency changes."""
config1f = self.dac_read(0x1f)
delay(.1*ms)
self.dac_write(0x1f, config1f & ~int32(1 << 1))
self.dac_write(0x1f, config1f | (1 << 1))
@kernel
def get_dac_alarms(self):
"""Read the DAC alarm flags.
@ -768,6 +779,7 @@ class PhaserChannel:
@kernel
def set_nco_frequency_mu(self, ftw):
"""Set the NCO frequency.
The frequency is only applied after DAC synchronisation.
:param ftw: NCO frequency tuning word (32 bit)
"""
@ -777,6 +789,7 @@ class PhaserChannel:
@kernel
def set_nco_frequency(self, frequency):
"""Set the NCO frequency in SI units.
The frequency is only applied after DAC synchronisation.
:param frequency: NCO frequency in Hz (passband from -400 MHz
to 400 MHz, wrapping around at +- 500 MHz)