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Commit Graph

6262 Commits

Author SHA1 Message Date
4398a2d5fa test: relax loopback gate timing 2020-09-01 17:50:09 +08:00
f0289d49ab test: temporarily disable test_async_throughput
M-Labs/artiq-zynq#104
2020-09-01 17:49:40 +08:00
8d5dc0ad2a test: relax test_pulse_rate on Zynq 2020-09-01 17:08:26 +08:00
f294d039b3 test: skip NonexistentI2CBus if I2C is not supported 2020-09-01 16:47:04 +08:00
91df3d7290 build_soc: override identifier_str only for gateware 2020-09-01 10:46:39 +08:00
3d84135810 examples: add Metlino master, Sayma satellite with TTLOuts via FMC 2020-08-31 16:21:45 +08:00
dfbf3311cb sayma_amc: add support for 4x DIO output channels via FMC 2020-08-31 16:21:45 +08:00
1ad9deaf91 fmcdio_vhdci_eem: fix pin naming 2020-08-31 16:21:45 +08:00
45ae6202c0 build_soc: add identifier_str override option
Signed-off-by: Stephan Maka <stephan@spaceboyz.net>
2020-08-31 11:48:58 +08:00
272dc5d36a phaser: documentation 2020-08-28 16:36:44 +00:00
b2572003ac RPC: optimization by caching
This reduced the calls needed for socket send/recv.
2020-08-28 14:58:34 +08:00
69f0699ebd test: improved test_performance
1. Added tests for small payload.
2. Added statistics.
2020-08-28 14:58:34 +08:00
7cf974a6a7 comm_kernel: fix typo 2020-08-28 12:25:23 +08:00
68bfa04abb phaser: trf readback strobe spi changes 2020-08-27 15:31:42 +00:00
96fc248d7c phaser: synchronize multidds to frame 2020-08-27 14:28:19 +00:00
c10ac2c92a phaser: add trf, duc, interfaces, redo body assembly, use more natrual iq ordering (i lsb) 2020-08-27 14:26:09 +00:00
e5e2392240 phaser: wire up multidds 2020-08-26 17:12:41 +00:00
d1be1212ab phaser: coredevice shim, dds [wip] 2020-08-26 15:10:50 +00:00
aac2194759 Ported rpc changes to or1k 2020-08-26 14:17:06 +08:00
7181ff66a6 compiler: improved rpc performance for list and array
1. Removed duplicated tags before each elements.
2. Use numpy functions to speedup parsing.
2020-08-26 14:17:06 +08:00
cfddc13294 test: fixed test_performance
Added more tests and use normal rpc instead of async rpc.

Async RPC does not represent the real throughput which is limited by the
hardware and the network. Normal RPC which requires a response from the
remote is closer to real usecases.
2020-08-26 14:17:06 +08:00
20fcfd95e9 phaser: coredevice shim, readback fix 2020-08-24 15:46:31 +00:00
bcefb06e19 phaser: ddb template, split crc 2020-08-24 14:51:50 +00:00
11c9def589 phaser: readback delay, test fastlink 2020-08-24 14:49:36 +00:00
Paweł Kulik
eb350c3459 Drive SFP0 TX_DISABLE low during startup (as was in Kasli v1.1). Fixes Ethernet on SFP modules with pullup on this line.
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2020-08-24 21:39:53 +08:00
63e4b95325 fastlink: rework crc injection 2020-08-23 19:41:13 +00:00
a27a03ab3c fastlink: fix crc vs data width 2020-08-23 19:02:50 +00:00
7e584d0da1 fastino: use fastlink 2020-08-22 11:56:23 +00:00
3e99f1ce5a phaser: refactor link 2020-08-22 11:56:23 +00:00
a34a647ec4 phaser: refactor fastlink 2020-08-22 11:56:23 +00:00
aa0154d8e2 phaser: initial 2020-08-22 11:56:23 +00:00
5f6aa02b61 gui: unbreak background 2020-08-14 13:14:45 +08:00
David Nadlinger
69718fca90 gui: Improve fuzzy-select heuristics
Even though the code already used non-greedy wildcards before,
it would not find the shortest match, as earlier match starts
would still take precedence.

This could possibly be sped up a bit in CPython by doing
everything inside re using lookahead-assertion trickery, but the
current code is already imperceptibly fast for hundreds of
choices.
2020-08-14 02:13:45 +01:00
a46573e97a Revert "test: set uart log level to INFO for DMA tests"
This reverts commit b05cbcbc24.
2020-08-13 12:44:33 +08:00
b05cbcbc24 test: set uart log level to INFO for DMA tests 2020-08-13 12:24:57 +08:00
48008eaf5f test: omit unavailable math functions on OR1K 2020-08-12 15:01:13 +08:00
d8cd5023f6 runtime: expose more libm functions 2020-08-12 13:36:06 +08:00
David Nadlinger
c6f0c4dca4 test/coredevice: Ignore jagged 2D array embedding test for now 2020-08-10 00:23:38 +01:00
David Nadlinger
daf57969b2 compiler: Do not expand strings into TInt(8)s in array() 2020-08-09 23:46:45 +01:00
David Nadlinger
778f2cf905 compiler: Fix numpy.full, implement for >1D 2020-08-09 23:46:45 +01:00
David Nadlinger
53d64d08a8 compiler: Fix multi-dim slice error message test, tweak wording 2020-08-09 23:14:56 +01:00
David Nadlinger
d35f659d25 compiler: Add additional math fns available from Rust libm 2020-08-09 20:09:43 +01:00
David Nadlinger
a39bd69ca4 compiler: Implement numpy.rint() using llvm.round() 2020-08-09 19:44:58 +01:00
David Nadlinger
ae47d4c0ec test/coredevice: Add host/device consistency checks for NumPy math 2020-08-09 19:15:43 +01:00
David Nadlinger
8e262acd1e compiler: Slight array op implementation cleanup [nfc]
array_unaryop_funcs was never used; since the mangled names
are unique, a single dictionary would be nicer for overrides
anyway.s
2020-08-09 18:58:01 +01:00
David Nadlinger
33d931a5b7 compiler: Implement multi-dimensional indexing of arrays
This generates rather more code than necessary, but has
the advantage of automatically handling incomplete
multi-dimensional subscripts which still leave arrays
behind.
2020-08-09 17:08:43 +01:00
David Nadlinger
b00ba5ece1 compiler: Support explicit array(…, dtype=…) syntax 2020-08-09 17:08:43 +01:00
David Nadlinger
ad34df3de1 compiler: Support numpy.float
This would previously crash the compiler.
2020-08-09 17:08:43 +01:00
David Nadlinger
8783ba2072 compiler/firmware: RPCs for ndarrays 2020-08-09 17:08:43 +01:00
David Nadlinger
5472e830f6 compiler: Assume array()s are always rectangular 2020-08-09 03:54:42 +01:00
David Nadlinger
8eddb9194a test/lit: Add smoke test for math function broadcasting 2020-08-09 03:54:42 +01:00
David Nadlinger
1c645d8857 compiler: Unbreak quoting of 1D ndarrays
Lists and arrays no longer have the same representation all
the way through codegen, as used to be the case.

This could/should be made more efficient later, eliding the
temporary copies.
2020-08-09 03:54:42 +01:00
David Nadlinger
df8f1c5c5a compiler: Annotate math functions nounwind/nowrite 2020-08-09 03:54:42 +01:00
David Nadlinger
cc00ae9580 compiler: Implement broadcasting of math functions 2020-08-09 03:54:42 +01:00
David Nadlinger
be7d78253f compiler: Implement 1D-/2D- array transpose
Left generic transpose (shape order inversion) for now, as that
would be less ugly if we implement forwarding to Python function
bodies for array function implementations.

Needs a runtime test case.
2020-08-09 03:54:42 +01:00
David Nadlinger
faea886c44 compiler: Implement array vs. scalar broadcasting 2020-08-09 03:54:42 +01:00
David Nadlinger
56a872ccc0 compiler: Insert array binop shape check in caller for location information 2020-08-09 03:54:42 +01:00
David Nadlinger
ef260adca8 compiler: Implement matrix multiplication
LLVM will take care of optimising the loops. This was still
unnecessarily painful; implementing generics and implementing
this in ARTIQ Python looks very attractive right now.
2020-08-09 03:54:42 +01:00
David Nadlinger
0da4a61d99 compiler: Fix method name typo [nfc] 2020-08-09 03:54:42 +01:00
David Nadlinger
78afa2ea8e compiler: Support MatMult in inferencer
Still needs actual codegen support.
2020-08-09 03:54:42 +01:00
David Nadlinger
4d48470320 compiler: Support common numpy.* math functions
Relies on the runtime to provide the necessary
(libm-compatible) functions.

The test is nifty, but a bit brittle; if this breaks in the
future because of optimizer changes, do not hesitate to convert
this into a more pedestrian test case.
2020-08-09 03:54:41 +01:00
David Nadlinger
d37503f21d compiler: T{C -> External}Function, clarify docs [nfc] 2020-08-09 03:54:41 +01:00
David Nadlinger
da255bee1b compiler: Implement element type coercion for arrays
So far, this is not exposed to the user beyond implicit conversions.

Note that all the implicit conversions, such as triggered by adding
arrays of mismatching types, or dividing integer arrays, are currently
emitted in a maximally inefficient way, where a temporary copy is first
made for the type conversion. The conversions would more sensibly be
implemented during the per-element operations to save on the extra
copies, but the current behaviour fell out of the rest of the IR
generator structure without extra changes.
2020-08-09 03:54:41 +01:00
David Nadlinger
4426e4144f compiler: Implement unary plus/minus for arrays
Implementation is needlessly generic to anticipate
coercion/transcendental functions.
2020-08-09 03:54:41 +01:00
David Nadlinger
0d8fbd4f19 test/lit: Add a test for matrix binary operations
No reason to believe other operations won't work the same.
(More exhaustive tests to follow using embedding for comparison
against NumPy.)
2020-08-09 03:54:41 +01:00
David Nadlinger
7bdd6785b7 test/lit: Basic ndarray smoke tests for all binops 2020-08-09 03:54:41 +01:00
David Nadlinger
4d002c7934 compiler: Explain use of rpc_tag() in array ops, formatting [nfc] 2020-08-09 03:54:41 +01:00
David Nadlinger
a7e855b319 compiler.types: Change invalid default value [nfc]
This wasn't actually ever used, but was a dict instead of a set.
2020-08-09 03:54:41 +01:00
David Nadlinger
48fb80017f compiler: Implement basic element-wise array operations 2020-08-09 03:54:41 +01:00
David Nadlinger
9af6e5747d compiler: Factor rpc_tag() out of llvm_ir_generator 2020-08-09 03:54:41 +01:00
David Nadlinger
e77c7d1c39 compiler: Add inferencer support for array operations 2020-08-09 03:54:41 +01:00
David Nadlinger
ef57cad1a3 compiler: Test ndarray element assignment 2020-08-09 03:54:41 +01:00
David Nadlinger
a9a975e5d4 language: Allow instantating TArray using bare ints 2020-08-09 03:54:41 +01:00
David Nadlinger
504b8f0148 language: Export TArray 2020-08-09 03:54:41 +01:00
David Nadlinger
dea3c0c572 compiler: Don't store redundant ndarray buffer length, match list layout
This adds `elt` to _TPointer and the ir.Offset IR instruction,
which is like GetElem but without the final load.
2020-08-09 03:54:41 +01:00
David Nadlinger
e82357d180 compiler: Fix inferencer tests after adding TArray.num_dims 2020-08-09 03:54:41 +01:00
David Nadlinger
cb1cadb46a compiler: Fix/test 1D array construction from generic iterables 2020-08-09 03:54:41 +01:00
David Nadlinger
38c17622cc compiler: Axis-wise iteration of ndarrays
Matches NumPy. Slicing a TList reallocates, this doesn't; offsetting
couldn't be handled in the IR without introducing new semantics
(the Alloc kludge; could/should be made its own IR type).
2020-08-09 03:54:41 +01:00
David Nadlinger
c95a978ab6 compiler: Iteration for 1D ndarrays 2020-08-09 03:54:41 +01:00
David Nadlinger
bc17bb4d1a compiler: Parametrize TArray in number of dimensions 2020-08-09 03:54:41 +01:00
David Nadlinger
632c5bc937 compiler: Add ndarray .shape access 2020-08-09 03:54:41 +01:00
David Nadlinger
40f59561f2 compiler: Add test for length of empty arrays [nfc]
This makes sure we are actually emitting this as an 1D array
(like NumPy does).
2020-08-09 03:54:41 +01:00
David Nadlinger
d882f8a3f0 compiler: Implement len() for ndarrays 2020-08-09 03:54:41 +01:00
David Nadlinger
575be2aeca compiler: Basic support for creation of multidimensional arrays
Breaks all uses of array(), as indexing is not yet implemented.
2020-08-09 03:54:41 +01:00
David Nadlinger
56010c49fb compiler/inferencer: Detect rectangular array()s
Still needs support through all the rest of the compiler, and
support for higher-dimensional arrays.

Alternatively, we could always assume ndarrays of ndarrays
are rectangular (i.e. ban array/list element types), and
detect mismatch at runtime. This might turn out to be
preferrable to be able to construct matrices from rows/columns.

`array()` is disallowed for no particularly good reason but
numpy API compatibility.
2020-08-09 03:54:41 +01:00
David Nadlinger
6ea836183d test/lit: Move some list tests to appropriate module [nfc] 2020-08-09 03:54:41 +01:00
pmldrmota
1df62862cd
AD9910: Write correct number of bits to POW register (#1498)
* coredevice.ad9910: Add return type hints to conversion functions

* coredevice.ad9910: Make set_pow write correct number of bits
The AD9910 expects 16 bits. Thus, if writing 32 bits to the POW register, the chip would likely enter a locked-up state.

* coredevice.ad9910: Correct data alignment in write_16

Co-authored-by: Robert Jördens <rj@quartiq.de>

* coredevice.ad9910: Add function to read from 16 bit registers

Co-authored-by: drmota <peter.drmota@physics.ox.ac.uk>
Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-08-07 10:10:44 +02:00
504f72a02c rtio: remove legacy i_overflow_reset CSR 2020-08-06 17:52:32 +08:00
5f36e49f91 test_rtio: make DMA test generic wrt TTL channel 2020-08-06 16:36:14 +08:00
3bfd372c20 compiler: linker discard local symbols.
Fixes exception backtrace problem for ARM.
2020-08-06 16:07:28 +08:00
e3c5775584 test: skip CacheTest.test_borrow on Zynq 2020-08-06 10:54:30 +08:00
David Nadlinger
ae999db8f6 compiler: Revert function call lifetime tracking fix
This reverts commits f8d1506922
and cf19c9512d.

While the commit just fixes a clear typo in the implementation,
it turns out the original algorithm isn't flexible enough to
capture functions that transitively return references to
long-lived data. For instance, while cache_get() is special-cased
in the compiler to be recognised as returning a value of Global()
lifetime, a function just forwarding to it (as seen in the
embedding tests) isn't anymore.

A separate issue is also that this makes implementing functions
that take lists and return references to global data in user code
impossible, which central parts of the Oxford codebase rely on.

Just reverting for now to unblock master; a fix is easily designed,
but needs testing.
2020-07-30 16:40:39 +01:00
709026d945 test: relax device_to_host_rate 2020-07-30 17:46:22 +08:00
455e4859b7 simplify versioneer
Original version is very complex and still has a number of problems.
2020-07-30 00:54:07 +08:00
5fd0d0bbb6 gui: work around quamash bug with python 3.8 2020-07-28 12:08:47 +08:00
David Nadlinger
f8d1506922 compiler: Fix lifetime tracking for function call return values
GitHub: Fixes #1497.
2020-07-28 00:33:28 +01:00
cw-mlabs
e4b16428f5 wrpll: fix run signal 2020-07-27 13:02:02 +08:00
cw-mlabs
8dd9a6d024 wrpll: fix scl signal 2020-07-27 12:59:32 +08:00
Charles Baynham
9b44ec7bc6 parameters: Allow forcing a NumberValue to return a float
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2020-07-27 12:25:51 +08:00
David Nadlinger
1c72585c1b compiler: Handle None-returning function calls used as values
GitHub: Fixes #1493.
2020-07-25 02:20:53 +01:00
David Nadlinger
57e759a1ed compiler: Consistently use llunit through llvm_ir_generator [nfc] 2020-07-25 02:20:52 +01:00
2a2f5c4d58 comm_analyzer: make header error flag more general 2020-07-20 19:39:19 +08:00
553a49e194 test_moninj: set loop_out as output 2020-07-19 17:59:43 +08:00
8510bf4e55 test_analyzer: configure loop_out as output 2020-07-16 19:28:58 +08:00
eb28d7be3a firmware/rpc: fixed typo 2020-07-16 15:15:47 +08:00
f78d673079 firmware/rpc: added #[repr(C)] for structs.
Previously the structs are in repr(Rust) which has no layout guarantee.
2020-07-16 15:11:17 +08:00
e31ee1f0b3 firmware/i2c: rewrite I2C implementation
* Never drive SDL or SDA high. They are specified to be open
  collector/drain and pulled up by resistive pullups. Driving
  high fails miserably in a multi-master topology (e.g. with
  a USB I2C interface). It would only ever be implemented to
  speed up the bus actively but that's tricky and completely
  unnecessary here.
* Make the handover states between the I2C protocol phases (start, stop,
  restart, write, read) well defined. Add comments stressing those
  pre/postconditions.
* Add checks for SDA arbitration failures and stuck SCL.
* Remove wrong, misleading or redundant comments.
2020-07-15 16:43:07 +08:00
4340a5cfc1 rtio/dma: fix previous commit 2020-07-12 10:14:22 +08:00
f2e0d27334 rtio/dma: remove dead/broken code 2020-07-12 10:13:18 +08:00
901be75ba4 sayma_rtm: fix Si5324 reset
Closes #1483
2020-07-11 09:51:01 +08:00
8719bab726 Revert "i2c: duplicate TCA9548 control byte"
This reverts commit f265976df6.
2020-07-08 19:02:02 +08:00
f273a9aacc artiq_ddb_template: remove SFP LEDs on hw 2.0+ 2020-07-08 18:15:36 +08:00
2d1f1fff7f kasli_generic: do not attempt to use SFP LED for RTIO on 2.0+ 2020-07-08 18:14:44 +08:00
85b5a04acf test: print transfer rates in MiB/s 2020-07-07 17:28:47 +08:00
13501115f6 test: remove watchdog test (#1458) 2020-07-07 17:28:47 +08:00
f265976df6 i2c: duplicate TCA9548 control byte 2020-07-03 16:45:05 +08:00
David Nadlinger
3f0cf6e683 runtime: Stop kernel CPU before restarting comms CPU on panic
Before, the system would enter a boot loop when a panic occurred
while the kernel CPU was active (and panic_reset == 1), as
kernel::start() for the startup kernel would panic.
2020-07-01 17:29:05 +08:00
95807234d9 compiler: use binutils for ARM
This is mostly due to Windoze, where installing anything is a PITA and the LLVM tools won't be available soon.
2020-06-28 17:33:03 +08:00
89c53c35e8 dashboard: style 2020-06-26 10:12:03 +08:00
David Nadlinger
f36692638c dashboard: Add "Quick Open" dialog for experiments on global shortcut
This is similar to functionality in Sublime Text, VS Code, etc.
2020-06-26 10:11:33 +08:00
David Nadlinger
966ed5d013 master/scheduler: Fix priority/due date precedence order when waiting to prepare
See test case – previously, the highest-priority pending run would
be used to calculate the timeout, rather than the earliest one.

This probably managed to go undetected for that long as any unrelated
changes to the pipeline (e.g. new submissions, or experiments pausing)
would also cause _get_run() to be re-evaluated.
2020-06-19 23:45:52 +01:00
David Nadlinger
7955b63b00 master: Always write results to HDF5 once run stage is reached
Previously, a significant risk of losing experimental results would
be associated with long-running experiments, as any stray exceptions
while run()ing the experiment – for instance, due to infrequent
network glitches or hardware reliability issue – would cause no
HDF5 file to be written. This was especially troublesome as long
experiments would suffer from a higher probability of unanticipated
failures, while at the same time being more costly to re-take in
terms of wall-clock time.

Unanticipated uncaught exceptions like that were enough of an issue
that several Oxford codebases had come up with their own half-baked
mitigation strategies, from swallowing all exceptions in run() by
convention, to always broadcasting all results to uniquely named
datasets such that the partial results could be recovered and written
to HDF5 by manually run recovery experiments.

This commit addresses the problem at its source, changing the worker
behaviour such that an HDF5 file is always written as soon as run()
starts.
2020-06-18 17:47:26 +01:00
David Nadlinger
d87042597a master/worker_impl: Factor out "completed" message sending [nfc]
Just reduces the visual complexity/potential for typos a bit, and
we already have put_exception_report().
2020-06-18 01:30:46 +01:00
charlesbaynham
2429a266f6
ad9912: Fix typing problem on ad9912 (#1466)
Closes #1463

FTW and phase word were ambiguously typed, resulting in failure to compile
2020-06-16 20:17:22 +02:00
Harry Ho
1a17d0c869 zotino: add USER LED test 2020-06-11 16:03:56 +08:00
Harry Ho
6156bd4088 fastino: add tests using DACs and USER LEDs 2020-06-11 14:55:46 +08:00
a18d2468e9 test: do not build libartiq_support in lit.cfg 2020-06-10 17:15:24 +08:00
9822b88d9b
ad9910: fix asf range (#1450)
* ad9910: fix asf range

The ASF is a 14-bit word. The highest possible value is 0x3fff, not
0x3ffe. `int(round(1.0 * 0x3fff)) == 0x3fff`.

I don't remember and understand why this was 0x3ffe since the beginning.
0x3fff was already used as a default in `set_mu()`

Signed-off-by: Robert Jördens <rj@quartiq.de>

* RELEASE_NOTES: ad9910 asf scale change

Co-authored-by: David Nadlinger <code@klickverbot.at>
2020-05-29 11:13:26 +02:00
cb76f9da89 metlino: fix CSR collisions
Closes #1425
2020-05-29 15:59:44 +08:00
bd9eec15c0 metlino: increase number of DRTIO links
Seems OK with Vivado 2019.2.
2020-05-29 15:59:16 +08:00
d5c1eaa16e runtime: remove stack alignment requirement
I suppose this was for TMPU, but was never finished.
2020-05-29 15:37:23 +08:00
02900d79d0 firmware: fix typos 2020-05-29 15:21:07 +08:00
d8b5bcf019 sayma_amc: support uTCA backplane for DRTIO 2020-05-29 14:58:49 +08:00
8b939b7cb3 sayma_amc: remove Master (obsoleted by Metlino) 2020-05-29 14:40:49 +08:00
Charles Baynham
692c466838 Use logger formatting 2020-05-26 17:59:55 +08:00
Charles Baynham
8858ba8095 dashboard: Restart applets if required
Restart applets that are already running if a ccb call updates their spec

Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2020-05-26 17:59:55 +08:00
2538840756
Coredevice Input Validation (#1447)
* Input validation and masking of SI -> mu conversions (close #1446)

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* Update RELEASE_NOTES

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

Co-authored-by: Robert Jördens <rj@quartiq.de>
2020-05-17 15:09:11 +02:00
b3b6cb8efe
ad53xx improvements (#1445)
* ad53xx: voltage_to_mu() validation & documentation (closes #1443, #1444)
The voltage input (float) is checked for validity. If we need more
speed, we may want to check the DAC-code for over/underflow instead.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* ad53xx documentation: voltage_to_mu is only valid for 16-bit DACs

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* AD53xx: add voltage_to_mu method (closes #1341)

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* ad53xx: improve voltage_to_mu performance
Interger comparison is faster than floating point math.

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* AD53xx: voltage_to_mu method now uses attribute values

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* Fixup RELEASE_NOTES.rst

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>

* ad53xx: documentation improvements

voltage_to_mu return value
14-bit DAC support

Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2020-05-08 19:23:43 +02:00
4e9a529e5a kasli: integrate WRPLL 2020-05-07 21:34:02 +08:00
60e5f1c18e kasli: DRTIO support for Kasli 2 2020-05-07 20:09:43 +08:00
1f2182d4c7 kasli: default to hardware v2 2020-05-07 19:15:03 +08:00
35f1814235 kasli: implement virtual LEDs 2020-05-07 19:07:43 +08:00
b83afedf43 kasli: light up ERROR LED on panic 2020-05-07 19:06:10 +08:00
4982fde898 firmware: I2C I/O expander support 2020-05-05 21:38:17 +08:00
ef4e5bc69b firmware: Kasli I2C EEPROM cleanup 2020-05-05 21:29:29 +08:00
85e92ae28c compiler: use more LLVM tools on ARM (#733) 2020-04-28 16:21:50 +08:00
7e400a78f4 kasli: compile tester for hw 2.0 by default 2020-04-28 16:07:56 +08:00
140a26ad7e compiler: ld -> ld.lld 2020-04-28 16:07:26 +08:00
4228e0205c compiler: link with lld on ARM (#733) 2020-04-28 15:00:24 +08:00
3a7819704a rtio: support direct 64-bit now CSR in KernelInitiator 2020-04-26 16:04:32 +08:00
251a0101a6 compiler: support disabling now-pinning 2020-04-26 12:38:43 +08:00
d19f28fa84 kasli: v2 clocking WIP, remove SFP LEDs from RTIO 2020-04-23 23:02:18 +08:00
9bc43b2dbf kasli: support EEPROM on v2 2020-04-23 23:00:36 +08:00
77e6fdb7a7 artiq_flash: cleanup Sayma RTM management, support flashing AMC with RTM disconnected 2020-04-14 18:22:06 +08:00
ea79ba4622 ttl_serdes: detect edges on short pulses
Edges on pulses shorter than the RTIO period were missed because the
reference sample and the last sample of the serdes word are the same.

This change enables detection of edges on pulses as short as the
serdes UI (and shorter as long as the pulse still hits a serdes sample
aperture).

In any RTIO period, only the leading event corresponding to the first
edge with slope according to sensitivity is registerd. If the channel is
sensitive to both rising and falling edges and if the pulse is contained
within an RTIO period, or if it is sensitive only to one edge slope and
there are multiple pulses in an RTIO period, only the leading event is
seen. Thus this possibility of lost events is still there. Only the
conditions under which loss occurs are reduced.

In testing with the kasli-ptb6 variant, this also improves resource
usage (a couple hundred LUT) and timing (0.1 ns WNS).
2020-04-13 13:21:03 +02:00
e8b73876ab comm_kernel: add Zynq runtime identifier 2020-04-12 17:25:14 +08:00
de57039e6e comm_kernel: cleanup 2020-04-12 16:02:36 +08:00
9dc24f255e comm_kernel: remove dead code 2020-04-12 15:06:46 +08:00
fb0ade77a9 firmware: fix non-DRTIO build 2020-04-10 17:23:17 +08:00
ec7b2bea12 sayma: round FTW like Urukul in JDCGSyncDDS 2020-04-08 15:00:33 +08:00
0f4be22274 sayma: add simple sychronized DDS for testing 2020-04-08 14:13:54 +08:00
3c823a483a sayma: improve DAC sync messaging (again) 2020-04-06 22:36:43 +08:00
4d601c2102 sayma: improve DAC sync messaging 2020-04-06 22:36:03 +08:00
61d4614b61 sayma: fix/cleanup DRTIO-DAC sync interaction 2020-04-06 22:34:05 +08:00
facc0357d8 drtio: make sure receive buffer is drained after ping reply 2020-04-06 22:33:15 +08:00
ffd3172e02 sayma: move SYSREF DDMTD to RTM (#795) 2020-04-06 00:01:28 +08:00
8f608fa2fa examples/sines_urukul_sayma: adapt for sayma v2, use 1 DAC only 2020-04-05 16:51:40 +08:00
Etienne Wodey
90d08988b2 language/environment: BooleanValue: fix type detection
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-04-04 15:37:04 +08:00
Etienne Wodey
9b03a365ed language/environment: cast argument processor default values early
Fixes #1434. Also add unit tests for some argument processors.

Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-04-04 15:37:04 +08:00
4a8d361ace soc: optimize programmable identifier 2020-03-12 23:09:13 +08:00
9e66dd7075 soc: reprogrammable identifier 2020-03-12 22:23:08 +08:00
380de177e7 rtio: fix wide output after RTIO refactoring
fixes 3d0c3cc1cf
2020-03-05 17:55:27 +00:00
e803830b3b fastino: support wide RTIO interface and channel groups 2020-03-05 17:55:04 +00:00
8451e58fbe ad9912: fix ftw width docstring 2020-02-27 02:11:12 +08:00
Paweł K
2a909839ff
artiq_flash: added option of specifying another username when connecting through SSH. (#1429)
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2020-02-19 19:44:11 +08:00
6d26def3ce sayma: drive filtered_clk_sel on master variant 2020-02-06 22:28:49 +08:00
52ec849008 sayma: fix sysref_delay_dac 2020-02-05 19:04:01 +08:00
c7de1f2e6b metlino: drive clock muxes 2020-02-05 00:06:34 +08:00
bf9f4e380a si5324: program I2C mux on Metlino 2020-02-03 18:07:59 +08:00
ffb24e9fff artiq_flash: use correct proxy bitstream for Metlino 2020-02-03 18:07:26 +08:00
5f8e20b1a1 artiq_sinara_tester: fix device_db filename 2020-01-31 10:26:58 +08:00
dfa033eb87 wrpll: new collector from Weida/Tom 2020-01-24 10:31:52 +08:00
dee16edb78 wrpll: DDMTD sampler double latching 2020-01-22 19:16:26 +08:00
f4d8f77268 turn kasli_tester into a frontend tool 2020-01-21 16:13:04 +08:00
bfcbffcd8d update smoltcp
This disables the 'log' features which does not compile, and may break net_trace. To be investigated later.
2020-01-21 13:58:23 +08:00
82cdb7f933 typo 2020-01-21 10:07:13 +08:00
248230a89e fastino: style 2020-01-20 13:25:00 +01:00
c45a872cba fastino: fix init, set_cfg 2020-01-20 13:25:00 +01:00
2c4e5bfee4 fastino: add [WIP] 2020-01-20 13:25:00 +01:00
8f9948a1ff kasli_sawgmaster: add basemod programming example 2020-01-20 20:14:24 +08:00
e427aaaa66 basemod_att: fix imports 2020-01-20 20:14:24 +08:00
62a52cb086 sayma: do not pollute the log with DAC status on success 2020-01-20 20:14:24 +08:00
6b428ef3be sayma: initialize DAC before testing jesd::ready 2020-01-20 20:14:24 +08:00
7ab0282234 adf5355: style 2020-01-20 13:13:08 +01:00
9368c26d1c mirny: add to manual 2020-01-20 13:13:08 +01:00
Etienne Wodey
da531404e8 artiq_ddb_template: add Mirny support
Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-01-20 13:13:08 +01:00
01a6e77d89 mirny: add
* This targets unrelease CPLD gateware (https://github.com/quartiq/mirny/issues/1)
* includes initial coredevice driver, eem shims, and kasli_generic tooling
* addresses the ARTIQ side of #1130
* Register abstraction to be written

Signed-off-by: Robert Jördens <rj@quartiq.de>
2020-01-20 13:13:08 +01:00
ec03767dcf sayma: improve DAC status report 2020-01-20 18:22:06 +08:00
5c299de3b4 sayma: print DAC status on JESD not ready error 2020-01-20 18:21:29 +08:00
45efee724e sayma: add JESD204 PHY done diagnostics 2020-01-20 12:47:31 +08:00
6c3e71a83a wrpll: cleanup 2020-01-18 09:43:43 +08:00
344f8bd12a wrpll: collector patch from Weida 2020-01-18 09:42:58 +08:00
833f428391 sayma: fix hmc542 to/from mu 2020-01-16 09:10:32 +08:00
6c948c7726 sayma: RF switch control is active-low on Basemod, invert 2020-01-16 08:59:52 +08:00
50302d57c0 wrpll: more careful I2C timing 2020-01-14 20:03:46 +08:00
105dd60c78 wrpll: ADPLLProgrammer mini test bench and fixes 2020-01-14 16:52:25 +08:00
3242e9ec6c wrpll: loop test 2020-01-13 22:31:57 +08:00
8ec0f2e717 wrpll: implement ADPLLProgrammer 2020-01-13 22:30:11 +08:00
d5895b8999 wrpll: adpll -> set_adpll 2020-01-13 20:46:36 +08:00
e7ef23d30c wrpll: use CONFIG_CLOCK_FREQUENCY and rtio_frequency in trim_dcxos 2020-01-13 20:44:15 +08:00
ea3bce6fe3 wrpll: wait for settling time after setting ADPLL 2020-01-13 20:43:34 +08:00
d685619bcd wrpll: collector code modifications from Weida 2020-01-13 20:42:41 +08:00
9d7196bdb7 update copyright year 2020-01-13 19:33:44 +08:00
e87d864063 wrpll: print ADPLL offsets 2020-01-13 19:32:30 +08:00
8edbc33d0e wrpll: calculate initial ADPLL offsets 2020-01-13 19:29:10 +08:00
9dd011f4ad firmware: remove bitrotten Sayma code 2020-01-13 18:47:54 +08:00
583a18dd5f firmware: expose fmod to kernels. Closes #1417 2020-01-10 14:33:02 +08:00
David Nadlinger
d8c81d6d05 compiler: Other types microoptimisations
Interestingly enough, these actually seem to give a measurable
speedup (if small – about 1% improvement out of 6s whole-program
compile-time in one particular test case).

The previous implementation of is_mono() had also interesting
behaviour if `name` wasn't given; it would test only for the
presence of any keys specified via keyword arguments,
disregarding their values. Looking at uses across the current
ARTIQ codebase, I could neither find a case where this would
have actually been triggered, nor any rationale for it.

With the short-circuited implementation from this commit,
is_mono() now checks name/all of params against any specified
conditions.
2020-01-01 08:49:19 +00:00
David Nadlinger
2c34f0214b compiler: Short-circuit Type.unify() with identical other type
This considerably improves performance; ~15% in terms of total
artiq_run-to-kernel-compiled duration in one test case.
2020-01-01 08:49:19 +00:00
eebae01503 artiq_client: add back quiet-verbose args for submission
close #1416
regression introduced in 3fd6962
2019-12-31 13:00:26 +01:00
3f32d78c0e wrpll: simple ADPLL test 2019-12-31 12:12:29 +08:00
bb04b082a7 wrpll: clarify comment 2019-12-31 12:12:29 +08:00
David Nadlinger
1e864b7e2d coredevice/suservo: Add separate methods for setting only the IIR offset 2019-12-30 20:02:22 +00:00
a666766f38 wrpll: add ADPLL offset registers 2019-12-30 22:19:42 +08:00
5c6e394928 ddmtd: add collector 2019-12-30 22:17:44 +08:00
642a305c6a wrpll: remove unnecessary delay
Counting now happens in the sys domain with no CDC between counter and CPU.
2019-12-30 20:01:06 +08:00
f57f235dca wrpll: new frequency meter
As per Mattermost discussion with Tom.
2019-12-30 19:47:57 +08:00
9e15ff7e6a wrpll: improve DDMTD deglitcher 2019-12-30 16:56:06 +08:00
dfad27125e runtime: relax/fix TCP keepalive settings (#1125) 2019-12-23 19:58:10 +08:00
b5e1bd3fa2 coredevice: simplify/cleanup network connection code
This removes:
* host-side keepalive, which turns out not to be required
* custom connection timeout (the default is OK)
* SSH tunneling support (doesn't seem to be actually used anywhere)
2019-12-23 19:53:49 +08:00
David Nadlinger
af31c6ea21 coredevice: Don't use is to compare with integer literal
This works on CPython, but is not guaranteed to do so, and
produces a warning since 3.8 (see https://bugs.python.org/issue34850).
2019-12-22 05:46:41 +00:00
fb2076a026 basemod_att: add dB functions, document 2019-12-21 14:56:41 +08:00
b2480f0edc artiq_flash: update actions documentation 2019-12-21 14:18:28 +08:00
d4e039cede basemod: add coredevice driver 2019-12-21 14:18:10 +08:00
106d25b32a kasli_sawgmaster: fix drtio_is_up 2019-12-21 14:17:52 +08:00
8759c8d360 shiftreg: fix get method 2019-12-21 14:17:22 +08:00
c3030f4ffb kasli_sawgmaster: update device_db for BaseMod 2019-12-20 19:59:15 +08:00
cab8c8249e coredevice/shiftreg: add get method 2019-12-20 18:58:50 +08:00
b7f1623197 sayma_rtm: connect attenuator shift registers in series 2019-12-20 18:58:31 +08:00
c5137eeb62 firmware: remove legacy hmc542 code 2019-12-20 15:25:55 +08:00
1c9cbe6285 sayma_rtm: add basemod attenuators on RTIO 2019-12-20 15:25:55 +08:00
David Nadlinger
8f518c6b05 compiler: Allow None in type hints
Similar to how Python itself interprets None as type(None),
make it translate to TNone in ARTIQ compiler type hints.
2019-12-19 09:36:45 +08:00
David Nadlinger
594ff45750 compiler: Revert support for None as TNone
This was mistakenly included in fb2b634c4a, and broke the test
case verifying that using None as an ARTIQ type annotation in fact
generates an error message.
2019-12-18 13:23:40 +00:00
David Nadlinger
fb2b634c4a compiler, language: Implement @kernel_from_string
With support for polymorphism (or type erasure on pointers to
member functions) being absent in the ARTIQ compiler, code
generation is vital to be able to implement abstractions that
work with user-provided lists/trees of objects with uniform
interfaces (e.g. a common base class, or duck typing), but
different concrete types.

@kernel_from_string has been in production use for exactly
this use case in Oxford for the better part of a year now
(various places in ndscan).

GitHub: Fixes #1089.
2019-12-18 10:51:04 +08:00
6ee15fbcae sayma_rtm: basemod RF switches 2019-12-18 10:33:29 +08:00
David Nadlinger
d3508b014f firmware: Add whitespace between panic handler location and message 2019-12-17 19:59:59 +00:00
David Nadlinger
0279a60a55 examples: Add README
This will be displayed by GitHub below the directory listing, and was
inspired by observing new users disregard the examples/ tree entirely
(even though the experiments and device DBs within would have cleared
up their getting-started confusion) due to the perceived complexity
wall induced by the wealth of subdirectories.
2019-12-17 13:35:19 +00:00
8d13aeb96c test: run test_help for browser and dashboard 2019-12-12 10:34:58 +08:00
ac09f3a5da artiq_browser: fix command line argument handling. Closes #1404 2019-12-11 16:18:56 +08:00
52112d54f9 kasli_generic: expose peripheral_processors dictionary. Closes #1403 2019-12-10 10:30:06 +08:00
6f52540569 wrpll: fix previous commit 2019-12-09 20:13:55 +08:00
13486f3acf wrpll: swap helper/main si549 frequencies 2019-12-09 19:49:34 +08:00
150a02117c sayma_rtm: drive clk_src_ext_sel 2019-12-09 19:47:50 +08:00
307a6ca140 gth_ultrascale: make OBUFDS_GTE3 work
https://www.xilinx.com/support/answers/67919.html
2019-12-09 18:13:22 +08:00
4919fb8765 wrpll: print DDMTD helper tags 2019-12-09 17:39:22 +08:00
0d4eccc1a5 wrpll: improve debug output 2019-12-09 17:23:09 +08:00
f633c62e8d wrpll: speed up si549 i2c access 2019-12-09 17:22:58 +08:00
14e09582b6 wrpll: work around si549 not working when lsdiv=2 2019-12-09 16:20:08 +08:00
439576f59d wrpll: fix Si549 initialization delays 2019-12-09 16:13:57 +08:00
2b5213b013 wrpll: constrain clocks 2019-12-09 12:26:44 +08:00
05e2e1899a wrpll: update OBUFDS_GTE2 comment
Seems O can fan out simultaneously to transceiver and fabric.
Kasli is using ODIV2 for no particular reason.
2019-12-09 11:58:54 +08:00
4148efd2ee wrpll: implement filters and connect to Si549 2019-12-09 11:47:29 +08:00
d43fe644f0 wrpll: stabilize DDMTDSamplerGTP 2019-12-09 11:47:14 +08:00
0499f83580 wrpll: helper clock sanity check 2019-12-08 23:46:33 +08:00
46a776d06e sayma: introduce WRPLL on RTM 2019-12-08 15:30:00 +08:00
f35f658bc5 artiq_flash: rework RTM management 2019-12-08 15:29:31 +08:00
bcd061f141 artiq_flash: RTM is a regular DRTIO satellite, can be used with all variants 2019-12-08 15:12:04 +08:00
883310d83e sayma_rtm: si5324 -> cdrclkc 2019-12-08 14:26:05 +08:00
57a5bea43a sayma_rtm: support setting RTIO frequency 2019-12-08 11:45:31 +08:00
da9237de53 wrpll: support differential DDMTD inputs 2019-12-07 18:18:57 +08:00
Paweł Kulik
3851a02a3a Added option of flashing only RTM gateware.
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2019-12-07 09:31:19 +08:00
Paweł Kulik
14e250c78f Enabled internal pullup for CML SYSREF outputs, otherwise there is no signal on them.
Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2019-12-07 09:30:24 +08:00
7098854b0f wrpll: share DDMTD counter 2019-12-04 19:05:56 +08:00
05c5fed07d suservo: stray comma 2019-12-03 08:38:07 +00:00
56074cfffa suservo: support operating with one urukul
implemented by wiring up the second Urukul to dummy pins

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-12-02 11:30:20 +01:00
86e1924493 kasli_generic: support external reference on masters 2019-11-30 07:34:41 +00:00
eb271f383b wrpll: add DDMTD cores 2019-11-28 22:03:50 +08:00
39d5ca11f4 si549: increase I2C frequency 2019-11-28 22:03:26 +08:00
87894102e5 si549: use recommended i2c read sequence 2019-11-28 17:49:02 +08:00
2e55e39ac7 wrpll: use spaces to indent 2019-11-28 17:40:25 +08:00
354d82cfe3 wrpll: drive helper clock domain 2019-11-28 17:40:00 +08:00
4a03ca928d artiq_flash: sayma fixes 2019-11-28 17:38:29 +08:00
68cab5be8c si549: cleanups 2019-11-28 16:36:59 +08:00
bcd2383c9d wrpll: si549 initialization 2019-11-27 22:58:08 +08:00
4832bfb08c wrpll: i2c functions, select_recovered_clock placeholder 2019-11-27 21:21:00 +08:00
449d2c4f08 libboard_misoc: fix !has_i2c 2019-11-27 21:04:28 +08:00
e0687b77f5 si5324: 10 MHz ext_ref_frequency
* close #1254
* tested on innsbruck2 kasli variant
* sponsored by Uni Innsbruck/AQT

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-11-22 18:29:12 +01:00
c536f6c4df sayma_amc: output ddmtd_rec_clk 2019-11-20 19:16:04 +08:00
ae50da09c4 drtio/gth_ultrascale: support OBUFDS_GTE3 2019-11-20 19:15:50 +08:00
fe0c324b38 sayma: integrate si549 core 2019-11-20 17:37:16 +08:00
fa41c946ea wrpll: si549 fixes 2019-11-20 17:04:24 +08:00
c5dbab1929 gateware: move wrpll to drtio 2019-11-20 14:43:08 +08:00
gthickman
56d4b70e01 ad9910 osk (#1387)
* updated adoo10.py for RAM mode frequency control

* updated docstrings for set_cfr1() in ad9910.py

* fixed typo in ad9910.py

* added docstrings to ad9910.py

* removed OSK-related changes in AD9910, to be included in a separate branch.

* updated AD9910 set_cfr1 for control of OSK mode parameters

* updated AD9910 set_cfr1() for control of OSK mode parameters.
2019-11-18 15:57:26 +01:00
Fabian Schmid
f73e2a3d30 doc: clarify urukul attenuator behavior
Closes #1386

Signed-off-by: Fabian Schmid <fabian.schmid@mpq.mpg.de>
2019-11-18 15:56:00 +01:00
3adc799785 update GUI background 2019-11-15 13:49:09 +08:00
db13747279 fix device_db alias corner case bugs. Closes #1140 2019-11-14 16:22:45 +08:00
4707aef45c split out artiq-comtools 2019-11-14 15:21:51 +08:00
4416378d21 frontend: add --version to common tools 2019-11-14 11:42:31 +08:00
Garrett
f8a7e278b8 removed OSK-related changes in AD9910, to be included in a separate branch. 2019-11-12 19:07:05 +01:00
Garrett
3a19ba7e62 added docstrings to ad9910.py 2019-11-12 19:07:05 +01:00
Garrett
4ad3651022 fixed typo in ad9910.py 2019-11-12 19:07:05 +01:00
Garrett
6d34eb3bb0 updated docstrings for set_cfr1() in ad9910.py 2019-11-12 19:07:05 +01:00
Garrett
61ca46ec3f updated adoo10.py for RAM mode frequency control 2019-11-12 19:07:05 +01:00
fd7081830c remove fire_and_forget (moved to sipyco) 2019-11-12 19:43:04 +08:00
3fd6962bd2 use sipyco (#585) 2019-11-10 15:55:17 +08:00
6644903843 bootloader: fix imports 2019-11-06 14:45:55 +08:00
5279bc275a urukul: rework EEPROM synchronization. Closes #1372 2019-11-05 18:56:10 +08:00
David Nadlinger
bc3b55b1a8 gateware/eem: Force IOB=TRUE on Urukul SYNC output
Without this, the final register in the SYNC signal TTLClockGen
isn't (always) placed in the I/O tile, leading to more jitter
than necessary, and causing "double window" artefacts. See
sinara-hw/Urukul#16 for more details.

(Patch based on work by Weida Zhang, testing by various members
of the community in Oxford and elsewhere.)
2019-11-05 17:14:07 +08:00
b25a17fa37 netboot: support slave FPGA loading 2019-11-05 16:28:49 +08:00
307f39e900 remoting: fix multiuser access. Closes #1383 2019-11-05 15:46:07 +08:00
9dc82bd766 bootloader: add no_flash_boot config option to force network boot 2019-11-05 15:31:08 +08:00
e2f9f59472 artiq_flash: fix flashing Sayma RTM from package 2019-11-05 15:19:01 +08:00
98854473dd sayma_amc: use all transceivers on master (#1230) 2019-11-02 12:12:32 +08:00
29b4d87943 firmware: add cargosha256.nix 2019-11-01 10:28:41 +08:00
5362f92b39 bootloader: disable minimum stack space check in linker script
* The value varies greatly whether netboot is enabled or not.
* There is no simple solution to detect has_ethmac in the linker script and set the value accordingly.
* The space check is an imperfect solution that will be superseded by stack pointer limits.
* Left commented out so we can re-enable it manually during development if stack corruption is suspected.
2019-11-01 10:25:14 +08:00
deadfead2a bootloader: fix !has_ethmac 2019-11-01 10:19:08 +08:00
42af76326f kasli: enlarge integrated CPU SRAM for DRTIO masters
Required by the bootloader netboot support.
2019-11-01 10:15:13 +08:00
a78e493b72 firmware: load slave FPGA in bootloader 2019-10-31 12:42:40 +08:00
389a8f587a slave_fpga: modularize 2019-10-31 11:50:53 +08:00
9a35a2ed81 test_frontends: update 2019-10-30 22:02:16 +08:00
bc050fdeec bootloader: treat zero-length firmware in flash as no firmware 2019-10-30 21:46:06 +08:00
228e44a059 sayma: enable Ethernet on DRTIO satellite variant
So that netboot can be used in bootloader.
2019-10-30 21:39:00 +08:00
dc71039934 sayma, metlino: increase integrated_sram_size on Ethernet-enabled variants 2019-10-30 21:36:00 +08:00
3042476230 artiq_netboot: remove unnecessary import 2019-10-30 21:29:33 +08:00
c96de7454d remove artiq_devtool 2019-10-30 21:27:24 +08:00
88dbff46f4 add netboot tool 2019-10-30 21:24:51 +08:00
462cf5967e bootloader: add netboot support 2019-10-30 21:23:42 +08:00
1f15e55021 comm_analyzer: don't assume every message has data
close #1377
2019-10-28 15:35:44 +01:00
David Nadlinger
611bcc4db4 compiler: Cache expensive target data layout queries
On one typical experiment, this shaves about 3 seconds (~25%)
off the overall kernel compilation time.

GitHub: Closes #1370.
2019-10-28 11:09:25 +00:00
David Nadlinger
5d7f22ffa4 compiler: Remove provision for unused four-parameter llptr_to_var() form [nfc]
`var_type` was presumably intended to convert to a target type,
but wasn't actually acted on in the function body (nor was it
used anywhere in the codebase).
2019-10-28 11:02:46 +00:00
f2f7170d20 hmc7043: use recommend I/O standards
https://github.com/sinara-hw/Sayma_RTM/issues/116#issuecomment-544187952
2019-10-21 22:56:10 +08:00
47a83c71f1 firmware: more readable network addresses message 2019-10-21 14:00:14 +08:00
818d6b2f5a bootloader: fix compilation problems 2019-10-21 13:28:17 +08:00
8f76a3218e firmware: move i2c to libboard_misoc, enable IPv6 in bootloader, share network settings 2019-10-21 12:58:52 +08:00
1c5e749036 satman: remove compilation warning without JESD DACs 2019-10-21 12:53:54 +08:00
d26d80410e runtime: refactor network settings 2019-10-19 17:56:35 +08:00
6d5dcb4211 runtime: enable IPv6. Closes #349 2019-10-19 17:20:33 +08:00
05e8f24c24 sayma2: JESD204 synchronization 2019-10-18 23:28:47 +08:00
62b49882b9 examples/kc705: fix dds_test 2019-10-17 07:37:00 +08:00
a8f85860c4 coreanalyzer: AD9914 fixes (#1376) 2019-10-17 07:29:33 +08:00
d42ff81144 examples/sayma_master: update device_db 2019-10-16 18:49:25 +08:00
8fa3c6460e sayma_amc: set direction of external TTL buffer according to RTIO PHY OE 2019-10-16 18:48:50 +08:00
37d0a5dc19 rtio/ttl: expose OE 2019-10-16 18:48:20 +08:00
bc060b7f01 style 2019-10-16 18:18:11 +08:00
40d64fc782 sayma: remove standalone examples (no longer supported) 2019-10-16 17:54:39 +08:00
21a1c6de3f sayma: use SFP0 for DRTIO master 2019-10-16 17:53:40 +08:00
6cf06fba7b examples: use default IP addresses for boards 2019-10-16 16:18:30 +08:00
314d9b5d06 kasli: default to 125MHz frequency for DRTIO
This is the consistent and most common option. Sayma will also eventually move to it.
2019-10-08 12:59:52 +08:00
4df2c5d1fb sayma: prepare for SYSREF align
We will try DDMTD on the AMC first, as this is simpler and perhaps will work on v2 after the power supply fixes.
2019-10-08 12:30:47 +08:00
5ee81dc643 satman: define constants for JdacBasicRequest reqnos 2019-10-08 10:27:04 +08:00
4b3baf4825 firmware: run PRBS and STPL JESD204 tests 2019-10-08 00:10:36 +08:00
03007b896e sayma_amc: sma -> mcx 2019-10-07 20:31:35 +08:00
ebd5d890f1 satman: check for JESD ready 2019-10-06 23:10:57 +08:00
90e3b83e80 hmc7043: turn on AMC_FPGA_SYSREF1
Florent's JESD core won't work at all without.
2019-10-06 22:49:00 +08:00
97a0dee3e8 jesd204: remove ibuf_disable
We use the MOSFET to mute the HMC7043 noise on hardware v2 instead.
2019-10-06 22:26:31 +08:00
1bc7743e03 sayma: fix hmc7043 output settings for v2 hardware 2019-10-06 21:50:29 +08:00
a421820a32 sayma: initialize DACs over DRTIO 2019-10-06 21:42:45 +08:00
f8e4cc37d0 sayma_rtm: reset and detect DACs 2019-10-06 20:15:27 +08:00
f62dc7e1d4 sayma: refactor JESD DAC channel groups 2019-10-06 20:15:09 +08:00
c4c884b8ce ad9154: simplify, focus on AD9154 config and do not include JESD 2019-10-06 20:07:02 +08:00
fdba0bfbbc satman: move now-unrelated hmc830_7043 init away from DRTIO transceiver init 2019-10-06 19:22:46 +08:00
1c6c22fde9 sayma_amc: HMC830_REF moved to RTM side 2019-10-06 18:15:37 +08:00
ad63908aff hmc830_7043: enable_fpga_ibuf -> unmute 2019-10-06 18:13:59 +08:00
5ad65b9d30 hmc830_7043: remove clock_mux 2019-10-06 18:13:27 +08:00
e6ff44301b sayma_amc: cleanup (v2.0 only) 2019-10-06 18:11:43 +08:00
e9b81f6e33 remove serwb
DRTIO is a better solution
2019-10-06 18:10:23 +08:00
7cd02d30b7 sayma_rtm_drtio: replace sayma_rtm 2019-10-06 17:59:53 +08:00
b3b85135a3 sayma_rtm_drtio: add DDMTD core, move specific cores out of SatelliteBase 2019-10-06 17:59:11 +08:00
346c985347 sayma_rtm_drtio: use artiq_sayma folder 2019-10-06 17:30:08 +08:00
e2a924449d artiq_flash: use DRTIO RTM gateware 2019-10-06 17:28:14 +08:00
4198033657 sayma_rtm_drtio: cleanup (v2.0 only) 2019-10-06 16:42:34 +08:00
5612b31860 sayma_rtm_drtio: add HMC clock chip and DAC control 2019-10-06 16:15:24 +08:00
a8cf4c2b18 sayma_rtm: hwrev v2.0 by default 2019-10-06 13:25:30 +08:00
1bc5d44a7c artiq_flash: do not flash RTM gateware on Sayma variants that don't need it 2019-10-06 13:15:50 +08:00
bb5ff46f7d Merge branch 'wrpll' 2019-10-05 10:24:11 +08:00
7b95814cf5 sayma_amc: refactor, add SimpleSatellite variant 2019-10-05 10:24:06 +08:00
58b7bdcecc sayma_amc: refactor RTM FPGA code 2019-10-05 10:24:06 +08:00
96fc4a21e8 sayma_amc: remove dummy FPGA pin assignment testing code 2019-10-05 10:24:06 +08:00
Tim Ballance
ada3b39f4e Fix ad9910 ram mode asf scale error in polar mode 2019-10-04 20:14:41 +02:00
Tim Ballance
448080e71d Fix ad9910 ram mode asf scale error
RAM mode amplitude to ASF conversion should be << 18 rather than << 16
2019-10-04 20:14:41 +02:00
6aa68e1715 sayma_rtm2: select filtered clock from Si5324 2019-10-04 22:56:16 +08:00
6cb0f5de59 sayma_amc: enable DRTIO switching 2019-10-04 22:55:23 +08:00
0cf8a46bbd sayma_amc2: select filtered clock from Si5324 2019-10-04 21:28:26 +08:00
6f533727cb artiq_flash: use regular bscan_spi_xcku040 for Sayma
The modified version is no longer necessary on v2 boards, and breaks flash bank 1.
2019-10-04 17:50:45 +08:00
4c1fe1de0d environment: implement HasEnvironment.call_child_method (#1366) 2019-09-30 23:58:36 +08:00
Charles Baynham
0b1fb255a9 tools: Wrap Task _do() calls in a generic exception handler
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2019-09-20 23:00:59 +08:00
Charles Baynham
e50a6d5aaf worker_impy: ignore newline at start of experiment docstring 2019-09-20 22:10:49 +08:00
f0e87d2e59 grabber: remove unused code 2019-09-20 15:26:12 +02:00
4e77be0511 firmware: add Cargo.lock header that newer cargo wants 2019-09-17 15:22:14 +08:00
Charles Baynham
b7abf2fb53 pyon: Handle inf in decoding 2019-09-12 09:46:05 +08:00
38fca01189 artiq_ddb_template: add su-servo support (#1343) 2019-09-11 15:52:25 +08:00
991c686d72 kasli_generic,eem: print RTIO channels in hex like artiq_ddb_template 2019-09-11 15:51:53 +08:00
f4dd7e5e29 kasli_tester: init urukul channel before calibrating
Otherwise the DDS is not initialized and with a cold system it fails to
find IO_UPDATE edges.

Signed-off-by: Robert Jördens <rj@quartiq.de>
2019-09-11 07:16:35 +00:00
7492a59f6d kasli_generic: add SUServo support (#1343) 2019-09-11 11:12:48 +08:00
David Nadlinger
6d6f66338b runtime: Update core config panic_reset command suggestion message 2019-09-10 19:31:19 +01:00
Charles Baynham
ddd34e5a9c influx_schedule: log repo_rev along with other info
Signed-off-by: Charles Baynham <charles.baynham@npl.co.uk>
2019-09-10 13:46:28 +02:00
98caaebade consistent use of 'class name' terminology to select a class within an experiment file. Closes #1348 2019-09-09 15:16:33 +08:00
21021beb08 kasli: remove opticlock (moved to kasli_generic) 2019-09-09 15:03:10 +08:00
436662be52 ddb_template: add Novogorny support 2019-09-09 15:00:45 +08:00
69c2acd9d7 ddb_template: sampler cnv is ttl not spi 2019-09-09 14:57:42 +08:00