mirror of https://github.com/m-labs/artiq.git
hmc7043: use recommend I/O standards
https://github.com/sinara-hw/Sayma_RTM/issues/116#issuecomment-544187952
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@ -150,9 +150,9 @@ pub mod hmc7043 {
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// enabled, divider, output config, is sysref
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const OUTPUT_CONFIG: [(bool, u16, u8, bool); 14] = [
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(true, DAC_CLK_DIV, 0x08, false), // 0: DAC1_CLK
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(true, SYSREF_DIV, 0x08, true), // 1: DAC1_SYSREF
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(true, SYSREF_DIV, 0x00, true), // 1: DAC1_SYSREF
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(true, DAC_CLK_DIV, 0x08, false), // 2: DAC0_CLK
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(true, SYSREF_DIV, 0x08, true), // 3: DAC0_SYSREF
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(true, SYSREF_DIV, 0x00, true), // 3: DAC0_SYSREF
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(true, SYSREF_DIV, 0x10, true), // 4: AMC_FPGA_SYSREF0
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(true, FPGA_CLK_DIV, 0x10, true), // 5: AMC_FPGA_SYSREF1
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(false, 0, 0x10, false), // 6: unused
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@ -160,7 +160,7 @@ pub mod hmc7043 {
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(true, FPGA_CLK_DIV, 0x08, false), // 8: GTP_CLK0_IN
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(false, 0, 0x10, false), // 9: unused
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(false, 0, 0x10, false), // 10: unused
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(false, 0, 0x10, false), // 11: unused / uFL
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(false, 0, 0x08, false), // 11: unused / uFL
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(false, 0, 0x10, false), // 12: unused
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(false, SYSREF_DIV, 0x10, true), // 13: RTM_FPGA_SYSREF1
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];
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