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wrpll: loop test
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8ec0f2e717
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@ -175,7 +175,7 @@ mod si549 {
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use board_misoc::clock;
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use super::i2c;
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const ADDRESS: u8 = 0x55;
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pub const ADDRESS: u8 = 0x55;
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pub fn write(dcxo: i2c::Dcxo, reg: u8, val: u8) -> Result<(), &'static str> {
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i2c::start(dcxo);
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@ -270,6 +270,13 @@ mod si549 {
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clock::spin_us(100);
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Ok(())
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}
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pub fn get_adpll(dcxo: i2c::Dcxo) -> Result<i32, &'static str> {
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let b1 = read(dcxo, 231)? as i32;
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let b2 = read(dcxo, 232)? as i32;
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let b3 = read(dcxo, 233)? as i8 as i32;
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Ok(b3 << 16 | b2 << 8 | b1)
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}
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}
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fn get_frequencies() -> (u32, u32, u32) {
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@ -315,6 +322,11 @@ pub fn init() {
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unsafe { csr::wrpll::helper_reset_write(1); }
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unsafe {
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csr::wrpll::helper_dcxo_i2c_address_write(si549::ADDRESS);
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csr::wrpll::main_dcxo_i2c_address_write(si549::ADDRESS);
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}
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#[cfg(rtio_frequency = "125.0")]
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let (h_hsdiv, h_lsdiv, h_fbdiv) = (0x05c, 0, 0x04b5badb98a);
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#[cfg(rtio_frequency = "125.0")]
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@ -403,16 +415,41 @@ fn select_recovered_clock_int(rc: bool) -> Result<(), &'static str> {
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let (helper_adpll, main_adpll) = trim_dcxos(f_helper, f_main, f_cdr)?;
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si549::set_adpll(i2c::Dcxo::Helper, helper_adpll).expect("ADPLL write failed");
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si549::set_adpll(i2c::Dcxo::Main, main_adpll).expect("ADPLL write failed");
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unsafe {
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csr::wrpll::adpll_offset_helper_write(helper_adpll as u32);
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csr::wrpll::adpll_offset_main_write(main_adpll as u32);
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csr::wrpll::helper_dcxo_gpio_enable_write(0);
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csr::wrpll::main_dcxo_gpio_enable_write(0);
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csr::wrpll::helper_dcxo_errors_write(0xff);
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csr::wrpll::main_dcxo_errors_write(0xff);
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csr::wrpll::filter_reset_write(0);
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}
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clock::spin_us(100_000);
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let mut tags = [0; 10];
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for i in 0..tags.len() {
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tags[i] = get_ddmtd_helper_tag();
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}
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info!("DDMTD helper tags: {:?}", tags);
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unsafe {
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csr::wrpll::filter_reset_write(1);
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}
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clock::spin_us(50_000);
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unsafe {
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csr::wrpll::helper_dcxo_gpio_enable_write(1);
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csr::wrpll::main_dcxo_gpio_enable_write(1);
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}
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unsafe {
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info!("error {} {}",
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csr::wrpll::helper_dcxo_errors_read(),
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csr::wrpll::main_dcxo_errors_read());
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}
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info!("new ADPLL: {} {}",
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si549::get_adpll(i2c::Dcxo::Helper)?,
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si549::get_adpll(i2c::Dcxo::Main)?);
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} else {
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si549::set_adpll(i2c::Dcxo::Helper, 0).expect("ADPLL write failed");
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si549::set_adpll(i2c::Dcxo::Main, 0).expect("ADPLL write failed");
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@ -51,15 +51,21 @@ class FrequencyCounter(Module, AutoCSR):
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class WRPLL(Module, AutoCSR):
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def __init__(self, helper_clk_pads, main_dcxo_i2c, helper_dxco_i2c, ddmtd_inputs, N=15):
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self.helper_reset = CSRStorage(reset=1)
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self.filter_reset = CSRStorage(reset=1)
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self.adpll_offset_helper = CSRStorage(24)
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self.adpll_offset_main = CSRStorage(24)
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self.clock_domains.cd_helper = ClockDomain()
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self.clock_domains.cd_filter = ClockDomain()
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self.helper_reset.storage.attr.add("no_retiming")
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self.filter_reset.storage.attr.add("no_retiming")
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self.specials += Instance("IBUFGDS",
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i_I=helper_clk_pads.p, i_IB=helper_clk_pads.n,
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o_O=self.cd_helper.clk)
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self.comb += self.cd_filter.clk.eq(self.cd_helper.clk)
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self.specials += [
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Instance("IBUFGDS", i_I=helper_clk_pads.p, i_IB=helper_clk_pads.n,
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o_O=self.cd_helper.clk),
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AsyncResetSynchronizer(self.cd_helper, self.helper_reset.storage)
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AsyncResetSynchronizer(self.cd_helper, self.helper_reset.storage),
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AsyncResetSynchronizer(self.cd_filter, self.filter_reset.storage)
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]
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self.submodules.helper_dcxo = Si549(helper_dxco_i2c)
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@ -73,10 +79,10 @@ class WRPLL(Module, AutoCSR):
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self.submodules.ddmtd_helper = DDMTD(ddmtd_counter, ddmtd_inputs.rec_clk)
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self.submodules.ddmtd_main = DDMTD(ddmtd_counter, ddmtd_inputs.main_xo)
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helper_cd = ClockDomainsRenamer("helper")
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self.submodules.collector = helper_cd(Collector(N))
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self.submodules.filter_helper = helper_cd(thls.make(filters.helper, data_width=48))
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self.submodules.filter_main = helper_cd(thls.make(filters.main, data_width=48))
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filter_cd = ClockDomainsRenamer("filter")
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self.submodules.collector = filter_cd(Collector(N))
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self.submodules.filter_helper = filter_cd(thls.make(filters.helper, data_width=48))
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self.submodules.filter_main = filter_cd(thls.make(filters.main, data_width=48))
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self.comb += [
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self.collector.tag_helper.eq(self.ddmtd_helper.h_tag),
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