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wrpll: simple ADPLL test
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bb04b082a7
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@ -262,6 +262,13 @@ mod si549 {
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Ok(())
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}
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pub fn adpll(dcxo: i2c::Dcxo, adpll: i32) -> Result<(), &'static str> {
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write(dcxo, 231, adpll as u8)?;
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write(dcxo, 232, (adpll >> 8) as u8)?;
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write(dcxo, 233, (adpll >> 16) as u8)?;
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Ok(())
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}
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}
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fn get_frequencies() -> (u32, u32, u32) {
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@ -321,8 +328,19 @@ pub fn init() {
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unsafe { csr::wrpll::helper_reset_write(0); }
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clock::spin_us(1);
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}
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pub fn diagnostics() {
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log_frequencies();
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info!("ADPLL test:");
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// +/-10ppm
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si549::adpll(i2c::Dcxo::Helper, -85911).expect("ADPLL write failed");
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si549::adpll(i2c::Dcxo::Main, 85911).expect("ADPLL write failed");
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log_frequencies();
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si549::adpll(i2c::Dcxo::Helper, 0).expect("ADPLL write failed");
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si549::adpll(i2c::Dcxo::Main, 0).expect("ADPLL write failed");
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let mut tags = [0; 10];
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for i in 0..tags.len() {
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tags[i] = get_ddmtd_main_tag();
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@ -463,6 +463,8 @@ pub extern fn main() -> i32 {
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csr::drtio_transceiver::stable_clkin_write(1);
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}
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clock::spin_us(1500); // wait for CPLL/QPLL lock
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#[cfg(has_wrpll)]
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wrpll::diagnostics();
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init_rtio_crg();
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#[cfg(has_hmc830_7043)]
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