M-Labs
/
artiq
mirror of https://github.com/m-labs/artiq.git
2
0
Fork 1
Code Issues Projects Releases Wiki Activity

kasli: default to hardware v2

This commit is contained in:
Sebastien Bourdeauducq 2020-05-07 19:15:03 +08:00
parent 35f1814235
commit 1f2182d4c7
1 changed files with 3 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
artiq/gateware/targets/kasli.py
View File

@ -197,7 +197,7 @@ class SUServo(StandaloneBase):
"""
def __init__(self, hw_rev=None, **kwargs):
if hw_rev is None:
hw_rev = "v1.1"
hw_rev = "v2.0"
StandaloneBase.__init__(self, hw_rev=hw_rev, **kwargs)
self.config["SI5324_AS_SYNTHESIZER"] = None
@ -588,7 +588,7 @@ class SatelliteBase(BaseSoC):
class Master(MasterBase):
def __init__(self, hw_rev=None, **kwargs):
if hw_rev is None:
hw_rev = "v1.1"
hw_rev = "v2.0"
MasterBase.__init__(self, hw_rev=hw_rev, **kwargs)
self.rtio_channels = []
@ -611,7 +611,7 @@ class Master(MasterBase):
class Satellite(SatelliteBase):
def __init__(self, hw_rev=None, **kwargs):
if hw_rev is None:
hw_rev = "v1.1"
hw_rev = "v2.0"
SatelliteBase.__init__(self, hw_rev=hw_rev, **kwargs)
self.rtio_channels = []