Commit Graph

325 Commits

Author SHA1 Message Date
a7bbcdc1ad targets/pipistrello: mon -> moninj 2015-06-27 21:15:17 +02:00
5b3eac1d96 pipistrello: tweak fifo depths a bit
ise being dull again, inferring all but one 64x64 fifo as bram...
minimum bram depth is 256 anyway
2015-06-22 23:25:07 -06:00
cd249b2f66 pipistrello: run at 83+1/3 MHz, cleanup CRG 2015-06-22 19:03:00 -06:00
9f3f9255a2 soc: increase DDS output FIFO sizes 2015-06-21 08:40:10 -06:00
87ea1433d3 dds: all working 2015-06-20 18:42:39 -06:00
5a9bdb2e33 DDS monitoring 2015-06-19 15:30:17 -06:00
03fe71228b dds: phase computation fixes 2015-06-19 11:01:43 -06:00
3636025e69 pipistrello: smaller L2 cache 2015-06-18 09:49:52 -06:00
Florent Kermarrec
449964cce8 runtime/mailbox: remove flush of L2 cache (L2 cache is now shared between CPUs) 2015-06-18 12:18:45 +02:00
Florent Kermarrec
38a0f63bd2 gateware/soc: use Minicon SDRAM controller and 128KB shared L2 cache 2015-06-18 12:18:03 +02:00
b2af0f6cc3 soc,runtime: support TTL override 2015-06-09 19:51:02 +08:00
37c7ea31c3 gui: TTL override support 2015-06-06 00:03:30 +08:00
a2ae5e4706 runtime: report TTL status over UDP 2015-06-03 18:26:19 +08:00
59b339462c Merge branch 'master' of github.com:m-labs/artiq 2015-06-02 17:45:16 +08:00
b81151eb42 soc: rtio monitor 2015-06-02 17:41:40 +08:00
Yann Sionneau
ed95038681 flash_storage: remove useless parentheses 2015-05-29 11:11:29 +02:00
Yann Sionneau
575dfade38 flash_storage comm: use OK/ERROR replies instead of specific FLASH_WRITE_REPLY 2015-05-29 11:10:40 +02:00
Yann Sionneau
c32133b815 flash_storage: avoid crash if a record size gets corrupted to be less than 6 2015-05-27 12:56:21 +02:00
Yann Sionneau
4bf7875b87 flash_storage: refactor + unit tests + artiq_coreconfig.py CLI + doc 2015-05-27 18:06:12 +08:00
6c35d066fc runtime: add missing include 2015-05-21 12:00:48 +08:00
0ca42dbdbe runtime/dds: send one FUD per command in a batch, compensate POW 2015-05-09 17:26:36 +08:00
ce4b5739ed runtime: reset all DDSes upon startup 2015-05-09 17:12:38 +08:00
b22b8b661b runtime: fix rtio channel selection in dds batch 2015-05-08 22:09:08 +08:00
55f2fef576 runtime: support DDS batches 2015-05-08 16:51:54 +08:00
53c6339307 runtime: break ttl-specific functions from rtio 2015-05-08 16:20:12 +08:00
a36c51eb83 DDS over RTIO (batch mode not supported yet) 2015-05-08 14:44:39 +08:00
a91bb48ced gateware: adapt to misoc changes 2015-05-06 18:02:15 +08:00
4048568d8e support kernel handover with coherent time 2015-05-02 23:41:49 +08:00
d8fdac6f86 runtime/bridge: factor rtio_init 2015-05-02 12:27:15 +08:00
050db0b0f5 runtime: support platforms without flash 2015-05-02 12:20:20 +08:00
8fe5c7ac01 runtime/test_mode: support setting O and OE separately 2015-05-02 12:16:09 +08:00
a61d701d47 rtio: decouple PHY reset from logic reset 2015-05-02 11:47:11 +08:00
62669f9ff2 soc: factor timer, kernel CPU and mailbox 2015-05-01 18:51:24 +08:00
4d31194343 runtime: load idle kernel from flash storage 2015-05-01 13:49:26 +08:00
d3753c9643 runtime: get IP and MAC from flash storage 2015-05-01 12:34:47 +08:00
56c85dd2cb style 2015-04-30 20:03:29 +08:00
87ae250baa runtime: validate pointers received from kernel CPU 2015-04-30 10:52:50 +08:00
967145f2dc watchdog support on core device (broken by bug similar to issue #19) 2015-04-29 12:58:37 +08:00
f60868f084 runtime/kloader: clear kernel-CPU mailbox on stop to avoid fake spurious messages 2015-04-29 12:57:09 +08:00
37ac6c4542 runtime: [HACK] workaround for intermittent RPC crashes 2015-04-28 17:15:39 +08:00
1ce41d567c runtime/mailbox: fix mailbox_acknowledged for first message 2015-04-28 16:51:55 +08:00
53055a045d test_mode: flash storage access 2015-04-28 13:01:54 +08:00
9fceae7515 runtime/session: simplify buffer management 2015-04-28 13:01:22 +08:00
9b62e7e77b runtime,coredevice: support session reset for serial 2015-04-28 02:11:58 +08:00
8a19766278 runtime,comm_generic: improve and fix list encoding 2015-04-28 01:31:55 +08:00
86c012924e targets: rename AMP->Top, merge peripherals 2015-04-28 00:18:54 +08:00
938e1c2842 Remove UP support.
The only advantage of UP is to support the Papilio Pro, but that port is also very limited in other ways and the Pipistrello provides a more reasonable platform that also supports AMP.

On the other hand, RPCs on UP are difficult to implement with the session.c protocol system (without an operating system or coroutines), along with many other minor difficulties and maintainance issues. Planned features such as watchdogs in the core device are also difficult on UP.
2015-04-27 20:43:45 +08:00
1ca49787b4 runtime: update lwip 2015-04-27 20:34:34 +08:00
bd7a031466 flash_storage: cleanup and compile 2015-04-27 17:48:31 +08:00
Yann Sionneau
13119eb9ee flash_storage: add key-value flash storage support 2015-04-27 11:39:19 +08:00
110f7bce64 runtime: saner lwipopts 2015-04-25 18:58:45 +08:00
8f5f428c0b runtime/main: fix sys_now 2015-04-24 18:30:27 +08:00
934a6b0495 runtime,coredevice: Ethernet support (buggy) 2015-04-23 23:22:40 +08:00
1968304b4f runtime: upgrade lwip (fixes zero-copy tcp_write) 2015-04-23 19:13:09 +08:00
d99976dc37 runtime/elf_loader: add alignment comment 2015-04-23 19:06:23 +08:00
459da723d3 liblwip/netif/liteethif: follow lwip doc recommendations regarding end of pbuf chain detection 2015-04-23 17:21:42 +08:00
7290013671 liblwip/netif/liteethif: fix buffer pointer arithmetic 2015-04-23 17:18:03 +08:00
6a80944c3f runtime: increase packet buffer size 2015-04-22 15:01:58 +08:00
e4251c7f41 runtime: get lwip to run 2015-04-22 15:01:32 +08:00
d5d49e73d2 runtime: fix user_kernel_state on UP 2015-04-22 11:41:54 +08:00
18106cc014 comm: refactor to support lwip event model 2015-04-22 01:31:31 +08:00
904bcd247f runtime: only build liteethif if Ethernet core present 2015-04-18 22:25:27 +08:00
b972abd142 runtime: fix test mode on UP 2015-04-18 15:30:46 +08:00
4c6387929b runtime: link against lwip, cleanups 2015-04-17 16:38:46 +08:00
91cd79a8a3 soc/runtime: add lwip (thanks Florent) 2015-04-17 14:51:30 +08:00
6a5f58e5a9 runtime: support test mode on AMP 2015-04-16 21:47:05 +08:00
546996f896 coredevice,runtime: put ref_period into the ddb 2015-04-16 15:15:38 +08:00
a5ea40478c runtime/Makefile: use printf instead of non-portable echo -e 2015-04-15 21:13:20 -06:00
61a6506484 targets/pipistrello: add mailbox memory region 2015-04-15 20:41:28 +08:00
Florent Kermarrec
fd2def4951 generate MAILBOX_BASE with SoC and use it in runtime
to avoid possible future mismatches between SoC/runtime, constants that can be easily generated from SoC should be defined this way.
2015-04-15 20:40:28 +08:00
c1f9fc2ae4 runtime: update mailbox address 2015-04-15 14:11:12 +08:00
9cfe00e23e runtime: keep .bin 2015-04-15 14:05:34 +08:00
ffe4ee9137 runtime: build flash image by default 2015-04-15 12:43:15 +08:00
a336c95d0a runtime/Makefile: work around echo vs bin/echo 2015-04-14 21:26:49 -06:00
f988ec318e pipistrello: fix csrs, make AMP default 2015-04-14 21:10:07 -06:00
9e726d7dd1 ppro: ignore all async paths 2015-04-14 18:18:48 -06:00
70916aa0c5 pipistrello: tig _all_ async paths, add timing interference report 2015-04-14 18:18:48 -06:00
066adbdeac pipistrello: timing report 2015-04-14 18:18:16 -06:00
6217cf5392 pipistrello: basesoc, cleanup 2015-04-14 18:18:16 -06:00
4c10182c9f rtio: refactor, use rtlink 2015-04-14 19:44:45 +08:00
c0f1708c20 targets/pipstrello: fix mem_map 2015-04-14 19:34:14 +08:00
a50f2c20ff targets/ppro: fix mem_map update 2015-04-11 21:59:29 +08:00
601f593ac4 targets/kc705: do not depend on particular Migen generated signal names 2015-04-11 21:46:57 +08:00
Florent Kermarrec
bdd02a064e targets/artiq_kc705: add false path between rsys_clk and rio_clk (reduce P&R on AMP from 40 minutes to 5 minutes :) 2015-04-11 21:32:46 +08:00
Florent Kermarrec
24b2bd7b6f soc/targets: use mem_map, fix addressing conflict on UP between ethernet and dds 2015-04-11 21:32:11 +08:00
fb75bd246e targets/kc705: make AMP the default 2015-04-11 17:16:25 +08:00
b492aad1c4 targets/kc705: enable Ethernet core 2015-04-10 13:15:32 +08:00
cb2596bd81 coredevice/comm: split protocol to allow reuse for Ethernet 2015-04-10 00:59:35 +08:00
44304a33b2 soc,runtime: define RTIO FUD channel number in targets 2015-04-09 00:35:11 +08:00
7e591bb1c7 targets: use _Peripherals/UP/AMP class names, share QC1 IO defs 2015-04-07 00:07:53 +08:00
5538ad5c70 runtime: support RPC exceptions on AMP 2015-04-06 22:28:10 +08:00
45bb9d8840 runtime: support RPC and log on AMP 2015-04-06 19:40:12 +08:00
f26c53cb35 runtime: use KERNELCPU_PAYLOAD_ADDRESS on UP 2015-04-05 22:16:51 +08:00
0c62f0f69c runtime: remove generated service_table.h 2015-04-05 22:08:20 +08:00
72f9f7ed79 runtime: implement mailbox, use it for kernel startup, exceptions and termination 2015-04-05 22:07:34 +08:00
1bca614d11 runtime: use UP/AMP terminology 2015-04-05 17:55:05 +08:00
ef375b5c9c pipistrello: add double-cpu 2015-04-04 20:52:08 -06:00
afc3982555 pipistrello: refactor single-cpu 2015-04-04 20:51:47 -06:00
0ae4492077 pipistrello: use mem_decoder 2015-04-04 20:51:47 -06:00
e50661dac4 pipistrello: fix dcm parameters, move leds, fix names 2015-04-04 20:51:47 -06:00
cbdc1ba46f runtime: biprocessor support (incomplete, WIP) 2015-04-04 22:08:32 +08:00
277e038569 targets/kc705: add LED on RTIO 2015-04-04 22:07:23 +08:00
21a0919ddc runtime: load support code into kernel CPU 2015-04-03 17:44:56 +08:00
c6d3750076 runtime,amp: set kernel memory start to SDRAM+128K, use custom linker file to split memory 2015-04-03 16:03:38 +08:00
5f7161a7de kc705: 16 TTLs 2015-04-03 15:57:25 +08:00
Florent Kermarrec
2995f0a705 remove use of _r prefix on CSRs 2015-04-02 18:30:44 +08:00
88a1707ef9 soc: use new location of gpio module 2015-04-02 17:19:00 +08:00
f124350555 runtime: disable kernel-CPU functions when kernel-CPU not present 2015-04-02 17:00:59 +08:00
4b66e3108a runtime: demonstrate basic inter-CPU communication 2015-04-02 16:54:08 +08:00
5fd7f68f48 targets/kc705: dual-CPU design 2015-04-02 16:53:57 +08:00
Yann Sionneau
e9092edb98 Remove one RTIO out channel to free up some space for travis builds to succeed 2015-03-30 19:51:52 +08:00
Florent Kermarrec
494c670cd2 targets/artiq_ppro: use new sdram_controller_settings parameter 2015-03-21 23:19:16 +01:00
fdca0a71ff add ARTIQMidiSoC based on pipistrello 2015-03-19 11:37:15 -06:00
7a1d60ee15 coredevice,runtime,language: add parameters to runtime exceptions, include information with RTIO errors 2015-03-13 14:55:18 +01:00
0416da8634 runtime/test: implement ttlout, clksel and dds functions 2015-03-12 13:14:06 +01:00
3122623c6f rtio: make 63-bit timestamp counter the default [soc] 2015-03-12 13:13:35 +01:00
d38014b07d soc/runtime: import DDS/TTL tester (functions not accessible yet) 2015-03-11 22:02:19 +01:00
28bce9ee40 artiqlib -> artiq.gateware 2015-03-08 11:00:24 +01:00
15d09c0b94 runtime: use new uart tuning word function 2015-03-02 23:36:05 +00:00
4e5320be28 Merge branch 'master' of https://github.com/m-labs/artiq 2015-02-28 07:34:38 -07:00
Florent Kermarrec
9cf8db2f14 adapt code to MiSoC's changes 2015-02-28 07:34:11 -07:00
7028d85255 targets/ppro: disable L2 2015-02-27 18:02:21 -07:00
Joe Britton
0127de9bb5 soc: add_cpu_csr_region -> add_csr_region 2015-02-27 15:02:28 -07:00
61f33a9a04 soc/ad9858: do not put code in __init__.py 2015-02-26 23:31:43 -07:00
da917f768e initial kc705 support 2015-02-26 21:50:52 -07:00
f7232fd3d1 support exceptions raised by RPCs 2014-12-20 21:33:22 +08:00
0d10ae7580 rpc: support all data types as parameters 2014-12-19 12:46:24 +08:00
059608d1fd dds: fix phase modes 2014-12-09 13:50:33 +08:00
fc690ead75 runtime: support clock switching 2014-12-02 14:06:32 +08:00
94218f785e comm_serial: cleanup 2014-12-02 11:09:02 +08:00
Yann Sionneau
20adb57140 comm_serial: allow to use dynamic baudrate 2014-12-02 10:42:14 +08:00
c591f1a74d targets/ARTIQMiniSoC: support dynamic switching of RTIO clock to XTRIG 2014-12-01 18:53:29 +08:00
cd587e4f12 rtio: do housekeeping in gateware 2014-12-01 17:32:36 +08:00
99d530e498 targets/ARTIQMiniSoC: remove 2 TTL channels to make room in FPGA 2014-12-01 17:31:35 +08:00
50e0bf3280 rtio: optimize flag handling 2014-12-01 14:29:50 +08:00
572eecc57b rtio: stricter upper bound on guard time to avoid race condition 2014-12-01 14:27:03 +08:00
7166ca82d1 targets/ARTIQMiniSoC: map RTIO CSRs directly on Wishbone (reduces programming time by 30%) 2014-11-30 22:31:55 +08:00
1f6441948d more TTL channels and larger input FIFOs on Papilio Pro 2014-11-30 15:50:57 +08:00
e5286c57ab rtio: fix input FIFO depth config 2014-11-30 12:12:35 +08:00
bf745e53c9 rtio: register FIFO output to improve timing 2014-11-30 10:51:12 +08:00
dda4002ae1 rtio/phy: fix input synchronization 2014-11-30 10:50:48 +08:00
c78c5a2b4f rtio: fix guard cycle computation 2014-11-30 01:00:52 +08:00
39c4b5416f targets/ARTIQMiniSoC: 125MHz RTIO clocking 2014-11-30 01:00:27 +08:00
9aafe89518 rtio: use Record 2014-11-30 00:59:39 +08:00
901073acf3 asynchronous RTIO 2014-11-30 00:13:54 +08:00
44ec3eae3d soc/target: use minicon by default 2014-11-28 10:21:43 +08:00
65567e1201 soc/target: remap RTIO to avoid conflict with Ethernet MAC+PHY 2014-11-21 15:51:51 -08:00
dfd779c7c5 core: add underflow recovery function 2014-11-20 12:38:52 -08:00
1780759327 dds: phase control (mostly untested) 2014-11-20 12:32:56 -08:00
17f5a31320 runtime/dds: fix reset glitches 2014-11-15 11:23:23 -07:00