forked from M-Labs/artiq
pipistrello: fix csrs, make AMP default
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9795e83bfc
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f988ec318e
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@ -125,7 +125,7 @@ class UP(_Peripherals):
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def __init__(self, platform, **kwargs):
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_Peripherals.__init__(self, platform, **kwargs)
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rtio_csrs = self.rtio.get_csrs()
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rtio_csrs = self.rtio.get_csrs() + self.rtio.get_kernel_csrs()
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self.submodules.rtiowb = wbgen.Bank(rtio_csrs)
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self.add_wb_slave(mem_decoder(self.mem_map["rtio"]), self.rtiowb.bus)
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self.add_csr_region("rtio", self.mem_map["rtio"] + 0x80000000, 32,
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@ -156,7 +156,7 @@ class AMP(_Peripherals):
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self.kernel_cpu.add_wb_slave(mem_decoder(self.mem_map["mailbox"]),
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self.mailbox.i2)
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rtio_csrs = self.rtio.get_csrs()
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rtio_csrs = self.rtio.get_kernel_csrs()
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self.submodules.rtiowb = wbgen.Bank(rtio_csrs)
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self.kernel_cpu.add_wb_slave(mem_decoder(self.mem_map["rtio"]),
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self.rtiowb.bus)
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@ -168,4 +168,4 @@ class AMP(_Peripherals):
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self.add_memory_region("dds", self.mem_map["dds"] + 0x80000000, 64*4)
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default_subtarget = UP
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default_subtarget = AMP
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