forked from M-Labs/artiq
targets/pipistrello: add mailbox memory region
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@ -155,6 +155,8 @@ class AMP(_Peripherals):
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self.mailbox.i1)
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self.kernel_cpu.add_wb_slave(mem_decoder(self.mem_map["mailbox"]),
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self.mailbox.i2)
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self.add_memory_region("mailbox",
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self.mem_map["mailbox"] + 0x80000000, 4)
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rtio_csrs = self.rtio.get_kernel_csrs()
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self.submodules.rtiowb = wbgen.Bank(rtio_csrs)
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