forked from M-Labs/artiq
1
0
Fork 0

soc/target: use minicon by default

This commit is contained in:
Sebastien Bourdeauducq 2014-11-28 10:21:43 +08:00
parent 41ecf09873
commit 44ec3eae3d
1 changed files with 5 additions and 2 deletions

View File

@ -45,8 +45,11 @@ class ARTIQMiniSoC(BaseSoC):
}
csr_map.update(BaseSoC.csr_map)
def __init__(self, platform, cpu_type="or1k", with_test_gen=False, **kwargs):
BaseSoC.__init__(self, platform, cpu_type=cpu_type, **kwargs)
def __init__(self, platform, cpu_type="or1k", ramcon_type="minicon",
with_test_gen=False, **kwargs):
BaseSoC.__init__(self, platform,
cpu_type=cpu_type, ramcon_type=ramcon_type,
**kwargs)
platform.add_extension(_tester_io)
self.submodules.leds = gpio.GPIOOut(Cat(