2b44786f73
drtio: add repeater input support
2018-09-17 23:45:27 +08:00
d38755feff
drtio: implement destination state checks on operations
2018-09-15 15:55:45 +08:00
1ef39a98a7
drtio: implement per-destination buffer space
2018-09-13 16:16:32 +08:00
0befec7d26
drtio: improve repeater error reports
2018-09-12 20:54:01 +08:00
edf403b837
drtio: improve error reporting
2018-09-12 15:44:34 +08:00
95432a4ac1
drtio: remove old debugging features
2018-09-12 13:01:27 +08:00
41972d6773
drtio: rt_packet_satellite CRI fixes
2018-09-11 22:19:55 +08:00
051bafbfd9
drtio: ensure 2 cycles between frames on the link
...
This gives time for setting chan_sel before cmd on CRI.
2018-09-11 22:18:42 +08:00
251b9a2b0d
drtio: do not lock up master when satellite repeatedly fails to answer buffer space reqs
2018-09-11 22:17:57 +08:00
df61b85988
drtio: fix imports
2018-09-09 14:11:32 +08:00
ec62eb9373
drtio: minor cleanup
2018-09-07 17:51:38 +08:00
87e0384e97
drtio: separate aux controller
...
This helps with managing CSR groups and heterogeneous (satellite/repeaters) DRTIO cores.
2018-09-05 17:56:58 +08:00
92be9324df
add missing files
2018-09-05 16:09:02 +08:00
2884d595b3
drtio: add rt_controller_repeater
2018-09-05 16:08:40 +08:00
839f748a1d
drtio: add external TSC to repeater
2018-09-05 15:55:20 +08:00
5f20d79408
drtio: add timeout on satellite internal CRI buffer space request
2018-09-05 14:12:11 +08:00
778f1de121
drtio: add TSC sync and missed command detection to rt_packet_repeater
2018-09-03 18:26:13 +08:00
00fabee1ca
drtio: fix rt_packet_repeater timeout
2018-09-03 09:57:15 +08:00
f3fe818049
rtio: refactor TSC to allow sharing between cores
2018-09-03 09:48:12 +08:00
0fe2a6801e
drtio: forward destination with channel
2018-09-02 15:50:23 +08:00
6768dbab6c
drtio: add buffer space support to rt_packet_repeater
2018-09-02 14:38:37 +08:00
88b7529d09
drtio: share CDC
2018-09-02 14:37:29 +08:00
078c862618
drtio: add repeater (WIP, write only)
2018-09-01 21:07:55 +08:00
4f963e1e11
drtio: minor cleanup
2018-08-30 15:15:32 +08:00
ce6e390d5f
drtio: expose internal satellite CRI
2018-08-30 12:41:09 +08:00
eb9e9634df
siphaser: support 125 MHz rtio clk
...
keep the phase shift increment/decrement at 1/(56*8) rtio_clk
cycles
2018-08-29 17:53:48 +00:00
aa64e6c1c6
cri: add buffer space request protocol
2018-08-29 15:16:43 +08:00
e2a49ce368
drtio: support external IBUFDS_GTE3
2018-08-07 20:52:45 +08:00
c1db02a351
drtio/gth_ultrascale: disable IBUFDS_GTE3 until stable_clkin
...
Precaution against HMC7043 noise issues.
2018-06-21 22:56:07 +08:00
e29536351d
drtio: resync SYSREF when TSC is loaded
2018-06-21 17:00:32 +08:00
9142a5ab8a
rtio: expose coarse timestamp in RTIO and DRTIO satellite cores
2018-06-20 17:39:54 +08:00
07d4145a35
correct documented siphaser VCO frequency [NFC]
2018-06-04 20:53:43 +08:00
2426fea3f2
siphaser: support external reference for the freerunning 150MHz
2018-05-12 22:57:11 +08:00
2edf65f57b
drtio: fix satellite minimum_coarse_timestamp clock domain ( #947 )
2018-03-13 00:20:57 +08:00
1d081ed6c2
drtio: print diagnostic info on satellite write underflow ( #947 )
2018-03-12 23:41:19 +08:00
3fbcf5f303
drtio: remove TSC correction ( #40 )
2018-03-09 10:36:17 +08:00
e38187c760
drtio: increase default underflow margin. Closes #947
2018-03-09 00:49:24 +08:00
8bd15d36c4
drtio: fix error CSR edge detection ( #947 )
2018-03-08 16:28:25 +08:00
916197c4d7
siphaser: cleanup
2018-03-07 11:15:44 +08:00
f7aba6b570
siphaser: fix phase_shift_done CSR
2018-03-07 10:57:30 +08:00
acfd9db185
siphaser: minor cleanup
2018-03-07 10:57:30 +08:00
7d98864b31
sayma: enable siphaser
2018-03-07 10:57:30 +08:00
c34d00cbc9
drtio: implement Si5324 phaser gateware and partial firmware support
2018-03-07 10:57:30 +08:00
Florent Kermarrec
5b3d6d57e2
drtio/gth: power down rx on restart (seems to make link initialization reliable)
2018-03-06 11:49:28 +01:00
Florent Kermarrec
64b05f07bb
drtio/gth: use parameters from Xilinx transceiver wizard
2018-03-06 11:02:15 +01:00
Florent Kermarrec
45f1e5a70e
drtio/gth: cleanup import
2018-03-06 10:56:07 +01:00
6aaa8bf9d9
drtio: fix link error generation
2018-03-04 23:20:13 +08:00
928d5dc9b3
drtio: raise RTIOLinkError if operation fails due to link lost ( #942 )
2018-03-04 01:02:53 +08:00
Florent Kermarrec
2896dc619b
drtio/transceiver/gth: fix multilane
2018-02-28 14:15:40 +01:00
Florent Kermarrec
1f0d955ce4
drtio/transceiver/gtp: implement tx multi lane phase alignment sequence
2018-02-27 12:32:25 +01:00
Florent Kermarrec
5b0f9cc6fd
drtio/transceiver/gth: fix single transceiver case
2018-02-23 12:15:47 +01:00
Florent Kermarrec
b4ba71c7a4
drtio/transceiver/gth: implement tx multi lane phase alignment sequence (fix merge issue...)
2018-02-23 08:37:05 +01:00
Florent Kermarrec
820c834251
drtio/transceiver/gth: implement tx multi lane phase alignment sequence
2018-02-22 22:14:15 +01:00
fa0d929b4d
drtio: reorganize RX synchronizers
2018-02-22 15:21:23 +08:00
f060d6e1b3
drtio: increase A7 clock aligner check period
2018-02-20 18:50:35 +08:00
f15b4bdde7
style
2018-02-20 18:47:59 +08:00
ad2c9590d0
drtio: rewrite/fix reset and link bringup/teardown
2018-02-20 17:26:43 +08:00
52049cf36a
drtio: add Xilinx RX synchronizer
2018-02-19 17:49:43 +08:00
Florent Kermarrec
f5831af535
drtio/transceiver/gtp_7series_init: don't reset gtp rx on power down
2018-02-19 10:03:19 +01:00
Florent Kermarrec
89a158c0c9
drtio/transceiver/gtp_7series_init: remove dead code
2018-02-19 10:02:23 +01:00
Florent Kermarrec
782051f474
drtio/transceiver/gtp_7series_init: add no retiming on gtp resets
2018-02-19 09:59:50 +01:00
94c20dfd4d
drtio: fix misleading GenericRXSynchronizer comment
2018-02-19 00:47:54 +08:00
83abdd283a
drtio: signal stable clock input to transceiver
2018-02-18 22:29:30 +08:00
Florent Kermarrec
bfdda340fd
drtio/transceiver/gtp_7series: use parameters from xilinx wizard
2018-02-13 00:23:59 +01:00
Florent Kermarrec
180c28551d
drtio/gateware/transceiver/gtp_7series: add power down state before reset on rx (seems to make restart reliable)
2018-02-09 20:17:02 +01:00
d6157514c7
gtp_7series: flexible QPLL channel selection
2018-01-23 12:03:09 +08:00
98a5607634
gtp_7series: set clock muxes correctly for second QPLL channel
2018-01-23 10:39:20 +08:00
25fee1a0bb
gtp_7series: use QPLL second channel
2018-01-23 10:15:49 +08:00
626075cbc1
gtp_7series: simplify TX clocking
2018-01-23 09:49:23 +08:00
401e57d41c
gtp_7series: fix nchannels assert
2018-01-23 01:28:01 +08:00
5198c224a2
sayma,kasli: use new pin names
2018-01-22 11:51:07 +08:00
Florent Kermarrec
d27727968c
add artix7 gtp (3gbps), share clock aligner with gth_ultrascale
2018-01-19 12:17:54 +01:00
dc593ec0f0
Merge branch 'rtio-sed' into sed-merge
2018-01-10 12:04:54 +08:00
6e0288e568
drtio: fix GTH CPLL reset
2017-12-30 12:14:36 +08:00
8153cfa88f
drtio/gth: add probes on {tx,rx}_init.done
2017-12-28 16:49:08 +08:00
c086149782
drtio/gth: use async microscope probes
2017-12-28 16:37:40 +08:00
6801921fc0
drtio: instrument GTH transceiver
2017-12-28 15:03:14 +08:00
f8c8f3fe26
drtio: fix GTH clock domains
2017-12-23 07:21:44 +08:00
c57b66497c
drtio: refactor/simplify GTH, use migen
2017-12-23 01:19:44 +08:00
77897228ca
drtio: add GTH transceiver code from Florent (197c79d47)
2017-12-22 18:01:28 +08:00
ebdbaaad32
drtio: remove KC705/GTX support
2017-12-22 17:51:42 +08:00
6c049ad40c
rtio: report channel numbers in asynchronous errors
2017-09-29 16:32:57 +08:00
5437f0e3e3
rtio: make sequence errors consistently asychronous
2017-09-29 14:40:06 +08:00
73043c3464
drtio: disable SED lane spread
...
Doesn't improve things as the buffer space would still be determined
by the full FIFO, and adds unnecessary logic.
2017-09-26 16:46:09 +08:00
e430d04d3f
drtio: remove obsolete import
2017-09-24 12:49:21 +08:00
20d79c930c
drtio: use SED and input collector
2017-09-24 12:23:47 +08:00
9ccd95e10d
drtio: remove spurious signals
2017-09-19 20:48:12 +08:00
171a2d19a0
drtio: remove spurious signals
2017-09-19 20:47:37 +08:00
30e7765a2e
drtio: add missing import
2017-09-16 14:36:27 +08:00
a3bb6c167c
rtio: use SED
2017-09-16 14:13:42 +08:00
a201a9abd9
drtio: multilink transceiver interface
2017-07-18 13:27:33 +08:00
74cf074538
drtio: remove sawg_3g from example targets, add converter SPI bus from FMC-EBZ at all times
2017-06-21 17:01:52 +08:00
729e7b52f0
drtio: collision/replace fixes
2017-04-06 16:33:49 +08:00
83d87b5805
drtio: remove outdated comment
2017-04-06 12:45:10 +08:00
5e3aef45dc
drtio: support collision/replace + detect sequence errors at satellite
2017-04-06 01:06:56 +08:00
whitequark
17b5388259
gateware: remove one stray CRI arbiter remnant.
2017-04-05 16:38:56 +00:00
db3118b916
drtio: use BlindTransfer for error reporting
2017-04-03 00:18:07 +08:00
8c414cebc7
drtio: report busy errors
2017-04-03 00:11:08 +08:00
008678b741
drtio: add infrastructure for reporting busy/collision errors
2017-04-02 23:45:55 +08:00
0a687b7902
drtio: report satellite errors through firmware
2017-04-01 12:18:00 +08:00
b74d6fb9ba
make collision and busy asynchronous errors, and simplify CPU/gateware handshake for output errors and reads
2017-03-27 16:32:23 +08:00
56fd9b3b4b
drtio: input fixes
2017-03-14 14:14:43 +08:00
95ede18809
drtio: support PHY latency compensation
2017-03-14 00:01:38 +08:00
497c795d8c
drtio: input support (untested)
2017-03-13 23:54:44 +08:00
d1b9f9d737
drtio: rt_packets → rt_packet
2017-03-13 00:10:07 +08:00
6b7c781ff2
drtio: introduce 'standard request' interface in RT packet layer
2017-03-13 00:08:03 +08:00
2b8729f326
drtio: clear any read request on satellite reset
2017-03-13 00:00:38 +08:00
1e47e638bb
drtio: implement inputs in RTPacketSatellite, reorganize code
2017-03-07 00:46:59 +08:00
1e6a33b586
rtio: handle input timeout in gateware
...
The information passed by the runtime will be used by the DRTIO core
to poll the remote side appropriately.
2017-03-03 17:37:47 +08:00
b8d89d56b1
drtio: add GenericRXSynchronizer
2017-01-15 13:44:43 -06:00
0edffb54c2
drtio: fix packet truncation detection in RTPacketSatellite
2017-01-13 09:29:22 -06:00
6805feb494
drtio: report truncated packets
2017-01-12 23:44:45 -06:00
7c699e2f80
drtio: add FIFO space request count debug API
2017-01-11 13:48:14 -06:00
c25186fae1
drtio: print packet error descriptions in log
2017-01-10 18:03:01 -06:00
98598df78e
rtio: keep retrying on get FIFO space timeout
2017-01-10 16:12:32 -06:00
e624f45369
drtio: remove FIFO empty local detection optimization
...
It optimizes a marginal case, it is difficult to get right
(need to know the size of the FIFO for each channel), and
it adds complexity and potential bug sources.
2017-01-10 14:31:46 -06:00
e9592105ce
drtio: fix aux controller clock domain mistakes
2016-12-14 10:16:45 +08:00
3b5abae935
drtio: fix clock domain conflict
2016-12-13 14:19:49 +08:00
4b61020b27
drtio: reset more local state
2016-12-12 18:48:10 +08:00
d99e64effd
drtio: clear any stale FIFO space reply
2016-12-12 18:02:56 +08:00
4c59c0fecf
Revert "drtio: order resets wrt writes"
...
This reverts commit 9a048c2b3a
.
2016-12-12 17:49:07 +08:00
8f747fa209
drtio: clear underflow and sequence error on reset
2016-12-12 17:39:14 +08:00
9a048c2b3a
drtio: order resets wrt writes
2016-12-12 17:18:07 +08:00
bc36bda94a
perform RTIO init on comms CPU side
2016-12-09 14:16:55 +08:00
4c3717932e
drtio: link layer debugging CSRs
2016-12-07 23:03:14 +08:00
5d145ff912
drtio: add false paths between sys and transceiver clocks
2016-12-03 23:03:01 +08:00
4b97b9f8ce
drtio: add clock constraints
2016-12-03 22:17:29 +08:00
6353f6d590
drtio: support different configurations and speeds
2016-12-02 17:22:22 +08:00
046b8bfd33
drtio: fix transmit datapath with transceiver width > max packet width
2016-11-27 13:19:12 +08:00
0903964488
drtio: large data fixes
2016-11-27 02:12:50 +08:00
8090abef5d
drtio: large data support
2016-11-25 17:04:09 +08:00
7cd27abaa6
drtio: do not reset remote TSC on reset command
2016-11-24 00:09:53 +08:00
07f2d84275
drtio: remote resets
2016-11-23 23:19:31 +08:00
e532261a9b
drtio: fix FullMemoryWE usage
2016-11-23 12:25:43 +08:00
9acc7d135e
gateware: common RTIO interface
2016-11-22 22:46:50 +08:00
02adae7397
drtio: fix link shutdown
2016-11-19 11:01:33 +08:00
381e58434f
drtio: handle link restarts at transceiver level
2016-11-19 10:46:56 +08:00
ba94ed8f4b
drtio: check for absence of disparity errors before claiming RX ready
2016-11-19 00:05:59 +08:00
4d07974a34
drtio: reset link from CPU
2016-11-18 17:45:33 +08:00
f040e27041
drtio: add timeout on FIFO get space request
2016-11-18 17:44:48 +08:00
bb047aabe9
drtio: simpler link layer
2016-11-17 22:32:39 +08:00
140bb0ecee
drtio: aux controller fixes
2016-11-16 19:44:03 +08:00
6c9965b444
drtio: aux controller fixes
2016-11-15 12:02:41 +08:00
e1394db861
drtio: aux controller minor fixes
2016-11-14 17:26:30 +08:00
84bd962ed5
drtio: integrate aux controller
2016-11-14 17:20:47 +08:00
a4d92716da
drtio: fix aux receiver, add aux transmitter
2016-11-14 17:18:54 +08:00
f2f131e0fb
drtio: add aux receiver (untested)
2016-11-14 00:04:53 +08:00
8a48d6d66e
drtio: fix typo
2016-11-09 22:15:42 +08:00
863934c4fa
drtio: more reliable link layer init
2016-11-09 22:03:47 +08:00
95acc9b9d4
drtio: allow specifying 7series RXSynchronizer initial phase
2016-11-08 16:52:40 +08:00