forked from M-Labs/artiq
drtio: clear any stale FIFO space reply
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@ -169,6 +169,7 @@ class RTController(Module):
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status_wait.eq(1),
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rt_packets_fifo_request.eq(1),
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rt_packets.write_stb.eq(1),
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rt_packets.fifo_space_not_ack.eq(1),
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If(rt_packets.write_ack,
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NextState("GET_FIFO_SPACE_REPLY")
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)
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