b74d6fb9ba
make collision and busy asynchronous errors, and simplify CPU/gateware handshake for output errors and reads
2017-03-27 16:32:23 +08:00
56fd9b3b4b
drtio: input fixes
2017-03-14 14:14:43 +08:00
95ede18809
drtio: support PHY latency compensation
2017-03-14 00:01:38 +08:00
497c795d8c
drtio: input support (untested)
2017-03-13 23:54:44 +08:00
d1b9f9d737
drtio: rt_packets → rt_packet
2017-03-13 00:10:07 +08:00
6b7c781ff2
drtio: introduce 'standard request' interface in RT packet layer
2017-03-13 00:08:03 +08:00
2b8729f326
drtio: clear any read request on satellite reset
2017-03-13 00:00:38 +08:00
1e47e638bb
drtio: implement inputs in RTPacketSatellite, reorganize code
2017-03-07 00:46:59 +08:00
1e6a33b586
rtio: handle input timeout in gateware
...
The information passed by the runtime will be used by the DRTIO core
to poll the remote side appropriately.
2017-03-03 17:37:47 +08:00
b8d89d56b1
drtio: add GenericRXSynchronizer
2017-01-15 13:44:43 -06:00
0edffb54c2
drtio: fix packet truncation detection in RTPacketSatellite
2017-01-13 09:29:22 -06:00
6805feb494
drtio: report truncated packets
2017-01-12 23:44:45 -06:00
7c699e2f80
drtio: add FIFO space request count debug API
2017-01-11 13:48:14 -06:00
c25186fae1
drtio: print packet error descriptions in log
2017-01-10 18:03:01 -06:00
98598df78e
rtio: keep retrying on get FIFO space timeout
2017-01-10 16:12:32 -06:00
e624f45369
drtio: remove FIFO empty local detection optimization
...
It optimizes a marginal case, it is difficult to get right
(need to know the size of the FIFO for each channel), and
it adds complexity and potential bug sources.
2017-01-10 14:31:46 -06:00
e9592105ce
drtio: fix aux controller clock domain mistakes
2016-12-14 10:16:45 +08:00
3b5abae935
drtio: fix clock domain conflict
2016-12-13 14:19:49 +08:00
4b61020b27
drtio: reset more local state
2016-12-12 18:48:10 +08:00
d99e64effd
drtio: clear any stale FIFO space reply
2016-12-12 18:02:56 +08:00
4c59c0fecf
Revert "drtio: order resets wrt writes"
...
This reverts commit 9a048c2b3a
2016-12-12 17:49:07 +08:00
8f747fa209
drtio: clear underflow and sequence error on reset
2016-12-12 17:39:14 +08:00
9a048c2b3a
drtio: order resets wrt writes
2016-12-12 17:18:07 +08:00
bc36bda94a
perform RTIO init on comms CPU side
2016-12-09 14:16:55 +08:00
4c3717932e
drtio: link layer debugging CSRs
2016-12-07 23:03:14 +08:00
5d145ff912
drtio: add false paths between sys and transceiver clocks
2016-12-03 23:03:01 +08:00
4b97b9f8ce
drtio: add clock constraints
2016-12-03 22:17:29 +08:00
6353f6d590
drtio: support different configurations and speeds
2016-12-02 17:22:22 +08:00
046b8bfd33
drtio: fix transmit datapath with transceiver width > max packet width
2016-11-27 13:19:12 +08:00
0903964488
drtio: large data fixes
2016-11-27 02:12:50 +08:00
8090abef5d
drtio: large data support
2016-11-25 17:04:09 +08:00
7cd27abaa6
drtio: do not reset remote TSC on reset command
2016-11-24 00:09:53 +08:00
07f2d84275
drtio: remote resets
2016-11-23 23:19:31 +08:00
e532261a9b
drtio: fix FullMemoryWE usage
2016-11-23 12:25:43 +08:00
9acc7d135e
gateware: common RTIO interface
2016-11-22 22:46:50 +08:00
02adae7397
drtio: fix link shutdown
2016-11-19 11:01:33 +08:00
381e58434f
drtio: handle link restarts at transceiver level
2016-11-19 10:46:56 +08:00
ba94ed8f4b
drtio: check for absence of disparity errors before claiming RX ready
2016-11-19 00:05:59 +08:00
4d07974a34
drtio: reset link from CPU
2016-11-18 17:45:33 +08:00
f040e27041
drtio: add timeout on FIFO get space request
2016-11-18 17:44:48 +08:00
bb047aabe9
drtio: simpler link layer
2016-11-17 22:32:39 +08:00
140bb0ecee
drtio: aux controller fixes
2016-11-16 19:44:03 +08:00
6c9965b444
drtio: aux controller fixes
2016-11-15 12:02:41 +08:00
e1394db861
drtio: aux controller minor fixes
2016-11-14 17:26:30 +08:00
84bd962ed5
drtio: integrate aux controller
2016-11-14 17:20:47 +08:00
a4d92716da
drtio: fix aux receiver, add aux transmitter
2016-11-14 17:18:54 +08:00
f2f131e0fb
drtio: add aux receiver (untested)
2016-11-14 00:04:53 +08:00
8a48d6d66e
drtio: fix typo
2016-11-09 22:15:42 +08:00
863934c4fa
drtio: more reliable link layer init
2016-11-09 22:03:47 +08:00
95acc9b9d4
drtio: allow specifying 7series RXSynchronizer initial phase
2016-11-08 16:52:40 +08:00
bcb5053fb6
drtio: fix master TSC KCSR readout
2016-11-08 16:40:50 +08:00
de47123737
drtio: connect RST and LOCKED on 7series RXSynchronizer MMCM
2016-11-05 00:24:49 +08:00
df7294792c
drtio: break some RT features into manager, add echo request CSR
2016-11-04 19:38:24 +08:00
1145a193dd
drtio: fix ack of echo and set_time requests
2016-11-04 18:36:43 +08:00
3da1cce783
drtio: add packet counters
2016-11-04 17:53:42 +08:00
747da3da15
drtio: differentiate local and remote unknown packet type errors
2016-11-04 15:17:19 +08:00
f76aa249ce
drtio: squelch 7series RXSynchronizer outputs when MMCM is unlocked
2016-11-04 15:16:48 +08:00
6a75837261
drtio: fix link_layer remote RX ready detection
2016-11-03 20:15:04 +08:00
1d027ffa95
drtio: fix gtx_7series comma alignment
2016-11-03 20:14:11 +08:00
ba58a8affd
drtio/gtx_7series: paranoid reset deglitching
2016-11-02 18:30:22 +08:00
bee9774bd5
drtio: add link layer status CSR
2016-11-02 13:09:13 +08:00
0c1a76d668
unify rtio/drtio kernel interface
2016-11-01 00:30:16 +08:00
07ad00c1ca
drtio: split kernel/system CSRs
2016-10-31 18:09:36 +08:00
9aa94e1a2d
adapt to migen/misoc changes
2016-10-31 00:53:01 +08:00
7c05dccf65
drtio: add support for 125MHz clock on GTX_1000BASE_BX10
2016-10-29 17:30:29 +08:00
95def81c03
drtio: squelch frame signals until link layer ready
2016-10-29 17:05:30 +08:00
4f6241283c
drtio: always use NoRetiming on MultiReg inputs
2016-10-29 16:37:53 +08:00
929a7650a8
drtio: fixes
2016-10-26 22:03:44 +08:00
45621934fd
drtio: forward errors to CSR
2016-10-26 22:03:05 +08:00
7f8e53aa5c
drtio: more fixes and tests
2016-10-26 11:48:47 +08:00
f763b519f4
drtio: fix channel selection
2016-10-26 00:33:21 +08:00
ad042de954
drtio: fixes, basic TTL working in simulation
2016-10-25 12:41:16 +08:00
a4e85081aa
drtio: more simple fixes
2016-10-24 23:32:49 +08:00
029e0d95b7
drtio: simple fixes
2016-10-24 23:10:15 +08:00
c39987b617
drtio: handle underflow/sequence error CSRs
2016-10-24 20:46:55 +08:00
7dd6eb2f5e
drtio: add RT write controller
2016-10-24 19:50:13 +08:00
83bec06226
drtio: fifo level -> fifo space
2016-10-24 15:59:12 +08:00
aa8e211735
drtio/rt_packets: fix
2016-10-22 13:03:35 +08:00
67c19ab178
drtio: RTPacketMaster RX, untested
2016-10-22 01:04:14 +08:00
3b4a40401a
drtio: RTPacketMaster TX (WIP)
2016-10-21 22:46:14 +08:00
1e313afe64
drtio: CrossDomainNotification
2016-10-21 22:45:45 +08:00
c71c4c89e0
drtio: change data direction in _CrossDomainRequest
2016-10-21 22:44:47 +08:00
6a88229e6a
drtio: CrossDomainRequest
2016-10-20 23:37:59 +08:00
9790c5d9ed
drtio/iot: FIFO level
2016-10-19 18:04:03 +08:00
71480c4d15
drtio: fix mmcm_mult
2016-10-18 17:28:03 +08:00
9752ffe3d1
drtio: various fixes
2016-10-17 19:23:08 +08:00
d3b274fc4d
drtio: synchronizer MMCM
2016-10-16 17:40:58 +08:00
03d3a85e75
drtio: RX clock alignment and ready
2016-10-15 18:36:27 +08:00
08e4aa3e3f
drtio: GTX WIP
2016-10-14 00:36:13 +08:00
c548a65ec3
drtio: clock domains
2016-10-14 00:34:59 +08:00
018f6d1b52
drtio: implement basic IOT
2016-10-11 17:59:22 +08:00
a40b39e9a2
drtio: structure
2016-10-10 23:12:12 +08:00
87ec333f55
drtio: implement basic writes, errors, fifo levels on satellite
2016-10-10 00:13:41 +08:00
23b3302200
drtio: implement TSC load in satellite
2016-10-07 19:30:53 +08:00
cb0d1549c6
drtio: add rt_packets TX datapath, fixes
2016-10-07 15:35:29 +08:00
76bac21d14
drtio: RT RX datapath, untested
2016-10-06 18:51:20 +08:00
1e0c6d6d5d
drtio: monitor received link_init
2016-09-30 11:25:06 +08:00
cefb9e1405
drtio: add full link layer
2016-09-27 21:41:57 +08:00
08772f7a71
drtio: add RX ready signaling
2016-09-27 19:02:54 +08:00
95d7cba34a
drtio: fixes, add aux packet test
2016-09-27 12:46:01 +08:00
e59142e344
drtio: use additive scrambler reset by link init
2016-09-27 11:38:05 +08:00
8a92c2c7e5
drtio: add RX link layer, fixes, simple loopback demo
2016-09-27 11:23:29 +08:00
4e47decdbc
drtio: add scrambler/descrambler and test
2016-09-26 14:14:14 +08:00
fa83ad0d9c
drtio: add TX link layer
2016-09-26 12:53:10 +08:00
