David Nadlinger
1e443a3aea
coredevice: Reuse Target.little_endian for protocol endianness [nfc]
2021-01-21 09:11:54 +01:00
ec72eeda46
coredevice: use device endian for kernel and RPC
2021-01-21 09:07:48 +01:00
3832b261b1
firmware: optimize integer array/list rpc
2021-01-21 09:05:17 +01:00
88b14082b6
drtio/transceiver/gtx: delete obsolete modules
2021-01-20 15:05:32 +08:00
9daf77bd58
kc705: add multichannel support on satellite
...
* Two DRTIO channels (i.e. satellite and repeater) are enabled by default.
* User can choose either the SFP or SMA as the satellite channel (by passing `--drtio-sat sfp` or --drtio-sat sma` to the argparser), and the unchosen would become the repeater channel.
2021-01-20 15:05:32 +08:00
52afd4ef6b
kc705: add GTX multilane support, add multichannel support on master
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* One DRTIO master channel is enabled by default.
* User can set the SMA as the 2nd master channel (by passing --drtio-sma to the argparser).
* Multi-channel (i.e. with repeaters) on KC705 satellite is supported but has not been implemented yet.
2021-01-20 15:05:32 +08:00
f6d39fd6ba
kc705: revive DRTIO master with updated syntax
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* KC705 master variant now uses Si5324 as synthesiser.
* Multi-channel has not been implemented yet.
2021-01-20 15:05:31 +08:00
f25e86e934
kc705: revive DRTIO satellite with updated syntax, update GTX
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* Multi-channel has not been implemented yet.
2021-01-20 11:25:38 +08:00
David Nadlinger
c229e76d07
compiler: Add accidentally omitted note to invalid RPC type diagnostic
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Might be a minor quality-of-life employment, but there
isn't a test case for this anyway.
2021-01-20 01:49:16 +01:00
261870bdee
phaser: fix oscillator rtio address for even base addresses
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close #1580
2021-01-19 16:56:50 +01:00
David Nadlinger
f11aef74b4
gui: Add context menu entry to close all applets
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This is occasionally very useful if a large number of
applets were left open (e.g. spawned via CCB).
2021-01-17 11:56:03 +01:00
c675488a99
reorganize JSON schema files
2021-01-16 10:43:14 +08:00
c6807f4594
kasli_generic: validate description against schema, use defaults from schema
2021-01-16 10:35:23 +08:00
45b5cfce05
gateware: add a kasli_generic.schema.json
2021-01-16 10:35:23 +08:00
David Nadlinger
9b39b1e328
test: Add coredevice tests for matrix multiplication
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Also includes a regression test specifically for
mixing multiple types in one kernel.
2021-01-12 03:02:07 +01:00
David Nadlinger
f0284b2549
compiler: Fix collision of environments in matmult implementations
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GitHub: Fixes #1578 .
2021-01-12 03:02:07 +01:00
David Nadlinger
362f8ecb69
compiler: Add test for disallowing type-unstable array-assign binops
2021-01-12 03:02:07 +01:00
David Nadlinger
96692791cf
compiler: Implement assigning binops for arrays
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GitHub: Fixes #1579 .
2021-01-12 03:02:07 +01:00
5b5db1433b
Revert "compiler: enabled vectorize option"
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This reverts commit 636898c302
2021-01-11 19:43:12 +08:00
636898c302
compiler: enabled vectorize option
2021-01-11 16:31:24 +08:00
6a5f5088e2
frontend: sinara_tester: add mirny test
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Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
2021-01-05 17:01:01 +08:00
cff7bcc122
Merge branch 'master' ( 43be383c86) into k7-drtio
2020-12-31 13:30:46 +08:00
dc7addf394
Revert "drtio: remove KC705/GTX support"
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This reverts commit ebdbaaad32
2020-12-31 13:29:50 +08:00
43be383c86
kasli v2.0: drive TX_DISABLE low on all SFPs ( fixes #1570 )
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This was the same problem as #1508 but on SFP1..3
2020-12-23 00:10:12 +08:00
43ecb3fea6
sayma: add comments about CPLL line rate on KU GTH
2020-12-19 17:05:20 +08:00
8cd794e9f4
jesd204_tools: use new syntax from jesd204b core
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* requires jesd204b changes as in https://github.com/HarryMakes/jesd204b/tree/gth
2020-12-19 17:05:20 +08:00
Aadit Rahul Kamat
19f75f1cfd
artiq_browser: update h5py api call
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Signed-off-by: Aadit Rahul Kamat <aadit.k12@gmail.com>
2020-12-17 14:23:16 +08:00
a017dafee6
ddb_template: mirny_cpld: add default value
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Signed-off-by: Oi Chee Cheung <dc@m-labs.hk>
2020-12-15 11:00:59 +08:00
73271600a1
jdcg: STPL tests now perform after DAC initialization
2020-12-14 18:03:31 +08:00
occheung
3f631c417d
artiq_ddb_template: mirny_cpld: add refclk, clk_sel args
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Signed-off-by: occheung <occheung@connect.ust.hk>
2020-12-14 13:38:20 +08:00
occheung
33d39b261a
artiq_ddb_template: mirny_cpld: rename adf5355 to adf5356
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Signed-off-by: occheung <occheung@connect.ust.hk>
2020-12-14 13:38:20 +08:00
4b10273a2d
gui: quamash -> qasync
2020-12-12 21:59:25 +08:00
1ce505c547
coredevice: remove obsolete watchdog code ( #1458 )
2020-12-08 13:25:39 +08:00
072053c3b2
compiler: remove obsolete watchdog code ( #1458 )
2020-12-08 13:25:08 +08:00
ccdc741e73
sayma_amc: fix --sfp argument
2020-12-07 18:02:36 +08:00
33285253fb
Merge pull request #1558 from quartiq/phased_ddb_fix
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Phased ddb fix
2020-12-04 16:38:40 +01:00
Leon Riesebos
3b2c225fc4
allow dashboard to close if no connection can be made to moninj
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Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2020-12-04 23:00:23 +08:00
Leon Riesebos
94271504dd
Added RuntimeError to prelude to make the name available in kernels
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closes #1477
Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2020-12-04 22:59:08 +08:00
SingularitySurfer
9b4b550f76
5 is correct.
2020-12-04 14:49:30 +00:00
SingularitySurfer
cba631610c
fixed phaser number of rtio channels
2020-12-04 14:40:59 +00:00
6ceb3f3095
Merge pull request #1551 from quartiq/tester_tweaks
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modified urukul instructions in sinara tester script
2020-11-26 16:22:44 +01:00
eda4850f64
Revert "fixes with statement with multiple items"
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This reverts commit 88d346fa26
2020-11-22 11:57:22 +08:00
8e46c3c1fd
Revert "compiler: fix incorrect with behavior"
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This reverts commit fe6115bcbb
2020-11-22 11:57:21 +08:00
SingularitySurfer
0605267424
modified urukul instructions
2020-11-19 12:20:34 +00:00
3e38833020
ad9910: fix turns_to_pow return-type on host
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When run on the host, the `turns_to_pow` retrun-type is numpy.int64.
Sensibly, the compiler does not attempt to convert `numpy.int64` to `int32`.
Signed-off-by: Marius Weber <marius.weber@physics.ox.ac.uk>
2020-11-13 18:54:47 +01:00
David Nadlinger
9ff47bacab
compiler: Provide libm special functions (erf, Bessel functions, …)
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Tests hard-depend on SciPy to make sure this is exercised
during CI.
2020-11-11 19:15:30 +01:00
David Nadlinger
a5dcd86fb8
test/lit: Rename array to avoid conflict with standard library
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The old name created problems if a test dependency (e.g. NumPy/SciPy)
ends up importing the system `array` module internally somewhere.
2020-11-11 17:42:53 +01:00
David Nadlinger
d95e619567
compiler: Implement binary NumPy math functions (arctan2, …)
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The bulk of the diff is just factoring out the implementation
for binary arithmetic implementations, to be reused for binary
function calls.
2020-11-11 01:35:28 +01:00
David Nadlinger
bc6fbecbda
compiler, firmware: Do not expose abort() to kernels
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This was only exposed for the assert implementation, and
does not exist on Zynq.
2020-11-10 20:40:18 +01:00
David Nadlinger
292043a0a7
compiler: Raise AssertionErrors instead of abort()ing on all targets
2020-11-10 20:40:18 +01:00
Leon Riesebos
d8a5a8f568
fixed value scaling issue for the center scan gui widget
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Signed-off-by: Leon Riesebos <leon.riesebos@duke.edu>
2020-11-10 18:42:18 +01:00
Etienne Wodey
dbcac62fd0
coredevice: adf5356: fix/adjust docs
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Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
e8730a7e14
coredevice: adf5356: add test for failed PLL lock
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Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
3844123c13
coredevice: adf5356: add enable/disable and power setting for outA
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Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
61dc2b8b64
coredevice: adf5356: add some tests
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Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
b200465cce
coredevice: adf5355: rename to adf5356
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Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
d433f6e86d
coredevice: adf5355: more general PLL parameters calculation
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Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
Etienne Wodey
b856df7c35
coredevice: adf5355: cleanup, style
2020-11-10 10:49:22 +08:00
Etienne Wodey
211500089f
coredevice: mirny/adf5355: add basic high-level interface
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Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-11-10 10:49:22 +08:00
David Nadlinger
4f311e7448
compiler: Raise exception on failed assert()s rather than panic
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This allows assert() to be used on Zynq, where abort() is not
currently implemented for kernels. Furthermore, this is arguably
the more natural implementation of assertions on all kernel targets
(i.e. where embedding into host Python is used), as it matches host
Python behavior, and the exception information actually makes it to
the user rather than leading to a ConnectionClosed error.
Since this does not implement printing of the subexpressions, I
left the old print+abort implementation as default for the time
being.
The lit/integration/instance.py diff isn't just a spurious change;
the exception-based assert implementation exposes a limitation in
the existing closure lifetime tracking algorithm (which is not
supposed to be what is tested there).
GitHub: Fixes #1539 .
2020-11-10 00:51:24 +01:00
David Nadlinger
f0ec987d23
test/coredevice: Avoid NumPy deprecation warning
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Jagged arrays are no longer silently inferred as dtype=object,
as per NEP-34.
The compiler ndarray (re)implementation is unchanged, so the
test still fails.
2020-11-09 23:53:50 +01:00
ea95d91428
wrpll: separate collector reset
2020-11-09 17:57:13 +08:00
David Nadlinger
a97b4633cb
compiler: Add math_fns module docstring [nfc]
2020-10-31 19:06:00 +01:00
Etienne Wodey
ecef5661ce
coredevice/phaser: fix typos in docstring
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Signed-off-by: Etienne Wodey <wodey@iqo.uni-hannover.de>
2020-10-29 20:27:08 +01:00
David Nadlinger
d672d2fc35
test/coredevice: Fixup NumPy references
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This fixes a copy/paste refactoring mistake from d5f90f6c9
2020-10-20 02:49:05 +02:00
David Nadlinger
d5f90f6c9f
compiler: Fix quoting of multi-dimensional arrays
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GitHub: Fixes m-labs/artiq#1523 .
2020-10-20 01:40:14 +02:00
David Nadlinger
d161fd5d84
compiler: Properly expand dimensions for array([]) with ndarray elements
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This matches host NumPy behaviour (and, in either case, was
previously broken, as it still continued past the array element
type).
2020-10-20 01:40:14 +02:00
David Nadlinger
94489f9183
compiler: Fix inference order issue in multi-dim. subscript
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This will be caught by the test for an imminent array quoting fix.
2020-10-20 01:40:14 +02:00
a9dd0a268c
Merge pull request #1533 from m-labs/phaser
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Phaser
2020-10-19 09:30:12 +02:00
30d1acee9f
fastlink: fix fastino style link
2020-10-18 20:43:21 +00:00
d98357051c
add ref data
2020-10-18 20:43:21 +00:00
139385a571
fastlink: add fastino test
2020-10-18 17:11:09 +00:00
d185f1ac67
wrpll: fix mulshift (2)
2020-10-17 00:32:02 +08:00
3f076bf79b
wrpll: fix mulshift
2020-10-16 22:05:37 +08:00
90017da484
firmware: remove obsolete watchdog code ( #1458 )
2020-10-15 18:38:00 +08:00
59703ad31d
test: stop checking for artiq_netboot
2020-10-15 16:18:56 +08:00
7a5996ba79
artiq_netboot: moved to git.m-labs.hk/M-Labs/artiq-netboot
2020-10-15 16:14:22 +08:00
57ee57e7ea
runtime: fix metlino si5324 init (2)
2020-10-14 18:41:56 +08:00
ac35548d0f
runtime: fix metlino si5324 init
2020-10-14 12:57:25 +08:00
35c61ce24d
si5324: unify N31 settings when used as synthesizer
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Closes #1528
2020-10-12 14:45:52 +08:00
hartytp
a058be2ede
wrpll: fix test_helper_collector
2020-10-08 19:43:12 +08:00
d0d0a02fd0
test: added lit test for new error messages
2020-10-08 19:38:26 +08:00
e9988f9d3b
compiler: error message for custom operations
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Emit error messages for custom comparison and inclusion test,
instead of compiler crashing.
2020-10-08 19:38:26 +08:00
db62cf2abe
wrpll: convert tests to self-checking unittests
2020-10-08 18:38:01 +08:00
07d43b6e5f
wrpll: babysit Vivado DSP retiming
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Design now passes timing.
2020-10-08 17:51:27 +08:00
7dfb4af682
kasli2: work around vivado clock constraint problem
2020-10-08 16:31:39 +08:00
96a5df0dc6
kasli2: add false path constraint for wrpll helper clock
2020-10-08 16:19:44 +08:00
6248970ef8
wrpll: clean up matlab comparison test
2020-10-08 15:40:15 +08:00
hartytp
cd8c2ce713
wrpll: add test to compare collector+filter against Matlab simulation
2020-10-08 15:36:56 +08:00
hartytp
d780faf4ac
wrpll.si549: initialize the clock divider to a sensible value
2020-10-08 15:32:27 +08:00
hartytp
e6ff2ddc32
wrpll: add more diagnostics in firmware and adapt to recent gateware changes
2020-10-08 15:32:27 +08:00
hartytp
7d7be6e711
wrpll.core: move collector into helper CD so we can get tags out while the filters are reset
2020-10-08 15:32:27 +08:00
3fa5d0b963
wrpll: clean up sign extension
2020-10-08 15:32:27 +08:00
hartytp
87911810d6
wrpll.core: add CSRs to monitor the collector outputs
2020-10-08 15:32:27 +08:00
hartytp
f2f942a8b4
wrpll.ddmtd: remove CSRs from DDMTD
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We will gather then from the collector output so we can get all tags on the same cycle
2020-10-08 15:32:27 +08:00
hartytp
85bb641917
wrpll.ddmtd: fix first edge deglitcher
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The blind counter should be held in reset whenever the input is high,
not just when there is a rising edge (otherwise the counter runs down
during the main pulse and can then re-trigger on jitter from the falling edge)
2020-10-08 15:32:27 +08:00
hartytp
f3cd0fc675
wrpll.filters: the helper clipping threshold is currently way too low. Move clipping after the bitshift to increase a bit.
...
TODO: think about this and pick a sensible threshold (and also think about integrator anti windup)
2020-10-08 15:32:27 +08:00
hartytp
e5e648bde1
wrpll: add bit shift for collector helper output
2020-10-08 15:32:27 +08:00
hartytp
c9ae406ac6
wrpll: change the DDMTD helper frequency to match CERN, improve docs
2020-10-08 15:32:27 +08:00
hartytp
f6f6045f1a
wrpll.thls: fix make
2020-10-08 15:32:27 +08:00
hartytp
b44b870452
wrpll.filters: update to match Weida's MatLab simulations
2020-10-08 15:32:27 +08:00
hartytp
e9ab434fa7
wrpll.core: update for modified collector
2020-10-08 15:32:27 +08:00
17c952b8fb
wrpll: style
2020-10-08 15:32:27 +08:00
hartytp
ebb7ccbfd1
wrpll: document DDMTD collector and fix unwrapping
2020-10-08 15:32:27 +08:00
66401aee9c
dashboard: cleanup import
2020-10-07 19:24:54 +08:00
fe6115bcbb
compiler: fix incorrect with behavior
2020-10-07 18:59:35 +08:00
02f46e8b79
Fixes none to bool coercion
...
Fixes #1413 and #1414 .
2020-10-07 15:34:24 +08:00
88d346fa26
fixes with statement with multiple items
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Closes #1478
2020-10-07 15:33:34 +08:00
9214e0f3e2
firmware: fix Si5324 CKIN selection on Kasli 2.0
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https://github.com/sinara-hw/Kasli/issues/82#issuecomment-702129805
2020-10-02 20:35:32 +08:00
eecd97ce4c
phaser: debug and comments
2020-09-27 17:15:16 +00:00
c453c24fb0
phaser: tweak slacks
2020-09-26 21:16:08 +00:00
6c8bddcf8d
phaser: tune sync_dly
2020-09-26 21:13:00 +00:00
569e5e56cd
phaser: autotune and fix fifo_offset
2020-09-26 20:37:16 +00:00
2fba3cfc78
phaser: debug init, systematic bring-up
2020-09-25 20:54:59 +00:00
fec2f8b763
phaser: increase slack for iotest
2020-09-24 10:59:22 +00:00
a65239957f
ad53xx: distinguish errors
2020-09-24 10:52:03 +02:00
6e6480ec21
phaser: tweak slacks and errors, identify trf
2020-09-24 08:38:30 +00:00
03d5f985f8
phaser: another artiq-python signed integer quirk
2020-09-23 15:40:54 +00:00
ef65ee18bd
dac34h84: unflip spectrum, clear nco
2020-09-23 08:35:56 +00:00
50b4eb4840
Merge branch 'master' into phaser
...
* master: (26 commits)
fastino: documentation and eem pass-through
kasli2: forward sma_clkin to si5324
test: relax test_dma_playback_time on Zynq
rpc: fixed _write_bool
fastino: document/cleanup
build_soc: remove assertion that was used for test runs
metlino_sayma_ttl: Fix RTIO frequency & demo code (#1516 )
Revert "test: temporarily disable test_async_throughput"
build_soc: rename identifier_str to gateware_identifier_str
test: relax loopback gate timing
test: temporarily disable test_async_throughput
test: relax test_pulse_rate on Zynq
test: skip NonexistentI2CBus if I2C is not supported
build_soc: override identifier_str only for gateware
examples: add Metlino master, Sayma satellite with TTLOuts via FMC
sayma_amc: add support for 4x DIO output channels via FMC
fmcdio_vhdci_eem: fix pin naming
build_soc: add identifier_str override option
RPC: optimization by caching
test: improved test_performance
...
2020-09-22 16:02:25 +00:00
c55f2222dc
fastino: documentation and eem pass-through
...
* Repeat information about matching log2_width a few times
in the hope that people read it. #1518
* Pass through log2_width in kasli_generic json. close #1481
* Check DAC value range. #1518
2020-09-22 17:58:53 +02:00
ad096f294c
phaser: add hitl test exercising the complete API
2020-09-22 15:35:19 +00:00
85d16e3e5f
phaser: tweaks
2020-09-22 15:27:38 +00:00
5c76f5c319
tester: add phaser
2020-09-22 14:36:49 +00:00
fd5e221898
phaser: dac and trf register maps, init code
2020-09-22 14:08:39 +00:00
3e036e365a
phaser: nco, settings and init tweaks
2020-09-22 09:52:49 +00:00
fdb2867757
phaser: fewer iotest patterns
2020-09-21 17:06:26 +02:00
d730851397
phaser: elaborate init sequence, more tests
2020-09-21 15:05:29 +00:00
f0959fb871
phaser: iotest early, check_alarms
2020-09-17 14:13:58 +00:00
b15e388b5f
ad53xx: distinguish errors
2020-09-17 14:13:10 +00:00
29c940f4e3
kasli2: forward sma_clkin to si5324
2020-09-17 16:53:43 +08:00
868a9a1f0c
phaser: new multidds
2020-09-16 14:06:38 +00:00
c18f515bf9
phaser: rework rtio channels, sync_dly, init()
2020-09-16 12:23:07 +00:00
f3b0398720
phaser: n=2, m=16, sync_dly
2020-09-16 09:19:15 +00:00
9b58b712a6
phaser: doc tweaks
2020-09-15 12:35:26 +00:00
ff57813a9c
phaser: init [wip]
2020-09-15 08:46:47 +00:00
07418258ae
phaser: init [wip]
2020-09-15 08:46:10 +00:00
3a79ef740b
phaser: work around integer size
2020-09-15 08:46:10 +00:00
b449e7202b
phaser: rework docs
2020-09-15 08:46:10 +00:00
b619f657b9
phaser: doc tweaks
2020-09-12 19:59:49 +02:00
c3728678d6
phaser: document, elaborate comments, some fixes
2020-09-12 17:35:14 +00:00
e505dfed5b
phaser: refactor coredevice driver
2020-09-12 14:17:40 +00:00
fdd2d6f2fb
phaser: SI methods
2020-09-12 11:02:37 +00:00
bff611a888
test: relax test_dma_playback_time on Zynq
2020-09-11 11:21:45 +08:00
4e24700205
phaser: spelling
2020-09-09 16:52:52 +00:00
8aaeaa604e
phaser: share_lut
2020-09-07 16:06:35 +00:00
e69bb0aeb3
phaser: add comment about get_dac_data
2020-09-07 16:06:16 +00:00
6195b1d3a0
rpc: fixed _write_bool
...
Closes #1519
2020-09-04 13:49:22 +08:00
56aa22caeb
fastino: document/cleanup
...
* added documentation on `update`/`hold` mechanism
* mask machine unit values
* cleanup coredevice driver
close #1518
2020-09-03 17:44:26 +02:00
1b475bdac4
build_soc: remove assertion that was used for test runs
2020-09-03 20:24:18 +08:00
458a411320
metlino_sayma_ttl: Fix RTIO frequency & demo code ( #1516 )
2020-09-03 15:08:31 +08:00
47e88dfcbe
Revert "test: temporarily disable test_async_throughput"
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This reverts commit f0289d49ab
2020-09-03 14:19:55 +08:00
002a71dd8d
build_soc: rename identifier_str to gateware_identifier_str
2020-09-02 00:00:57 +08:00
4398a2d5fa
test: relax loopback gate timing
2020-09-01 17:50:09 +08:00
f0289d49ab
test: temporarily disable test_async_throughput
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M-Labs/artiq-zynq#104
2020-09-01 17:49:40 +08:00
8d5dc0ad2a
test: relax test_pulse_rate on Zynq
2020-09-01 17:08:26 +08:00
f294d039b3
test: skip NonexistentI2CBus if I2C is not supported
2020-09-01 16:47:04 +08:00
91df3d7290
build_soc: override identifier_str only for gateware
2020-09-01 10:46:39 +08:00
3d84135810
examples: add Metlino master, Sayma satellite with TTLOuts via FMC
2020-08-31 16:21:45 +08:00
dfbf3311cb
sayma_amc: add support for 4x DIO output channels via FMC
2020-08-31 16:21:45 +08:00
1ad9deaf91
fmcdio_vhdci_eem: fix pin naming
2020-08-31 16:21:45 +08:00
45ae6202c0
build_soc: add identifier_str override option
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Signed-off-by: Stephan Maka <stephan@spaceboyz.net>
2020-08-31 11:48:58 +08:00
272dc5d36a
phaser: documentation
2020-08-28 16:36:44 +00:00
b2572003ac
RPC: optimization by caching
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This reduced the calls needed for socket send/recv.
2020-08-28 14:58:34 +08:00
69f0699ebd
test: improved test_performance
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1. Added tests for small payload.
2. Added statistics.
2020-08-28 14:58:34 +08:00
7cf974a6a7
comm_kernel: fix typo
2020-08-28 12:25:23 +08:00
68bfa04abb
phaser: trf readback strobe spi changes
2020-08-27 15:31:42 +00:00
96fc248d7c
phaser: synchronize multidds to frame
2020-08-27 14:28:19 +00:00
c10ac2c92a
phaser: add trf, duc, interfaces, redo body assembly, use more natrual iq ordering (i lsb)
2020-08-27 14:26:09 +00:00
e5e2392240
phaser: wire up multidds
2020-08-26 17:12:41 +00:00
d1be1212ab
phaser: coredevice shim, dds [wip]
2020-08-26 15:10:50 +00:00
aac2194759
Ported rpc changes to or1k
2020-08-26 14:17:06 +08:00
7181ff66a6
compiler: improved rpc performance for list and array
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1. Removed duplicated tags before each elements.
2. Use numpy functions to speedup parsing.
2020-08-26 14:17:06 +08:00
cfddc13294
test: fixed test_performance
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Added more tests and use normal rpc instead of async rpc.
Async RPC does not represent the real throughput which is limited by the
hardware and the network. Normal RPC which requires a response from the
remote is closer to real usecases.
2020-08-26 14:17:06 +08:00
20fcfd95e9
phaser: coredevice shim, readback fix
2020-08-24 15:46:31 +00:00
bcefb06e19
phaser: ddb template, split crc
2020-08-24 14:51:50 +00:00
11c9def589
phaser: readback delay, test fastlink
2020-08-24 14:49:36 +00:00
Paweł Kulik
eb350c3459
Drive SFP0 TX_DISABLE low during startup (as was in Kasli v1.1). Fixes Ethernet on SFP modules with pullup on this line.
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Signed-off-by: Paweł Kulik <pawel.kulik@creotech.pl>
2020-08-24 21:39:53 +08:00
63e4b95325
fastlink: rework crc injection
2020-08-23 19:41:13 +00:00
a27a03ab3c
fastlink: fix crc vs data width
2020-08-23 19:02:50 +00:00
7e584d0da1
fastino: use fastlink
2020-08-22 11:56:23 +00:00
3e99f1ce5a
phaser: refactor link
2020-08-22 11:56:23 +00:00
a34a647ec4
phaser: refactor fastlink
2020-08-22 11:56:23 +00:00
aa0154d8e2
phaser: initial
2020-08-22 11:56:23 +00:00
5f6aa02b61
gui: unbreak background
2020-08-14 13:14:45 +08:00
David Nadlinger
69718fca90
gui: Improve fuzzy-select heuristics
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Even though the code already used non-greedy wildcards before,
it would not find the shortest match, as earlier match starts
would still take precedence.
This could possibly be sped up a bit in CPython by doing
everything inside re using lookahead-assertion trickery, but the
current code is already imperceptibly fast for hundreds of
choices.
2020-08-14 02:13:45 +01:00
a46573e97a
Revert "test: set uart log level to INFO for DMA tests"
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This reverts commit b05cbcbc24
2020-08-13 12:44:33 +08:00
b05cbcbc24
test: set uart log level to INFO for DMA tests
2020-08-13 12:24:57 +08:00
48008eaf5f
test: omit unavailable math functions on OR1K
2020-08-12 15:01:13 +08:00
d8cd5023f6
runtime: expose more libm functions
2020-08-12 13:36:06 +08:00
David Nadlinger
c6f0c4dca4
test/coredevice: Ignore jagged 2D array embedding test for now
2020-08-10 00:23:38 +01:00
David Nadlinger
daf57969b2
compiler: Do not expand strings into TInt(8)s in array()
2020-08-09 23:46:45 +01:00
David Nadlinger
778f2cf905
compiler: Fix numpy.full, implement for >1D
2020-08-09 23:46:45 +01:00
David Nadlinger
53d64d08a8
compiler: Fix multi-dim slice error message test, tweak wording
2020-08-09 23:14:56 +01:00
David Nadlinger
d35f659d25
compiler: Add additional math fns available from Rust libm
2020-08-09 20:09:43 +01:00
David Nadlinger
a39bd69ca4
compiler: Implement numpy.rint() using llvm.round()
2020-08-09 19:44:58 +01:00
David Nadlinger
ae47d4c0ec
test/coredevice: Add host/device consistency checks for NumPy math
2020-08-09 19:15:43 +01:00
David Nadlinger
8e262acd1e
compiler: Slight array op implementation cleanup [nfc]
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array_unaryop_funcs was never used; since the mangled names
are unique, a single dictionary would be nicer for overrides
anyway.s
2020-08-09 18:58:01 +01:00
David Nadlinger
33d931a5b7
compiler: Implement multi-dimensional indexing of arrays
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This generates rather more code than necessary, but has
the advantage of automatically handling incomplete
multi-dimensional subscripts which still leave arrays
behind.
2020-08-09 17:08:43 +01:00
David Nadlinger
b00ba5ece1
compiler: Support explicit array(…, dtype=…) syntax
2020-08-09 17:08:43 +01:00
