6dfebd54dd
ttl_serdes_7series: use correct IBUFDS_INTERMDISABLE port names
2018-03-12 10:37:33 +08:00
a04bd5a4fd
spi2: xfers take one more cycle until ~busy
2018-03-09 20:48:17 +01:00
Florent Kermarrec
5af4609053
libboard/sdram: limit write leveling scan to "512 - initial dqs taps delay" on ultrascale
2018-03-09 19:06:47 +01:00
Florent Kermarrec
a95cd423cc
libboard/sdram: add gap for write leveling
2018-03-09 18:53:57 +01:00
fc3d97f1f7
drtio: remove spurious multichannel transceiver clock constraints
...
They used to cause (otherwise harmless) Vivado critical warnings.
2018-03-09 22:46:27 +08:00
caf7b14b55
kasli: generate fine RTIO clock in DRTIO targets, separate RTIO channel code
2018-03-09 22:36:16 +08:00
Florent Kermarrec
8f6f83029c
libboard/sdram: add write/read leveling scan
2018-03-09 13:50:51 +01:00
Florent Kermarrec
b0b13be23b
libboard/sdram: rename read_delays to read_leveling
2018-03-09 09:23:20 +01:00
3fbcf5f303
drtio: remove TSC correction ( #40 )
2018-03-09 10:36:17 +08:00
e38187c760
drtio: increase default underflow margin. Closes #947
2018-03-09 00:49:24 +08:00
37f5f0d38d
examples: add DMA to Sayma DRTIO
2018-03-09 00:49:24 +08:00
Florent Kermarrec
8475c21c46
firmware/libboard/sdram: kusddrphy now use time mode for odelaye3/idelaye3, now reloading dqs delay_value (500ps) with software
2018-03-08 10:00:00 +01:00
8bd15d36c4
drtio: fix error CSR edge detection ( #947 )
2018-03-08 16:28:25 +08:00
0adbbd8ede
drtio: reset aux packet gateware after locking to recovered clock
...
Closes #949
2018-03-08 15:41:13 +08:00
8bd85caafb
examples: fix Sayma DRTIO ref_period
2018-03-08 15:09:33 +08:00
37ec97eb28
ad9910/2: add sw invariant only when passed
2018-03-07 21:32:59 +01:00
82831a85b6
kasli/opticlock: add eem6 phys
2018-03-07 21:32:59 +01:00
3a6566f949
rtio: judicious spray with reset_less=True
...
Hoping to reduce rst routing difficulty and easier RTIO timing closure.
2018-03-07 14:57:18 +00:00
b0282fa855
spi2: reset configuration in rio_phy
2018-03-07 14:42:11 +00:00
7afb23e8be
runtime: demote dropped and malformed packets msgs to debug
2018-03-07 14:28:21 +01:00
4af7600b2d
Revert "LaneDistributor: try equivalent spread logic"
...
This reverts commit 8b70db5f17
2018-03-07 11:34:51 +00:00
a6d1b030c1
RTIO: use TS counter in the correct CD
...
artiq/m-labs#938
2018-03-07 11:34:42 +00:00
8b70db5f17
LaneDistributor: try equivalent spread logic
2018-03-07 11:34:42 +00:00
2cbd597416
LaneDistributor: style and signal consolidation [NFC]
2018-03-07 11:34:42 +00:00
916197c4d7
siphaser: cleanup
2018-03-07 11:15:44 +08:00
74d1df3ff0
firmware: implement si5324 skew calibration
2018-03-07 10:57:30 +08:00
f7aba6b570
siphaser: fix phase_shift_done CSR
2018-03-07 10:57:30 +08:00
acfd9db185
siphaser: minor cleanup
2018-03-07 10:57:30 +08:00
e6e5236ce2
firmware: fix si5324 select_recovered_clock
2018-03-07 10:57:30 +08:00
7d98864b31
sayma: enable siphaser
2018-03-07 10:57:30 +08:00
c2d2cc2d72
runtime: fix setup_si5324_as_synthesizer
2018-03-07 10:57:30 +08:00
a6e29462a8
sayma: enable multilink DRTIO
2018-03-07 10:57:30 +08:00
c34d00cbc9
drtio: implement Si5324 phaser gateware and partial firmware support
2018-03-07 10:57:30 +08:00
994ceca9ff
sayma_amc: disable slave fpga gateware loading
2018-03-06 17:27:43 +01:00
f4dad87fd9
coredevice: add pcf8574a driver
...
I2C IO expander with 8 quasi-bidirectional pins
2018-03-06 14:27:19 +01:00
62af7fe2ac
Revert "kasli/opticlock: use plain ttls for channels 8-23"
...
This reverts commit bd5c222569eb68d624a5ac1e9f2542f6ee553f83.
No decrease in power consumption or improvement in timing.
2018-03-06 14:27:19 +01:00
fd3cdce59a
kasli/opticlock: use plain ttls for channels 8-23
2018-03-06 14:27:19 +01:00
50298a6104
ttl_serdes_7series: suppress diff_term in outputs
2018-03-06 14:27:19 +01:00
e356150ac4
ttl_simple: support differential io
2018-03-06 14:27:19 +01:00
956098c213
kasli: add second urukul, make clk_sel drive optional
2018-03-06 14:26:27 +01:00
07de7af86a
kasli: make second eem optional in urukul
2018-03-06 14:26:26 +01:00
257bef0d21
slave_fpga: print more info
2018-03-06 14:26:26 +01:00
c25560baec
sed: more LaneDistributor comments
2018-03-06 20:56:35 +08:00
f40255c968
sed: add comments about key points in LaneDistributor
2018-03-06 20:51:09 +08:00
Florent Kermarrec
5b3d6d57e2
drtio/gth: power down rx on restart (seems to make link initialization reliable)
2018-03-06 11:49:28 +01:00
Florent Kermarrec
64b05f07bb
drtio/gth: use parameters from Xilinx transceiver wizard
2018-03-06 11:02:15 +01:00
Florent Kermarrec
45f1e5a70e
drtio/gth: cleanup import
2018-03-06 10:56:07 +01:00
a274af77d5
runtime: fix compilation without DRTIO
2018-03-05 00:43:42 +08:00
432e61bbb4
drtio: add kernel API to check for link status. Closes #941
2018-03-05 00:23:55 +08:00
6aaa8bf9d9
drtio: fix link error generation
2018-03-04 23:20:13 +08:00
d747d74cb3
test: fix test_dma
2018-03-04 23:19:06 +08:00
928d5dc9b3
drtio: raise RTIOLinkError if operation fails due to link lost ( #942 )
2018-03-04 01:02:53 +08:00
ba74013e3e
runtime: add a missing overflow flag reset
2018-03-03 13:16:21 +08:00
abfbadebb5
doc: DMA can also raise RTIOUnderflow
2018-03-03 13:14:34 +08:00
ddcc68cff9
sayma_amc: move bitstream options to migen
...
close #930
2018-03-02 18:13:03 +08:00
5e074f83ac
examples: update kasli sysu
2018-03-02 16:05:12 +08:00
29d42f4648
artiq_flash: add kasli sysu
2018-03-02 15:49:41 +08:00
a9daaad77b
kasli: add SYSU variant and device_db
2018-03-02 14:44:31 +08:00
1c57d27ae2
slave_fpga: use sayma_rtm magic
2018-03-01 18:32:19 +01:00
de63e657b8
kasli/si5324: lock to 100 MHz with highest available bandwidth
2018-03-01 14:49:53 +01:00
abd160d143
slave_fpga: check DONE before loading
2018-03-01 19:53:34 +08:00
a04a36ee36
firmware: move wait for write completion to read()
2018-03-01 11:37:33 +01:00
a6ae08d8b8
firmware/spi: work around cs_polarity semantics
...
The semantics differ between the RTIO and CSR interface.
2018-03-01 11:19:18 +01:00
cc70578f1f
remove old spi RTIO Phy
2018-03-01 11:19:18 +01:00
ec5b81da55
kc705: switch backplane spi to spi2
2018-03-01 11:19:18 +01:00
6fbe0d8ed8
hmc830: be explicit about SPI mode selection
2018-03-01 11:19:18 +01:00
a7720d05cd
firmware, sayma: port converter_spi to spi2
...
* ksupport/nrt_bus
* port ad9154, hmc830, hmc7043
* port local_spi and drtio_spi
* port kernel_proto libdrtioaux, satman
* change sayma_rtm gateware over
* add spi2 NRTSPIMaster
* remove spi NRTSPIMaster
* change sayma device_db
* change HMC830 to open mode and explicitly sequence open mode
2018-03-01 11:19:18 +01:00
68278e225d
slave_fpga: check for INIT low
2018-03-01 17:28:01 +08:00
whitequark
14f6fa6699
firmware: fix a warning.
2018-03-01 01:25:55 +00:00
whitequark
d051cec0dd
firmware: remove useless module.
2018-03-01 01:22:52 +00:00
54984f080b
artiq_flash: flash RTM firmware
...
based on whitequark's work in f95fb27m-labs/artiq#813
2018-02-28 19:29:01 +01:00
0c49201be7
firmware: add slave fpga serial load support
...
based on whitequark's work in f95fb27m-labs/artiq#813
2018-02-28 19:27:52 +01:00
1f999c7f5f
sayma_amc: expose RTM fpga load pins as GPIOs
2018-02-28 18:44:36 +01:00
cedecc3030
Revert "firmware: Sayma RTM FPGA bitstream loading prototype ( #813 )."
...
This reverts commit f95fb273f1
2018-02-28 18:43:56 +01:00
whitequark
f95fb273f1
firmware: Sayma RTM FPGA bitstream loading prototype ( #813 ).
2018-02-28 16:46:23 +00:00
Florent Kermarrec
2896dc619b
drtio/transceiver/gth: fix multilane
2018-02-28 14:15:40 +01:00
5046d6a529
ad9912/10: add a bit more slack to init()
2018-02-27 23:14:44 +01:00
f97163cdee
examples/master: sync device_db with kc705_nist_clock
2018-02-27 19:40:00 +01:00
whitequark
916b10ca94
examples: spi → spi2.
2018-02-27 18:36:45 +00:00
386aa75aaa
kasli: control SFP1 and SFP2 LEDs in DRTIO satellite to match master
2018-02-27 23:18:18 +08:00
5d81877b34
kasli: implement multi-link DRTIO on SFP1 and SFP2 of master
2018-02-27 23:15:20 +08:00
Florent Kermarrec
1f0d955ce4
drtio/transceiver/gtp: implement tx multi lane phase alignment sequence
2018-02-27 12:32:25 +01:00
e565d3fa59
kasli: add analyzer and RTIO log to DRTIO master target
2018-02-27 18:09:07 +08:00
760724c500
kasli/device_db: fix i2c switch addr
2018-02-26 11:37:12 +01:00
b466a569bf
coredevice: export spi2
2018-02-24 09:49:31 +01:00
Florent Kermarrec
5b0f9cc6fd
drtio/transceiver/gth: fix single transceiver case
2018-02-23 12:15:47 +01:00
cff85ee13b
novogorny: simplify and fix coefficient
2018-02-23 10:09:44 +01:00
Florent Kermarrec
b4ba71c7a4
drtio/transceiver/gth: implement tx multi lane phase alignment sequence (fix merge issue...)
2018-02-23 08:37:05 +01:00
Florent Kermarrec
820c834251
drtio/transceiver/gth: implement tx multi lane phase alignment sequence
2018-02-22 22:14:15 +01:00
bc5e949bb4
novogorny: fix gain register length
2018-02-22 18:45:55 +00:00
1452cd7447
novogorny: add coredevice driver and test with Kasli
...
m-labs/artiq#687
2018-02-22 17:19:51 +01:00
74517107f0
ad9912: add slack after prodid read
2018-02-22 17:19:51 +01:00
3b7971d15d
kasli: spelling
2018-02-22 17:19:51 +01:00
771bf87b56
kc705: port amc101_dac/spi0 and sma_spi to spi2
2018-02-22 17:19:51 +01:00
d4a10dcbd4
urukul: fix example
2018-02-22 11:28:50 +01:00
e8d4db1ccf
coreanalyzer: add spi2 support
...
m-labs/artiq#926
2018-02-22 11:28:46 +01:00
f8e6b4f4e3
ad5360: port to spi2
...
* kc705 nist_clock target gateware
* coredevice driver
* moninj code
* test/example/device_db
This is untested as we don't have a AD5360 board right now.
Will be tested with Zotino v1.1
m-labs/artiq#926
2018-02-22 10:25:46 +01:00
96423882f2
fix 4d6619f3b
2018-02-22 15:27:54 +08:00
fa0d929b4d
drtio: reorganize RX synchronizers
2018-02-22 15:21:23 +08:00
e5de5ef473
kasli: use deterministic RX synchronizer
...
Could not reproduce the "fully broken bitstream" bug.
2018-02-22 15:18:09 +08:00
4d6619f3bc
satman: send ResetAck
2018-02-22 15:17:44 +08:00
a5ad1dc266
kc705: fix sdcard miso pullup
2018-02-21 19:41:05 +01:00
0d8145084d
test_spi: move to new spi2 core
2018-02-21 19:41:05 +01:00
898bad5abc
spi2: fixes
2018-02-21 19:41:05 +01:00
Florent Kermarrec
5eda894db4
firmware/libboard/sdram: increase read_delays dead zone to 32 on KU
2018-02-21 19:36:37 +01:00
whitequark
96f697ec96
firmware: update compiler_builtins to unbreak __gtdf2.
...
Fixes #883 .
2018-02-21 15:21:48 +00:00
a63fd306af
urukul: use spi2
...
* switch kc705 and kasli targets to spi2 gateware on urukul
* rewrite urukul, ad9912, ad9910
* update example experiments, device_dbs
2018-02-21 15:00:28 +00:00
37a0d6580b
spi2: add RTIO gateware and coredevice driver
...
1006218997
2018-02-21 13:37:36 +00:00
91a4a7b0ee
kasli: free run si5324 on opticlock for now
2018-02-21 13:37:29 +00:00
7a1d71502a
ttl_serdes_7series: drive IBUF and INTERM disables from serdes
2018-02-21 13:37:29 +00:00
476e4fdd56
ttl_serdes_7series: disable IBUF and INTERM when output
2018-02-21 13:37:29 +00:00
Florent Kermarrec
afc16a67b6
firmware/liboard/sdram.rs: iterate read multiple times in read_delays to avoid false positives
2018-02-21 14:15:35 +01:00
whitequark
86ceee570f
compiler: reject calls with unexpected keyword arguments.
...
Fixes #924 .
2018-02-21 11:37:12 +00:00
f060d6e1b3
drtio: increase A7 clock aligner check period
2018-02-20 18:50:35 +08:00
738654c783
drtio: support remote RTIO resets
2018-02-20 18:48:54 +08:00
f15b4bdde7
style
2018-02-20 18:47:59 +08:00
7d9c7ada71
drtio: fix test infinite loop
2018-02-20 17:42:00 +08:00
ad2c9590d0
drtio: rewrite/fix reset and link bringup/teardown
2018-02-20 17:26:43 +08:00
7e02d8245c
kasli: false paths
...
* don't bother with the round trip OSERDESE2 -> ... -> pad -> ... ->
ISERDESE2
* clock groups with derived clocks c.f. migen 9c3a301
2018-02-19 13:05:11 +00:00
0f4549655b
sayma: use Xilinx RX synchronizer
...
Cannot be used on Kasli, this breaks the bitstream entirely (nothing on UART).
2018-02-19 17:49:53 +08:00
52049cf36a
drtio: add Xilinx RX synchronizer
2018-02-19 17:49:43 +08:00
3bc575bee7
drtio: add missing define for Sayma master
2018-02-19 17:11:21 +08:00
7376ab0ff8
drtio: fix Sayma after 83abdd28
2018-02-19 17:10:55 +08:00
Florent Kermarrec
f5831af535
drtio/transceiver/gtp_7series_init: don't reset gtp rx on power down
2018-02-19 10:03:19 +01:00
Florent Kermarrec
89a158c0c9
drtio/transceiver/gtp_7series_init: remove dead code
2018-02-19 10:02:23 +01:00
Florent Kermarrec
782051f474
drtio/transceiver/gtp_7series_init: add no retiming on gtp resets
2018-02-19 09:59:50 +01:00
01fa6c1c2e
reorganize examples
2018-02-19 15:46:08 +08:00
4b4090518b
drtio: clean up remnants of removed debug functions
2018-02-19 15:14:32 +08:00
c329c83676
kasli: fix disable_si5324_ibuf no_retiming
2018-02-19 12:19:05 +08:00
a93decdef2
kasli: disable DRTIO IBUFDS_GTE2 until Si5324 is initialized
2018-02-19 00:48:37 +08:00
94c20dfd4d
drtio: fix misleading GenericRXSynchronizer comment
2018-02-19 00:47:54 +08:00
83abdd283a
drtio: signal stable clock input to transceiver
2018-02-18 22:29:30 +08:00
c87636ed2b
si5324: fix cfb21ca
2018-02-18 11:38:20 +01:00
caedcd5a15
ad9912: cleanup, document init()
2018-02-18 11:38:16 +01:00
75c89422c9
ad991[02]: sysclk can be 1 GHz
2018-02-18 10:29:19 +00:00
287d533437
Revert "sayma_amc: remove RTM bitstream upload core. Closes #908 "
...
This reverts commit 2d4a1340ea
2018-02-17 17:38:48 +08:00
73985a9215
sayma: remove constraints at outputs of serwb PLL (see misoc d1489ed)
2018-02-17 17:38:17 +08:00
039dee4c8e
si5324: rename SI5324_FREE_RUNNING to SI5324_AS_SYNTHESIZER
...
The previous name was causing confusion with the FREE_RUN bit
that connects the crystal to CLKIN2.
2018-02-17 13:54:50 +08:00
cfb21ca126
si5324: fix usage of external CLKIN2 reference
2018-02-17 13:52:01 +08:00
fb8b36cd41
clean up ccc279b8
2018-02-17 12:10:46 +08:00
hartytp
ccc279b8da
rewrite HMC7043 init code without using ADI GUI outputs, working analog/digital delay
2018-02-17 12:07:11 +08:00
e41f49cc75
kasli: opticlock 125 MHz, mark external reference case broken
2018-02-16 17:23:15 +00:00
7002bea0ab
kasli: clean up urukul example more
2018-02-15 14:21:17 +01:00
4d42df2a7c
kasli: set up Si5324 in standalone operation
2018-02-15 20:32:58 +08:00
c5ae81f452
satman: remove unused 62.5MHz Si5324 settings
2018-02-15 20:29:51 +08:00
d7387611c0
sayma: print RTM gateware version
2018-02-15 19:31:58 +08:00
whitequark
d572c0c34d
artiq_devtool: fix the hotswap action.
2018-02-14 23:10:27 +00:00
whitequark
fe50018037
firmware: make network tracing runtime switchable.
2018-02-14 23:03:20 +00:00
2adba3ed33
urukul: document ad9912, and cpld, fix api
2018-02-14 09:45:17 +01:00
ede98679fc
ad9910: add documentation
2018-02-14 09:05:03 +01:00
b6395a809b
kasli: remove old urukul test code
2018-02-13 22:16:57 +01:00
be693bc8a9
opticlock: examples
2018-02-13 22:13:40 +01:00
a3d136d30d
opticlock: wire urukul and novogorny
2018-02-13 22:13:40 +01:00
7f1bfddeda
ad9910: tweak spi timing for higher speed
2018-02-13 22:13:40 +01:00
6a6695924f
urukul: proto 8
2018-02-13 22:13:40 +01:00
bc6af03a61
urukul: (proto 7) drop att_le
2018-02-13 22:13:40 +01:00
df177bfd5b
use new misoc identifier
2018-02-13 20:38:48 +08:00
ab5f397fea
sed/fifos: use AsyncFIFOBuffered
...
(D)RTIO now passes timing at 150MHz on Kasli.
2018-02-13 20:02:51 +08:00
00f42f912b
rename 'RTM identifier' to 'RTM magic number'
...
Avoids confusion with the MiSoC identifier (containing the ARTIQ version).
2018-02-13 20:02:51 +08:00
96b948f57f
remote_csr: add sanity check of CSR CSV type column
2018-02-13 20:02:51 +08:00
e67a289e2b
examples: add SAWG sines (DAC synchronization test)
2018-02-13 20:02:51 +08:00
Florent Kermarrec
bfdda340fd
drtio/transceiver/gtp_7series: use parameters from xilinx wizard
2018-02-13 00:23:59 +01:00
Florent Kermarrec
180c28551d
drtio/gateware/transceiver/gtp_7series: add power down state before reset on rx (seems to make restart reliable)
2018-02-09 20:17:02 +01:00
2d4a1340ea
sayma_amc: remove RTM bitstream upload core. Closes #908
2018-02-07 12:27:35 +08:00
whitequark
61c64a76be
gateware: use a per-variant subfolder in --output-dir. ( fixes #912 )
...
This commit also adds support for --variant and --args
to artiq-devtool.
2018-02-06 08:19:01 +00:00
Florent Kermarrec
e80b481032
firmware/libboard_artiq/hmc830_7043.rs: add template for sys_ref phase configuration for dac1/dac2 and fpga
2018-02-05 13:40:17 +01:00
Florent Kermarrec
e50bebb63d
firmware/liboard_artiq/ad9154.rs: add checks for jesd subclass 1 (verify that we receive the sysref and that phase error is within the specified window error threshold).
2018-02-05 13:39:30 +01:00
9fca7b8faa
artiq_flash: also report sayma AMC SYSMONE1 data
...
requires hardware patch (https://github.com/m-labs/sinara/issues/495 )
2018-01-30 15:17:11 +08:00
fb8c779b4f
artiq_flash: report XADC data
...
* bump openocd
* only kasli, kc705, sayma rtm so far
2018-01-30 14:56:50 +08:00
whitequark
807eb1155b
Update smoltcp.
...
Fixes #902 .
2018-01-30 03:29:08 +00:00
whitequark
a669652854
artiq_flash: tell openocd to not listen on any network ports.
2018-01-30 03:12:06 +00:00
whitequark
0edc34a9e5
artiq_devtool: the proxy artiq_flash action doesn't exist anymore.
2018-01-28 15:19:17 +00:00
whitequark
885ab40946
conda: split RTM and AMC packages back.
...
This avoids multiplying the RTM compilation time by the number
of AMC packages.
2018-01-28 14:27:55 +00:00
whitequark
11a8b84355
Merge the build trees of sayma_amc and sayma_rtm targets.
...
This also makes them a single artiq_flash target, and a single
conda package.
2018-01-27 19:54:31 +00:00
whitequark
0b9c551962
artiq_flash: implement flash read functionality.
2018-01-27 19:54:31 +00:00
0aacdb0458
tools: add missing import
2018-01-28 02:12:46 +08:00
6f90a43df2
examples: reorganize for new hardware
2018-01-28 02:11:45 +08:00
67625fe912
test: check kernel overhead credibility
2018-01-28 01:02:03 +08:00
e8ed3475ea
test: add kernel overhead test ( #407 )
2018-01-28 01:00:59 +08:00
whitequark
eed2db3a98
artiq_flash: make the proxy action unnecessary.
2018-01-27 15:43:27 +00:00
whitequark
d58393a1e5
runtime: build with -Cpanic=unwind.
...
This is required for backtraces to function. I'm not sure how it
turned out that master had -Cpanic=abort.
2018-01-26 23:01:24 +00:00
whitequark
08101b631d
artiq_devtool: fix typo.
2018-01-26 13:55:31 +00:00
440e19b8f9
kasli: use SFP2 for DRTIO mastering
...
SFP1 PCB routing has some issues.
Also use SFP1 LED for DRTIO in both master and satellite.
2018-01-26 19:02:54 +08:00
0d2f89db53
si5324: chip does not ack RST_REG write
2018-01-25 11:06:19 +08:00
ca4d5ae73e
artiq_flash: add kasli drtio variants
2018-01-25 00:00:07 +08:00
77f90cf93b
test: relax RTIO counter test and print result
2018-01-24 10:07:22 +08:00
ed0fbd5662
test: add test for RTIO counter ( #883 )
2018-01-24 00:28:39 +08:00
e0e795f11c
sayma_amc: constrain pin, remove keep
2018-01-23 15:42:47 +00:00
b5c035bb52
sayma_rtm: constrain serwb clock input
2018-01-23 13:54:53 +00:00
aada38f508
kasli, kc705: remove vivado "keep", cleanup a constraint
2018-01-23 13:15:26 +00:00
85102e191e
sayma_rtm: derive clocks automatically
...
* also don't add false paths unless necessary
2018-01-23 11:00:55 +00:00
7d1b3f37c9
sayma_rtm: set CFGBVS/CONFIG_VOLTAGE, compress
2018-01-23 10:56:42 +00:00
cb0016ceee
examples/sayma: fix ref_multiplier
...
SAWG is working, whoohoo!
2018-01-23 15:26:03 +08:00
cfffd9e13d
si5324: kasli support
2018-01-23 13:17:03 +08:00
649deccd9b
kasli: fix DRTIO satellite QPLL refclksel
2018-01-23 12:27:19 +08:00
4b4374f76a
sayma: register_jref for JESD204. Closes #904
2018-01-23 12:19:15 +08:00
763aefacff
kasli: fix typo
2018-01-23 12:10:54 +08:00
c7b148a704
kasli: when using both GTP clocks, send REFCLK0 to PLL0 and REFCLK1 to PLL1
2018-01-23 12:08:10 +08:00
d6157514c7
gtp_7series: flexible QPLL channel selection
2018-01-23 12:03:09 +08:00
9f87c34a94
kasli: fix QPLL instantiation
2018-01-23 10:39:31 +08:00
