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mirror of https://github.com/m-labs/artiq.git synced 2024-12-25 11:18:27 +08:00

test_spi: move to new spi2 core

This commit is contained in:
Robert Jördens 2018-02-21 18:27:07 +00:00 committed by Robert Jordens
parent 898bad5abc
commit 0d8145084d
3 changed files with 33 additions and 34 deletions

View File

@ -125,7 +125,7 @@ device_db = {
},
"spi_mmc": {
"type": "local",
"module": "artiq.coredevice.spi",
"module": "artiq.coredevice.spi2",
"class": "SPIMaster",
"arguments": {"channel": 26}
},

View File

@ -330,7 +330,7 @@ class NIST_CLOCK(_StandaloneBase):
rtio_channels.append(rtio.Channel.from_phy(
phy, ififo_depth=128))
phy = spi.SPIMaster(platform.request("sdcard_spi_33"))
phy = spi2.SPIMaster(platform.request("sdcard_spi_33"))
self.submodules += phy
rtio_channels.append(rtio.Channel.from_phy(
phy, ififo_depth=4))

View File

@ -3,13 +3,15 @@ from artiq.experiment import *
from artiq.test.hardware_testbench import ExperimentCase
from artiq.language.core import (kernel, delay_mu, delay)
from artiq.language.units import us
from artiq.coredevice import spi
from artiq.coredevice import spi2 as spi
_SDCARD_SPI_CONFIG = (0*spi.SPI_OFFLINE | 0*spi.SPI_CS_POLARITY |
_SDCARD_SPI_CONFIG = (0*spi.SPI_OFFLINE | 0*spi.SPI_END |
0*spi.SPI_INPUT | 0*spi.SPI_CS_POLARITY |
0*spi.SPI_CLK_POLARITY | 0*spi.SPI_CLK_PHASE |
0*spi.SPI_LSB_FIRST | 0*spi.SPI_HALF_DUPLEX)
class CardTest(EnvExperiment):
def build(self):
self.setattr_device("core")
@ -18,44 +20,41 @@ class CardTest(EnvExperiment):
@kernel
def run(self):
self.core.reset()
self.core.break_realtime()
response = 0xff
self.spi_mmc.set_config(_SDCARD_SPI_CONFIG, 500*kHz, 500*kHz)
self.spi_mmc.set_xfer(0, 8, 0)
freq = 1*MHz
cs = 1
# run a couple of clock cycles with miso high to wake up the card
self.spi_mmc.set_config(_SDCARD_SPI_CONFIG, 32, freq, 0)
for i in range(10):
self.spi_mmc.write(0xffffffff)
delay(-5*us)
delay(100*us)
self.spi_mmc.set_xfer(1, 8, 0)
self.spi_mmc.write(0x40000000)
delay(-5*us)
self.spi_mmc.write(0x00000000)
delay(-5*us)
self.spi_mmc.write(0x00000000)
delay(-5*us)
self.spi_mmc.write(0x00000000)
delay(-5*us)
self.spi_mmc.write(0x00000000)
delay(-5*us)
self.spi_mmc.write(0x95000000)
delay(-5*us)
self.spi_mmc.set_xfer(1, 0, 24)
self.spi_mmc.set_config(_SDCARD_SPI_CONFIG | spi.SPI_END, 32, freq, 0)
self.spi_mmc.write(0xffffffff)
response = self.spi_mmc.read_sync()
delay(200*us)
sd_response = False
for i in range(3):
if ((response >> 8*i) & 0x0000ff) == 0x01:
sd_response = True
self.spi_mmc.set_config(_SDCARD_SPI_CONFIG, 8, freq, cs)
self.spi_mmc.write(0x40 << 24) # CMD
self.spi_mmc.set_config(_SDCARD_SPI_CONFIG, 32, freq, cs)
self.spi_mmc.write(0x00000000) # ARG
self.spi_mmc.set_config(_SDCARD_SPI_CONFIG, 8, freq, cs)
self.spi_mmc.write(0x95 << 24) # CRC
self.spi_mmc.set_config(_SDCARD_SPI_CONFIG | spi.SPI_INPUT, 8, freq, cs)
idle = False
response = 0
for i in range(8):
self.spi_mmc.write(0xff << 24) # NCR
response = self.spi_mmc.read()
delay(100*us)
if response == 0x01:
idle = True
break
self.set_dataset("sd_response", sd_response)
self.spi_mmc.set_config(_SDCARD_SPI_CONFIG | spi.SPI_END, 8, freq, cs)
self.spi_mmc.write(0xff << 24)
if not idle:
print(response)
raise ValueError("SD Card did not reply with IDLE")
class SDTest(ExperimentCase):
def test(self):
self.execute(CardTest)
self.assertTrue(self.dataset_mgr.get("sd_response"))