0635907699
artiq_flash: fix cmdline formatting
2018-03-22 19:10:29 +08:00
46d5af31a1
artiq_flash: enclose filename in curly braces before passing to OpenOCD
...
Closes #927
2018-03-22 17:20:48 +08:00
eeedcfbdd7
artiq_flash: do not suppress useful backtrace information
2018-03-22 17:11:21 +08:00
f2cc2a5ff2
firmware: reset local RTIO PHYs on startup ( #958 )
2018-03-22 16:29:31 +08:00
770b0a7b79
novogorny: conv -> cnv
...
* parity with sampler
* also add novogorny device to opticlock
2018-03-21 18:38:42 +00:00
82c4f0eed4
sampler: fix channel gain retrieval
2018-03-21 14:22:13 +01:00
12d699f2a8
suservo: add sampler example
2018-03-21 12:21:53 +00:00
97918447a3
sampler: add coredevice driver
2018-03-21 12:21:53 +00:00
1afce8c613
kasli: simplify single eem pin formatting
2018-03-21 13:08:42 +01:00
d48b8f3086
kasli: fix sampler sdr/cnv pins
2018-03-21 09:28:00 +00:00
80903cead7
novogorny: streamline gain setting method, style [nfc]
2018-03-21 08:53:26 +00:00
f5a1001114
suservo: add device database and artiq_flash variant
2018-03-21 08:53:26 +00:00
1fb5907362
kasli: add SUServo variant (Sampler-Urukul Servo)
2018-03-21 08:53:26 +00:00
f74d5772f4
sampler: add wide eem definition
2018-03-21 08:53:26 +00:00
32f22f4c9c
sayma: disable SERDES TTL entirely
...
Timing closure becomes very random, even at 4X.
2018-03-21 13:03:48 +08:00
f8c2d54e75
ttl_serdes_ultrascale: configurable SERDES ratio. Also try X4 on Sayma
2018-03-21 13:01:38 +08:00
9c2d343052
sayma: use SERDES RTIO TTL
...
This is not enabled on the standalone design as it breaks timing.
2018-03-21 10:53:52 +08:00
9ad1fd8f25
urukul: add comment and doc about the AD9910 MASTER_RESET
2018-03-20 17:40:03 +01:00
f17c0abfe4
urukul: don't pulse DDS_RST on init
...
closes m-labs/artiq#940
Apparently, if the DDS are reset, every other time they don't work
properly.
2018-03-20 16:10:26 +00:00
a185e8dc52
urukul: fix MASK_NU offset
2018-03-20 16:10:11 +00:00
f4719ae24b
sdram: clean up console output
2018-03-20 15:42:49 +01:00
206664afd9
sdram: compact read_level output
2018-03-20 10:16:05 +00:00
495625b99d
bootloader: repeat memory test 4 times
2018-03-20 09:57:49 +00:00
6fb0cbfcd3
sdram: clean up, make read_level robust to wrap around
...
* fix a few rust warnings
* also do eye scans on kintex
2018-03-20 09:57:49 +00:00
3abb378fbe
i2c: unused variable
2018-03-20 09:56:26 +00:00
c8020f6bbd
ttl_serdes_generic: fix/upgrade test
2018-03-20 16:46:57 +08:00
a5825184b7
add ttl_serdes_ultrascale (untested)
2018-03-20 16:07:23 +08:00
fad066f1aa
ttl_serdes_7series: cleanup indentation
...
Inconsistent with other code and confuses text editors.
2018-03-20 15:50:04 +08:00
276b0c7f06
sdram: reject read delay wrap arounds
2018-03-20 00:28:41 +01:00
4b3f408143
sdram: simplify read level scan
2018-03-19 18:41:56 +00:00
845784c180
kusddrphy: use first and last tap that yield many valid reads
2018-03-19 17:54:26 +00:00
ed2e0c8b34
sayma/sdram/scan: test each tap 1024 times
2018-03-20 00:59:31 +08:00
hartytp
a27b5d88c2
Novogorny driver, remove unused imports ( #964 )
...
* Novogorny driver, remove unused imports
* more unused imports
* oops, one final one!
2018-03-19 11:58:14 +01:00
7a7ff6d2dd
Merge pull request #963 from hartytp/kasli_zotino_sampler
...
Add Zotino and Sampler functions to Kasli. Add Zotino to Kasli EEM 7 …
2018-03-19 10:52:50 +01:00
Thomas Harty
37d431039d
Fix typos.
...
Reduce ififo depth to 4 for Zotino.
2018-03-19 09:42:18 +00:00
whitequark
c86df8e13e
firmware: try to unstuck the I2C bus if it gets stuck.
...
Fixes #957 .
2018-03-19 06:23:23 +00:00
Thomas Harty
c4fa44bc62
Add Zotino and Sampler functions to Kasli. Add Zotino to Kasli EEM 7 on OptiClock.
2018-03-18 00:25:43 +00:00
f39b7b33e8
ad5360: whitespace [nfc]
2018-03-17 18:51:17 +01:00
ion
c1439bfd3b
Fix AD5360 after migration to SPI2
2018-03-17 11:37:11 +00:00
whitequark
4b5a78e231
compiler: do not pass files to external tools while they are opened.
...
This fixes access violations on Windows that are present both with
input and output files. For some reason, Cygwin-compiled binutils
did not exhibit this problem, but MSYS-compiled binutils do.
Fixes #961 .
2018-03-15 22:21:29 +00:00
whitequark
5cb2602021
artiq_devtool: flash gateware if -g is passed.
2018-03-15 08:33:53 +00:00
whitequark
9ea7d7a804
firmware: allow building without system UART.
2018-03-14 18:34:31 +00:00
whitequark
158ceb0881
artiq_devtool: add kasli target.
2018-03-14 18:13:13 +00:00
a315ecd10b
rtio/ttl_serdes_7series: reset IOSERDES ( #958 )
2018-03-14 09:01:29 +08:00
2fdc180601
dsp/fir: outputs reset_less (pipelined)
2018-03-13 17:11:50 +00:00
2edf65f57b
drtio: fix satellite minimum_coarse_timestamp clock domain ( #947 )
2018-03-13 00:20:57 +08:00
999ec40e79
bootloader: print gateware ident
2018-03-13 00:11:25 +08:00
2caeea6f25
update copyright year
2018-03-13 00:09:13 +08:00
1d081ed6c2
drtio: print diagnostic info on satellite write underflow ( #947 )
2018-03-12 23:41:19 +08:00
Florent Kermarrec
eb6e59b44c
sayma_rtm: fix serwb timing constraints (was causing the gated clock warning)
2018-03-12 11:25:29 +01:00
6dfebd54dd
ttl_serdes_7series: use correct IBUFDS_INTERMDISABLE port names
2018-03-12 10:37:33 +08:00
a04bd5a4fd
spi2: xfers take one more cycle until ~busy
2018-03-09 20:48:17 +01:00
Florent Kermarrec
5af4609053
libboard/sdram: limit write leveling scan to "512 - initial dqs taps delay" on ultrascale
2018-03-09 19:06:47 +01:00
Florent Kermarrec
a95cd423cc
libboard/sdram: add gap for write leveling
2018-03-09 18:53:57 +01:00
fc3d97f1f7
drtio: remove spurious multichannel transceiver clock constraints
...
They used to cause (otherwise harmless) Vivado critical warnings.
2018-03-09 22:46:27 +08:00
caf7b14b55
kasli: generate fine RTIO clock in DRTIO targets, separate RTIO channel code
2018-03-09 22:36:16 +08:00
Florent Kermarrec
8f6f83029c
libboard/sdram: add write/read leveling scan
2018-03-09 13:50:51 +01:00
Florent Kermarrec
b0b13be23b
libboard/sdram: rename read_delays to read_leveling
2018-03-09 09:23:20 +01:00
3fbcf5f303
drtio: remove TSC correction ( #40 )
2018-03-09 10:36:17 +08:00
e38187c760
drtio: increase default underflow margin. Closes #947
2018-03-09 00:49:24 +08:00
37f5f0d38d
examples: add DMA to Sayma DRTIO
2018-03-09 00:49:24 +08:00
Florent Kermarrec
8475c21c46
firmware/libboard/sdram: kusddrphy now use time mode for odelaye3/idelaye3, now reloading dqs delay_value (500ps) with software
2018-03-08 10:00:00 +01:00
8bd15d36c4
drtio: fix error CSR edge detection ( #947 )
2018-03-08 16:28:25 +08:00
0adbbd8ede
drtio: reset aux packet gateware after locking to recovered clock
...
Closes #949
2018-03-08 15:41:13 +08:00
8bd85caafb
examples: fix Sayma DRTIO ref_period
2018-03-08 15:09:33 +08:00
37ec97eb28
ad9910/2: add sw invariant only when passed
2018-03-07 21:32:59 +01:00
82831a85b6
kasli/opticlock: add eem6 phys
2018-03-07 21:32:59 +01:00
3a6566f949
rtio: judicious spray with reset_less=True
...
Hoping to reduce rst routing difficulty and easier RTIO timing closure.
2018-03-07 14:57:18 +00:00
b0282fa855
spi2: reset configuration in rio_phy
2018-03-07 14:42:11 +00:00
7afb23e8be
runtime: demote dropped and malformed packets msgs to debug
2018-03-07 14:28:21 +01:00
4af7600b2d
Revert "LaneDistributor: try equivalent spread logic"
...
This reverts commit 8b70db5f17
2018-03-07 11:34:51 +00:00
a6d1b030c1
RTIO: use TS counter in the correct CD
...
artiq/m-labs#938
2018-03-07 11:34:42 +00:00
8b70db5f17
LaneDistributor: try equivalent spread logic
2018-03-07 11:34:42 +00:00
2cbd597416
LaneDistributor: style and signal consolidation [NFC]
2018-03-07 11:34:42 +00:00
916197c4d7
siphaser: cleanup
2018-03-07 11:15:44 +08:00
74d1df3ff0
firmware: implement si5324 skew calibration
2018-03-07 10:57:30 +08:00
f7aba6b570
siphaser: fix phase_shift_done CSR
2018-03-07 10:57:30 +08:00
acfd9db185
siphaser: minor cleanup
2018-03-07 10:57:30 +08:00
e6e5236ce2
firmware: fix si5324 select_recovered_clock
2018-03-07 10:57:30 +08:00
7d98864b31
sayma: enable siphaser
2018-03-07 10:57:30 +08:00
c2d2cc2d72
runtime: fix setup_si5324_as_synthesizer
2018-03-07 10:57:30 +08:00
a6e29462a8
sayma: enable multilink DRTIO
2018-03-07 10:57:30 +08:00
c34d00cbc9
drtio: implement Si5324 phaser gateware and partial firmware support
2018-03-07 10:57:30 +08:00
994ceca9ff
sayma_amc: disable slave fpga gateware loading
2018-03-06 17:27:43 +01:00
f4dad87fd9
coredevice: add pcf8574a driver
...
I2C IO expander with 8 quasi-bidirectional pins
2018-03-06 14:27:19 +01:00
62af7fe2ac
Revert "kasli/opticlock: use plain ttls for channels 8-23"
...
This reverts commit bd5c222569eb68d624a5ac1e9f2542f6ee553f83.
No decrease in power consumption or improvement in timing.
2018-03-06 14:27:19 +01:00
fd3cdce59a
kasli/opticlock: use plain ttls for channels 8-23
2018-03-06 14:27:19 +01:00
50298a6104
ttl_serdes_7series: suppress diff_term in outputs
2018-03-06 14:27:19 +01:00
e356150ac4
ttl_simple: support differential io
2018-03-06 14:27:19 +01:00
956098c213
kasli: add second urukul, make clk_sel drive optional
2018-03-06 14:26:27 +01:00
07de7af86a
kasli: make second eem optional in urukul
2018-03-06 14:26:26 +01:00
257bef0d21
slave_fpga: print more info
2018-03-06 14:26:26 +01:00
c25560baec
sed: more LaneDistributor comments
2018-03-06 20:56:35 +08:00
f40255c968
sed: add comments about key points in LaneDistributor
2018-03-06 20:51:09 +08:00
Florent Kermarrec
5b3d6d57e2
drtio/gth: power down rx on restart (seems to make link initialization reliable)
2018-03-06 11:49:28 +01:00
Florent Kermarrec
64b05f07bb
drtio/gth: use parameters from Xilinx transceiver wizard
2018-03-06 11:02:15 +01:00
Florent Kermarrec
45f1e5a70e
drtio/gth: cleanup import
2018-03-06 10:56:07 +01:00
a274af77d5
runtime: fix compilation without DRTIO
2018-03-05 00:43:42 +08:00
432e61bbb4
drtio: add kernel API to check for link status. Closes #941
2018-03-05 00:23:55 +08:00
6aaa8bf9d9
drtio: fix link error generation
2018-03-04 23:20:13 +08:00
d747d74cb3
test: fix test_dma
2018-03-04 23:19:06 +08:00
928d5dc9b3
drtio: raise RTIOLinkError if operation fails due to link lost ( #942 )
2018-03-04 01:02:53 +08:00
ba74013e3e
runtime: add a missing overflow flag reset
2018-03-03 13:16:21 +08:00
abfbadebb5
doc: DMA can also raise RTIOUnderflow
2018-03-03 13:14:34 +08:00
ddcc68cff9
sayma_amc: move bitstream options to migen
...
close #930
2018-03-02 18:13:03 +08:00
5e074f83ac
examples: update kasli sysu
2018-03-02 16:05:12 +08:00
29d42f4648
artiq_flash: add kasli sysu
2018-03-02 15:49:41 +08:00
a9daaad77b
kasli: add SYSU variant and device_db
2018-03-02 14:44:31 +08:00
1c57d27ae2
slave_fpga: use sayma_rtm magic
2018-03-01 18:32:19 +01:00
de63e657b8
kasli/si5324: lock to 100 MHz with highest available bandwidth
2018-03-01 14:49:53 +01:00
abd160d143
slave_fpga: check DONE before loading
2018-03-01 19:53:34 +08:00
a04a36ee36
firmware: move wait for write completion to read()
2018-03-01 11:37:33 +01:00
a6ae08d8b8
firmware/spi: work around cs_polarity semantics
...
The semantics differ between the RTIO and CSR interface.
2018-03-01 11:19:18 +01:00
cc70578f1f
remove old spi RTIO Phy
2018-03-01 11:19:18 +01:00
ec5b81da55
kc705: switch backplane spi to spi2
2018-03-01 11:19:18 +01:00
6fbe0d8ed8
hmc830: be explicit about SPI mode selection
2018-03-01 11:19:18 +01:00
a7720d05cd
firmware, sayma: port converter_spi to spi2
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* ksupport/nrt_bus
* port ad9154, hmc830, hmc7043
* port local_spi and drtio_spi
* port kernel_proto libdrtioaux, satman
* change sayma_rtm gateware over
* add spi2 NRTSPIMaster
* remove spi NRTSPIMaster
* change sayma device_db
* change HMC830 to open mode and explicitly sequence open mode
2018-03-01 11:19:18 +01:00
68278e225d
slave_fpga: check for INIT low
2018-03-01 17:28:01 +08:00
whitequark
14f6fa6699
firmware: fix a warning.
2018-03-01 01:25:55 +00:00
whitequark
d051cec0dd
firmware: remove useless module.
2018-03-01 01:22:52 +00:00
54984f080b
artiq_flash: flash RTM firmware
...
based on whitequark's work in f95fb27m-labs/artiq#813
2018-02-28 19:29:01 +01:00
0c49201be7
firmware: add slave fpga serial load support
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based on whitequark's work in f95fb27m-labs/artiq#813
2018-02-28 19:27:52 +01:00
1f999c7f5f
sayma_amc: expose RTM fpga load pins as GPIOs
2018-02-28 18:44:36 +01:00
cedecc3030
Revert "firmware: Sayma RTM FPGA bitstream loading prototype ( #813 )."
...
This reverts commit f95fb273f1
2018-02-28 18:43:56 +01:00
whitequark
f95fb273f1
firmware: Sayma RTM FPGA bitstream loading prototype ( #813 ).
2018-02-28 16:46:23 +00:00
Florent Kermarrec
2896dc619b
drtio/transceiver/gth: fix multilane
2018-02-28 14:15:40 +01:00
5046d6a529
ad9912/10: add a bit more slack to init()
2018-02-27 23:14:44 +01:00
f97163cdee
examples/master: sync device_db with kc705_nist_clock
2018-02-27 19:40:00 +01:00
whitequark
916b10ca94
examples: spi → spi2.
2018-02-27 18:36:45 +00:00
386aa75aaa
kasli: control SFP1 and SFP2 LEDs in DRTIO satellite to match master
2018-02-27 23:18:18 +08:00
5d81877b34
kasli: implement multi-link DRTIO on SFP1 and SFP2 of master
2018-02-27 23:15:20 +08:00
Florent Kermarrec
1f0d955ce4
drtio/transceiver/gtp: implement tx multi lane phase alignment sequence
2018-02-27 12:32:25 +01:00
e565d3fa59
kasli: add analyzer and RTIO log to DRTIO master target
2018-02-27 18:09:07 +08:00
760724c500
kasli/device_db: fix i2c switch addr
2018-02-26 11:37:12 +01:00
b466a569bf
coredevice: export spi2
2018-02-24 09:49:31 +01:00
Florent Kermarrec
5b0f9cc6fd
drtio/transceiver/gth: fix single transceiver case
2018-02-23 12:15:47 +01:00
cff85ee13b
novogorny: simplify and fix coefficient
2018-02-23 10:09:44 +01:00
Florent Kermarrec
b4ba71c7a4
drtio/transceiver/gth: implement tx multi lane phase alignment sequence (fix merge issue...)
2018-02-23 08:37:05 +01:00
Florent Kermarrec
820c834251
drtio/transceiver/gth: implement tx multi lane phase alignment sequence
2018-02-22 22:14:15 +01:00
bc5e949bb4
novogorny: fix gain register length
2018-02-22 18:45:55 +00:00
1452cd7447
novogorny: add coredevice driver and test with Kasli
...
m-labs/artiq#687
2018-02-22 17:19:51 +01:00
74517107f0
ad9912: add slack after prodid read
2018-02-22 17:19:51 +01:00
3b7971d15d
kasli: spelling
2018-02-22 17:19:51 +01:00
771bf87b56
kc705: port amc101_dac/spi0 and sma_spi to spi2
2018-02-22 17:19:51 +01:00
d4a10dcbd4
urukul: fix example
2018-02-22 11:28:50 +01:00
e8d4db1ccf
coreanalyzer: add spi2 support
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m-labs/artiq#926
2018-02-22 11:28:46 +01:00
f8e6b4f4e3
ad5360: port to spi2
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* kc705 nist_clock target gateware
* coredevice driver
* moninj code
* test/example/device_db
This is untested as we don't have a AD5360 board right now.
Will be tested with Zotino v1.1
m-labs/artiq#926
2018-02-22 10:25:46 +01:00
96423882f2
fix 4d6619f3b
2018-02-22 15:27:54 +08:00
fa0d929b4d
drtio: reorganize RX synchronizers
2018-02-22 15:21:23 +08:00
e5de5ef473
kasli: use deterministic RX synchronizer
...
Could not reproduce the "fully broken bitstream" bug.
2018-02-22 15:18:09 +08:00
