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drtio: fix test infinite loop

This commit is contained in:
Sebastien Bourdeauducq 2018-02-20 17:42:00 +08:00
parent ad2c9590d0
commit 7d9c7ada71
1 changed files with 4 additions and 0 deletions
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4
artiq/gateware/test/drtio/test_full_stack.py
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@ -68,6 +68,10 @@ class DUT(Module):
self.submodules.satellite = DRTIOSatellite(
self.transceivers.bob, rtio_channels, rx_synchronizer,
lane_count=4, fifo_depth=8, fine_ts_width=0)
self.satellite.reset.storage.reset = 0
self.satellite.reset.storage_full.reset = 0
self.satellite.reset_phy.storage.reset = 0
self.satellite.reset_phy.storage_full.reset = 0
class OutputsTestbench: