mirror of https://github.com/m-labs/artiq.git
drtio: fix error CSR edge detection (#947)
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@ -28,7 +28,7 @@ class RTErrorsSatellite(Module, AutoCSR):
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if detect_edges:
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source_r = Signal()
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self.sync.rio += source_r.eq(source)
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self.comb += xfer.i.eq(source & source_r)
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self.comb += xfer.i.eq(source & ~source_r)
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else:
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self.comb += xfer.i.eq(source)
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